Reset Discharge Research Articles

Modified driving waveform for improving write discharge characteristics in open dielectric structure of AC PDP

ABSTRACTThe modified driving waveform is proposed to improve the characteristic of the write discharge in the open dielectric structure of the AC type plasma display panel. An open dielectric is a structure in which the sustain discharge is more easily generated by removing the dielectric layer between the electrodes of the upper plate in order to increase the luminance of the AC PDP. Though the sustain discharge easily occurs when the conventional driving method was used for the open dielectric, the characteristic of the writing discharge was relatively poor. Previous studies have suggested a method to improve the characteristics of the write discharge, but it has been disadvantageous in that an excessive reset discharge due to a high voltage causes a low contrast ratio and a high voltage was applied in the negative direction. In this study, threshold voltage (Vt) closed curves of conventional and open dielectric structures were measured and the wall voltage vector inside the cell was analyzed by the applied driving waveform. Based on these results, the modified driving waveform is proposed to improve the write discharge characteristics. Compared with the conventional driving waveform, the write discharge delay time is shortened by about 0.3 µm in each write pulse.

Analysis on the Ramp Reset Operation by Measuring the Surface Charge Distribution in an ac PDP Cell

We measured the spatiotemporal surface charge distribution in a co-planar type alternating current plasma display panel driven by the ramp type reset waveform. The longitudinal electro optic modulation technique with BSO single crystal was used to measure the surface charge density. The result shows that the surface charge distributions on sustain and address electrodes after reset period are almost same independent of the initial conditions which are result from the sustain discharge at previous subfield. The result also shows that the discharge during the ramp type reset waveform is mainly occurred at near gap between sustain electrodes. During the ramp reset discharge.

Improvement on Address Discharge Characteristics for Overall Subfield Time Using Additional Scan Voltage in AC PDP

The address discharge time lags are investigated in each subfield time in AC PDP and shortened by changes in the amplitude of the additional scan voltage during total subfield time under the stable address voltage margin range. During the reset period, the reset discharge is produced by applying the high positive-going ramp voltage and the wall charge in a cell is generated. That wall charge plus the external address voltage induce the address discharge. In the first subfield time, the address discharge is fast produced than the other subfield times because the wall charge are much remained by the high positive-going ramp voltage during the reset period. Meanwhile, from the second to last subfield, the address discharge production time is gradually delayed due to the dissipation of the wall charge in a cell. In this study, the address discharge time lags are measured in each subfield time and the modified driving method to shorten the total address discharge time is proposed by applying the different additional scan voltages in each the subfield time.

Analysis of Weak and Strong Discharge Characteristics for Fast Address Discharge in Microplasma Cells

In this paper, the voltage level of the negative falling ramp in the reset waveform is lower, the accumulated wall charges during the ramp-up period are more erased between A-Y electrodes, thus, reducing the number of wall charges prior to address discharge. In particular, the measured Vt closed-curves and the weak and strong discharge characteristics corresponding IR emission profiles show that fewer wall charges prior to an address discharge induce a decrease in the statistical time lag during the address period. The discharge transient contours of simultaneous discharges are changed by the wall voltage states after reset discharge, thereby influencing the statistical discharge time lag of the address discharge for the stable drive, thereby resulting in stable and fast addressing.

A New Reset Waveform for Stable Discharge Under Variable Panel Temperatures in AC-Plasma Display Panel

The discharge characteristics, especially the reset discharge characteristics, were examined relative to the panel temperature from -5 to 65°C in an ac-plasma display panel. As the panel temperature decreased, the reset discharge became unstable, due to a decrease in the exo-electron emission from the MgO surface by the thermal activation, thereby inducing the unstable address discharge at a low panel temperature. To stabilize the reset discharge, the effects of the ramp-slope rates during the reset period on the reset discharge were examined under variable panel temperatures. Based on the experimental observation, the new temperature-adaptive reset waveform is proposed to produce a stable reset discharge irrespective of variable panel temperatures.

Modified Reset Waveform for High Speed Address under High Ambient Temperature in AC Plasma Display Panel

Achieving a stable and fast address discharge under a high ambient temperature depends strongly on how constant the wall voltage formed through the reset discharge remains throughout the address period. It was observed that the wall voltage after the reset period varied considerably under a high ambient temperature, thereby aggravating a stable address discharge, mainly due to an increase in the formative discharge delay. Thus, based on the fact that the wall voltage variation during an address period is directly related to the emission of exo-electrons from the MgO surface, it was anticipated that forcing the emission of the exo-electrons prior to the address period would minimize the wall voltage variation during the address period. As a result, the proposed reset waveform with the ramp-up holding part optimized according to the subfield conditions was able to minimize the wall voltage variation during the address period, achieving a fast and stable address discharge under a high ambient temperature of +65 °C in a 50-in. AC plasma display panel (PDP) with full high-definition (HD) resolution.

P‐96: Analysis of Address Discharge Delay Characteristics Using Transient Characteristics of IR Emission Intensity in Plasma Display Panel

AbstractThis paper analyzes the address discharge delay characteristics based on the measurement of the transient IR emission intensity according to the wall charge state after the reset discharge. This measurement result shows that the maximal erasure of the wall charges accumulating on the scan and address electrodes during the negative ramp‐falling period induces the easy transition from the weak discharge to the strong discharge, thereby resulting in shortening the statistical delay time.

Analysis of Misdischarge as Aging Characteristics in an AC-PDP

The surface reconstruction of MgO by ion sputtering and redeposition brings about changes in discharge characteristics of AC-PDP. The more the number of discharges in cells is increased, the more the instability of discharge is increased. As discharges continuously occur, the microstructure of MgO is changed, and the time lag of the discharge is increased. In this paper, we present the mechanism of misdischarges, such as bright noise and black noise, by analyzing aging characteristics. Also, we found that misdischarges are closely connected with the exoelectron emission, which strongly influences the lag time of discharge, from a MgO surface. Moreover, we expressed the instability of reset discharge in terms of the lag time of the discharge and the probability of the strong dark discharge in the reset period.

42.2: Using the Selective‐Reset to Achieve a “Real Black” with 50‐in. Full HD PDPs

Abstract“Real black” plasma display panels (PDPs) having a background luminance of zero cd/m2 must be realized to obtain high picture quality. PDPs, however, must have reset discharges to initialize cell conditions, regardless of expressing any of the gray levels. The light emission from the reset discharges becomes a background luminance, degrading the picture quality having low luminance levels. A technique of substituting the role of the reset discharges is proposed for 50‐in. full‐HD PDPs. with this technique an infinite dark‐room contrast ratio is obtained. However, it has the problem of the discharge delay. A solution to this was proposed by using the frame reset or the minimum surface reset discharge and selective reset.

An Investigation of the Temporal Dark-Image-Sticking Phenomenon in an AC Plasma Display Panel With an Auxiliary Electrode

In this paper, the temporal dark-image-sticking phenomenon in an AC plasma display panel (PDP) with an auxiliary electrode is investigated. To investigate this phenomenon, temporal behaviors of a black background image were observed in accordance with the sustain-discharge time and the relaxation time. Since dark image sticking is related to the reset discharge, our measurements focused on the reset period. In the case of an ac PDP with three electrodes, iterant sustain discharges induced an increase in black luminance, thereby leaving a residual image. However, in the case of an AC PDP with an auxiliary electrode, there was no variation of luminance between the states before and after the iterant sustain discharges. As a result, no residual image remained, and no distortion of the image could be recognized with the human eye, even after iterant sustain discharges.

Experimental Observation of Discharge Characteristics Under Variable Ambient Temperature in AC Plasma Display Panel

The effect of an ambient temperature ranging from -5degC to +65degC on the discharge characteristics was examined. The change in the firing voltage according to the ambient temperature was much higher under MgO cathode conditions with a high secondary electron emission coefficient than under phosphor cathode conditions with a low secondary electron emission coefficient. Through the weak reset discharge, the wall voltages were increased with an increase in the ambient temperature, as the wall charges were less erased at a higher ambient temperature during the ramp-down period. An increase in the ambient temperature was also found to have a more significant influence on the statistical delay time than on the formative delay time. Since the statistical delay time is strongly related to the priming condition, a higher ambient temperature may contribute to a better priming condition for reducing the statistical delay time during the address period.

Improved discharge characteristics using MgO single‐crystal particles and advanced CEL structure

Abstract— Pioneer Corporation introduced plasma‐display‐panel (PDP) TVs in 2005, which achieved the highest dark‐room contrast ratio of 4000:1 at the time. These PDPs had a novel discharge cell structure consisting of a crystal emissive layer (CEL) on a MgO protective thin film. This cell structure is refered to as a CEL structure. Magnesium‐oxide single‐crystal particles, which have a unique luminance peak around 230–250 nm and a good exo‐electron‐emission property, were found to be an excellent material for CEL and were utilized in CEL panels. In 2007, newly developed PDP TVs in which CEL was formed on a phosphor layer, in addition to the previous CEL structure, were introduced, and this discharge cell structure is refered to as advanced CEL structure. By using the new cell structure, the opposed discharge characteristics have been drastically improved, and a stable reset discharge has been realized with only a weak opposed discharge. As a result, black luminance has been drastically reduced, and a dark‐room contrast ratio of over 20,000:1, the highest ever reported, has been achieved.

New Reset Waveform for a Large-Sustain-Gap Structure in an Alternating Current Plasma Display Panel

A new reset waveform for a large-sustain-gap structure in an ac plasma display panel is proposed. In the driving of a large-sustain-gap structure with a conventional ramp reset waveform, we cannot avoid the condition of an address electrode being a cathode, which causes lots of trouble in stabilizing the reset discharge. To resolve these problems, a square pulse instead of the conventional rising-ramp pulse is used. In order to stabilize the strong discharge in which the address electrode becomes a cathode, a priming discharge between the address (anode) and scan (cathode) electrodes is made prior to making a strong discharge between the address (cathode) and scan (anode) electrodes. With this scheme, a minimum address voltage of 60 V when the sustain gaps are 250 and 350 mum, respectively, is obtained. However, the contrast ratio using the square reset pulse is lower than that using the conventional ramp pulse. To improve the contrast ratio, the reset waveforms in each subfield are replaced by selective erase waveforms except for the first subfield. In the case of nonselective reset waveform, the background luminance is 19.4 cd/m <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , whereas the background luminance of 2.4 cd/m <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> is obtained with selective reset waveform.

Analysis of Reset Discharge Characteristics in AC-Plasma Display Panel With Various Sustain Gaps Using $V_{t}$ Close-Curve

The effects of various sustain gaps on the reset discharge characteristics, particularly the discharge stability, are examined based on a Vt close-curve analysis. The Vt close-curve analysis shows that the reset discharge region producing a stable discharge under an MgO cathode condition is reduced in proportion to the increase in the sustain gap, resulting in discharge instability when a conventional reset waveform is applied with a wide-sustain-gap (over 200 mum) structure. Based on the Vt close-curve analysis, a modified reset waveform suitable for a wide-sustain-gap (= 200 mum) structure is proposed to prevent an unstable discharge. The effects of two parameters V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">add-bias</sub> and V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">com-bias</sub> in the modified reset waveform on the reset discharge as well as the address and first sustain discharges, are examined in detail.

Driving Characteristics of a High-Efficacy AC PDP With an Auxiliary Electrode

A new driving waveform was proposed in order to stabilize the driving characteristics of a high-efficacy AC plasma-display panel (PDP) with a coplanar gap of 200 mum and an auxiliary electrode. To stabilize the reset and address discharge, an erase pulse was applied to the auxiliary electrode instead of the sustain electrode after the sustain period. The write pulse was applied to the scan electrode, and a reset discharge was induced between the scan and auxiliary electrodes. As a result, the minimum address voltage could be reduced to a level similar to that achieved with a conventional ac PDP with a coplanar gap of 80 mum. Furthermore, the address-discharge time lag of the ac PDP with a coplanar gap of 200 mum was improved to a level that is comparable with that of the ac PDP with a coplanar gap of 80 mum.

A Study on the Measurement Technique of Image Retention in AC Plasma Display Panels

A technique for quantitatively measuring the image retention is suggested. This work focuses on dark image retention, which occurs during the reset period. To investigate the dark image retention phenomenon, characteristics of reset discharge were observed in accordance with the slope of the reset pulse. The temporal behaviors of luminance, chromatistic values, and infra red emission were observed with the black-level image after a five-minute repeatedly strong discharge. The image retention time of the luminance and chromatistic values increased with a decrease in the rising time of the reset ramp pulse. For the case of infrared (IR) emission, there was no clear tendency, in contrast with the image retention or temporal image sticking phenomenon. The results indicate that measurement of the temporal behaviors of luminance and chromatistic values provide suitable measurement for investigating the image retention in AC plasma display panels (PDPs), whereas the IR emission does not provide a useful guide in this regard.

21.1: Advanced Discharge Cell Design with CEL Realizing Very High Contrast over 20000:1

AbstractA new cell structure has been developed to realize very high darkroom contrast ratio. Crystal Emissive Layer (CEL) is added on the phosphor layers, in addition to that on the MgO layer. As this structure enables stable and very low luminance reset discharge, high contrast ratio over 20000:1 has been achieved in new Pioneer's PDP “KURO”.

P‐141: Effect of Modified Scan and Sustain Waveforms on Black Luminance and Address Voltage in an AC Plasma Display Panel

AbstractAlthough the three Electrode Surface Discharge type AC PDP is the de‐facto standard in the Plasma TV industry, one parameter which researchers and manufacturers are working hard to improve is Dark Room Contrast Ratio. Poor DRCR is a result of the high Black luminance caused by strong reset discharge. Another parameter, which has seen a lot of activity, is the Address Voltage. This paper investigates the effect of increasing the negative bias voltage applied to the Scan (Y) electrode while reducing the voltage from sustain voltage level applied to the Sustain (X) electrode during the Reset period and address period. Under the optimum voltage and ramp conditions, the Black Luminance was found to have reduced by a factor of 8 and the Address Voltage reduced to the extent of 15 – 20 Volts as compared to conventional waveform. These improvements were tested and validated in the lab on 42″ SD Plasma Display Panels. The significance of this scheme lies in the fact that the improvement in picture quality as a result of Low Black Luminance and consequent improvement in the Dark Room Contrast Ratio did not lead to an increase in the cost of electronics. In fact a reduction of electronic costs is possible due to reduction in the Address Voltage by allowing the use of cheaper Address Driver ICs.

High‐speed driving waveform based on reset and address discharge analysis using a Vt closed curve in ACPDPs

Abstract— Driving waveforms having both high‐speed address and low background were developed using Vt closed curve analysis. To prevent a misfired discharge during a sustain period, the voltage difference at the end of the ramp setup between the X‐Y electrodes remains constant. Because background luminance becomes higher (although the address discharge time lag becomes shorter) as the voltage difference between the A‐Y electrodes becomes larger, a low reset voltage and an address bias voltage were adopted during the ramp‐up period.

P‐94: Selective Reset Driving in Plasma Display Panel with a Sustain Gap of 250μm

AbstractA selective reset waveform which can improve the dark room contrast ratio in a large sustain gap structure is suggested in this paper. When conventional selective reset discharge is performed, frequent unexpected misfiring happens because of high Vxb and much quantity of negative wall charges formed on Y electrode during final sustain period. The misfiring between sustain electrode and address electrode can be removed by lowering Vxb value and the misfiring between address electrode and scan electrode can be prevented by decreasing negative wall charges which were formed on Y electrode by applying narrow pulse voltage Vey and Vea after the last sustain pulse. When the selective reset waveform has one time reset per 8 subfields, black luminance of 1.55 cd/m2 can be obtained without any misfiring.