Channel Region Research Articles

Doping- and capacitor-less 1T-DRAM cell using reconfigurable feedback mechanism.

In this paper, we propose a doping- and capacitor-less 1T-DRAM cell, which achieved virtual doping by leveraging charge plasma and bias-induced electrostatic doping (bias-ED) techniques in a 5-nm-thick intrinsic silicon body, thereby eliminating doping processes. Platinum was in contact with the drain, while aluminum was in contact with the source, enabling virtual doping of the silicon body into a p*-i-n* configuration via the charge-plasma technique. Two coupled polarity gates and one control gate are positioned above the intrinsic channel region. The intrinsic channel region is virtually doped through the bias-ED by applying voltages to the gates, forming potential wells inside the channel. The voltage applied to the two coupled polarity gates determines whether the device operates in the p- or n-channel mode, whereas the control gate governs the flow of charge carriers. Charge carriers are stored and released in the potential wells inside the channel by adjusting the gate, effectively replacing the capacitor. In this device, the placement of polarity gates on either side of the control gate enables the observation of the reconfigurable characteristics. Moreover, the proposed device utilizes a feedback mechanism, enabling excellent memory characteristics such as a high on/off current ratio of ~10^9, steep switching behavior of ~0.2 µV/dec, short write time of 10 ns, long hold retention of over 100 s, and long read retention of over 600 s.

Critical Points in the Noiseberg Achievable Region of the Gaussian Z-Interference Channel

The Gaussian signaling strategy with power control for the Gaussian Z-interference channel with weak interference is reviewed in this paper. In particular, we study the various communication strategies that may arise at various points of the capacity region and identify the locations of the phase transitions between the various strategies. The Gaussian Z-interference channel with weak interference is known to have two critical points in its capacity region, where the slope of the region shows a sudden change. They occur at the points of the unconditional maximum rate for one of the users and the maximum rate that can be accommodated by the other user. In this paper, we discuss additional critical points (locations of phase transitions) in the achievable region of this channel. These turn out to be second-order phase transitions, i.e., we do not observe a discontinuous slope in the achievable rate region, but there is a discontinuity in the second derivative of the rate contour of the achievable region. This review paper is mainly based on some of our ITA (Information Theory and Applications Workshop, UCSD, San Diego, CA, USA) papers since 2011.

Understanding thickness-dependent stability of tungsten-doped indium oxide transistors

In this study, the influence of the thickness of the channel layer on the electrical properties and stability of tungsten-doped indium oxide (IWO) thin-film transistors (TFTs) was investigated. Although oxide-semiconductor TFTs, particularly indium gallium zinc oxide, are promising, problems related to oxygen vacancies have led to their instability. In contrast, IWO has proven to be a compelling alternative because of its robust resistance to oxygen vacancies. IWO TFTs with varying channel thicknesses (10, 20, and 30 nm) were fabricated, and the device parameters, such as threshold voltage (Vth), subthreshold swing (SS), field-effect mobility (μFE), and on/off current ratio (Ion/Ioff), were analyzed. It was found that as the channel thickness increased, Vth exhibited a negative shift and SS increased, indicating an increase in carrier concentration. This phenomenon is attributed to the bulk trap density, in particular to oxygen vacancies. Negative bias stress tests confirmed the influence of the oxygen vacancies, with thicker channels showing more pronounced shifts. Low-frequency noise measurements were consistent with the carrier number fluctuation model, indicating that defects within the channel region contribute to the observed noise. The study concludes that identifying an optimal channel thickness during device manufacturing is crucial for improved TFT performance, with 20 nm devices characterized by high μFE and comparable trap density to 10 nm. This study provides valuable insight into the nuanced relationship between the channel thickness, trap density, and electrical performance of IWO TFTs.

Graphene nanoribbon resonant tunneling diode with dual connection between contacts

In this paper, we numerically study the transport properties of a resonant tunneling diode (RTD) based on graphene nanoribbon (GNR) with an H-type antidote between the contacts. The structure may also be thought of as having two parallel (W-shape) parts connecting the contacts, each having a wider channel region sandwiched between two narrower barrier regions. The energy at which quasi-bound states occur in each part depends on the dimensional parameters of the respective portion in the structure. We study how the transmission through quasi-bound states is influenced by the edge states on the contacts and dimensional parameters such as barrier length and also by the ambient temperature. The results are compared with those of an RTD with a single part connecting the contacts. Transmission peaks at different energies are observed for an RTD with asymmetrical lower and upper parts between the contacts. This is then utilized for the creation of two negative differential resistance (NDR) peaks. For numerical computation, the non-equilibrium Green’s function formalism (NEGF) based on the nearest neighbor tight-binding model is employed.

Core-shell architecture and channel suppression: unleashing the potential of SC_RCS_DGJLFET

In this investigation, a suppressed channel-rectangular core–shell double gate junctionless field effect transistor (SC_RCS_DGJLFET) is simulated to enhance the junctionless device’s performance. This study leverages a core–shell architecture and channel suppression technique to improve the gate controllability over the channel region which helps in substantial depletion of the shells in the OFF state of the device. When compared to conventional double gate JLFETs (C_DGJLFET) and rectangular core–shell double gate JLFETs (RCS_DGJLFET), the performance of the SC_RCS_DGJLFET is superior in terms of IOFF, ION/IOFF ratio, DIBL and subthreshold slope (SS). The SC_RCS_DGJLFET achieves an ultra-low IOFF of 7.033 × 10−16 A, indicating a low leakage current with an impressive ION/IOFF = 5.092 × 1011 . Other performance parameters such as subthreshold slope and DIBL has also been improved for the SC_RCS_DGJLFET device. Subthreshold slope has been decresesd by 4.76% whereas the DIBL decreased by 33.82% when compared to existing RCS_DGJLFET. Additionally, to analyze the effect of doping on the device performance, the core doping in SC_RCS_DGJLFET is varied for fixed shell doping. The study found that fixing core doping to an appropriate value is a crucial parameter to achieve good device performance. The impact of variation of oxide extension towards the source and drain LextS/LextD in SC_RCS_DGJLFET is also studied for the first time in the core–shell architecture which has further improved the device’s performance. Finally, a CMOS inverter is designed using the proposed device that provides valuable insights into its suitability for digital circuit applications and verifies its performance benefits compared to existing transistor technologies. The SC_RCS_DGJLFET based CMOS inverter shows a sharp transition in voltage transfer characteristics (VTC), indicating fast switching speed and precise signal processing capabilities when compared to a CMOS inverter based on a conventional double gate junctionless field effect transistor (C_DGJLFET). Moreover, the transient characteristics of the SC_RCS_DGJLFET based CMOS inverter exhibit an improved output voltage swing, suggesting enhanced dynamic behaviour and stability during logic state transitions.

Exploring sperm cell rheotaxis in microfluidic channel: the role of flow and viscosity

Rheotaxis is a fundamental mechanism of sperm cells that guides them in navigating towards the oocyte. The present study investigates the phenomenon of sperm rheotaxis in Newtonian and non-Newtonian fluid media, which for the first time explores a viscosity range equivalent to that of the oviductal fluid of the female reproductive tract in rectilinear microfluidic channels. Three parameters, the progressive velocity while performing rheotaxis, the radius of rotation during rheotaxis, and the percentage of rheotactic sperm cells in the bulk and near-wall regions of the microfluidic channel were measured. Numerical simulations of the flow were conducted to estimate the shear rate, flow velocity, and the drag force acting on the sperm head at specific locations where the sperms undergo rheotaxis. Increasing the flow velocity resulted in a change in the position of rheotactic sperm from the bulk center to the near wall region, an increase and subsequent decrease in the sperm's upstream progressive velocity, and a decrease in the radius of rotation. We observed that with an increase in viscosity, rheotactic sperms migrate to the near wall regions at lower flow rates, the upstream progressive velocity of the sperm decreases for Newtonian and increases for non-Newtonian media, and the radius of rotation increases for Newtonian and decreases for non-Newtonian media. These results quantify the effects of fluid properties such as viscosity and flow rate on sperm rheotaxis and navigation, thereby paving the way for manipulating sperm behavior in microfluidic devices, potentially leading to advancements in assisted reproduction techniques.

String-level compact modeling of erase operations in the body-floated vertical channel of 3D charge trapping flash memory

In this study, we examined the use of string-level compact modeling as an effective framework for circuit simulation focusing on erase operation in 3D charge trapping flash (CTF) memory devices. We analyzed the behaviors of the accumulated hole from p-type bulk (p-well) and the corresponding difference of channel electrostatic potential in the CTF cell string, which is attributed to the variation in hole barrier height in the channel of the ground select line (GSL) transistor during erase operation. We derived a formula for the hole current delivering positive potential from the p-well to the channel region and established a modeling procedure. Technology computer-aided design (TCAD) simulation results were used to extract model parameters and analyze channel electrostatic potential during the erase operation. Additionally, experimental data for erase speed were verified using simulation program with integrated circuit emphasis (SPICE) results. Because the erase efficiency is strongly related to hole behaviors based on the conditions of the GSL transistor, the proposed compact modeling is an effective tool for circuit designers and system architects to achieve better performance in erase execution and optimizing the design of 3D CTF memory devices.

A novel nanoscale FD-SOI MOSFET with energy barrier and heat-sink engineering for enhanced electric field uniformity

This paper aims to present a novel method to mitigate the undesirable issues associated with short-channel-effects (SCEs) and the critical lattice temperature of a fully depleted silicon-on-insulator (FD-SOI) MOSFET in the nanoscale regime. The proposed approach is based on simultaneously merging the energy barrier and heat-sink engineering simultaneously. Hafnium oxide as a high-k dielectric inside the channel region around the drain region is embedded to redistribute the band energy resulting in the enhancement of the energy barrier. This reformation of the band profile reduces variations in the channel depletion charge volume percentage caused by the drain voltage, thereby mitigating short-channel effects (SCEs). In order to promote effective thermal conduction, a portion of the buried oxide is replaced by doped P-type silicon which acts as an effective heat-sink. The devices under the investigation have been simulated using SILVACO software, considering the comprehensive physical models. Drain-Induced Barrier Lowering (DIBL), leakage current, Ion to Ioff ratio, subthreshold swing, hot carrier effect and lattice temperature as the essential parameters have been successfully improved for the proposed device in comparison to the conventional device.

Study on the performance of InGaN-based micro-LED by plasma etching combined with ion implantation process

This study utilized blue-light epitaxial wafers and employed semiconductor processes such as maskless laser writing, dry etching, wet etching, passivation layer deposition, electron beam evaporation, and ion implantation to fabricate micro-light emitting diode (μLED) arrays with different pixel sizes but the same emitting area (900 μm²). The μLED arrays with single pixel sizes of 5 μm, 10 μm, and 15 μm were fabricated, with array numbers of 6×6, 3×3, and 2×2, respectively. This study proposes etching the material in the channel region while retaining a certain width for implantation, known as the sidewall ion implantation process, aiming to achieve better insulation characteristics by using ion implantation technology to insulate the sidewall regions. It involves ion bombardment of the defect areas generated after plasma etching and the use of a passivation layer for protection. The isolation characteristics of μLED arrays processed by sidewall implantation exhibited better electrical isolation than those of μLED arrays processed only by plasma. The light output power, external quantum efficiency, and wall-plug efficiency were all superior for the sidewall implantation process when the device was miniaturized to 5 μm. Overall, the sidewall implantation process combined with plasma dry etching effectively improved the light output characteristics, with the enhancement ratio increasing as the device was miniaturized.

Establishing criteria for the transition from kinetic to fluid modeling in hollow cathode analysis

Hollow cathodes for plasma switch applications are investigated via 2D3V particle-in-cell simulations of the channel and plume region. The kinetic nature of the plasma within the channel is dependent on the thermalization rate of electrons, emitted from the insert. When Coulomb collisions occur at a much greater rate than ionization or excitation collisions, the electron energy distribution function rapidly relaxes to a Maxwellian and the plasma within the channel can be described accurately via a fluid model. In contrast, if inelastic processes are much faster than Coulomb collisions, then the electron energy distribution function in the channel exhibits a notable high-energy tail, and a kinetic treatment is required. This criterion is applied to hollow cathodes from the literature, revealing that a fluid approach is suitable for most electric propulsion applications, whereas a kinetic treatment can be more critical to accurate modeling of plasma switches.

Effects of turning vane on flow control and heat transfer in ribbed two-pass channel with varied rib patterns

Faced with the escalating cooling requirements of turbine blades, two-pass channels with ribs on the internal surfaces have been extensively employed to enhance internal wall heat transfer. Considering the potential to mitigate flow separation and pressure losses generated by channel curvature, in this study, a computational fluid dynamics approach based on the realizable k-ε turbulence model is employed to explore the effects of turning vane introduction on the flow and heat transfer characteristics of two-pass channels with varying rib configurations. The rib configurations are identified as NN, NP, PP and PN. “N” denotes the ribs rotated 45° clockwise relative to the flow direction, while “P” denotes the ribs rotated 45° counterclockwise. The results indicate that the introduction of turning vanes improves the flow uniformity in the downstream channel of the two-pass channel with N-patterned upstream ribs, enhancing inter-rib heat transfer in the downstream channel. It also strengthens the heat transfer performance at the bend region of the two-pass channel with P-patterned upstream ribs. Furthermore, the introduction of turning vanes results in a decrease in friction loss factor for two-pass channels with various rib arrangements at varying levels of Reynolds numbers. The reduction is more pronounced in the two-pass channel featuring N-patterned upstream ribs, with a maximum decrease of 18.6 %. In contrast, the decrease is only 5.2 % in the PP-patterned rib channel. Additionally, the thermal performance factor of NP-patterned and NN-patterned rib channels increases by 8.5 % and 8.7 % respectively after the insertion of turning vanes. However, the enhancement is limited in the PP-patterned and PN-patterned rib channels.

(Invited) Generic Compact Model for Variability and Low-Frequency Noise in Organic Thin-Film Transistors

In organic thin-film transistors (OTFT), low-frequency noise (LFN) is dominated mainly by grain-boundary traps and mobility fluctuation [1]. Accurate LFN modeling of OTFTs has been successfully demonstrated in [2] by adopting the theory of carrier-number and correlated mobility fluctuations (ΔN noise) [3,4,5] and the empirical Hooge approach accounting for mobility fluctuation due to percolative effects (Δµ noise) [6,7]. Furthermore, OTFTs are sensitive to process variability. Charges being trapped in the channel region cause a local variation of the accumulated charge density, having impact on the threshold voltage of the device [8,9] and reducing the effective carrier mobility in the channel by Coulomb scattering. As a result, the drain-current variability is also correlated to carrier-number and correlated mobility fluctuations and therefore allows for a similar modeling approach as for ΔN noise [9].Based on the results published in [2,9], we present a generic physics-based modeling approach for drain-current fluctuations by carrier-number and correlated mobility fluctuations, which leads to similar expressions for drain-current variability and ΔN noise in OTFTs. The model is based on the charge-based compact model for OTFTs presented in [10]. Starting from the local fluctuation of the current in the channel, closed-form model equations have been derived for the fluctuation of the total device current. The final expressions (1) for drain-current variability and (2) for ΔN noise show the same bias dependent part B*(qch) given by equation (5). An individual bias-independent prefactor C* is obtained. In case of drain-current variability this factor in equation (3) depends on the density Nt of trapped charges. For ΔN noise, in (4), NT is the density of traps per energy available for capture and release of charge carriers.Measurements performed on fabricated OTFTs in staggered (C10-DNTT) or coplanar (Dph-DNTT) architectures (Fig. 1) show that the drain-current variability in the subthreshold regime is dominated by carrier-number fluctuations, whereas for above threshold operation the mobility-fluctuation effect by correlated Coulomb scattering comes to the fore (Fig. 2) [9]. In case of LFN, measurements on staggered DNTT OTFTs have shown that ΔN noise alone is not sufficient to describe the noise spectra in the deep subthreshold regime of operation (Fig. 3) [2]. Here, LFN due to mobility fluctuation (Δµ noise) must be included with equations (6-8), which results in an additional and different bias dependent expression with a prefactor including the empirical Hooge parameter. The total LFN is given by (9).In conclusion, following a generic modeling approach, the combined equations for carrier-number and correlated mobility fluctuations and for percolative mobility fluctuation allow consideration drain-current variability and LFN noise in a charge-based compact model of OTFTs in all regions of operation and is in good agreement with results from measurements. Acknowledgements: This project was funded by the German Federal Ministry of Education and Research ("SOMOFLEX", No. 13FH015IX6), German Research Foundation (DFG) under Grant KL 1042/9-2 (SPP FFlexCom), the Spanish Ministry of Science (PRX21/00726), and the EU EIC-PATHFINDER (BAYFLEX, no 101099555). We acknowledge AdMOS GmbH, Germany, for support, and Max Planck Institute for Solid State Research Stuttgart, Germany, for fabrication of devices.

Design of a novel high-sensitive SOI-Junctionless BioFET overcoming sensitivity degradation problems

For the first time, a new configuration of label-free junctionless semiconductor device is proposed to boost sensitivity in the identification of biomolecule specifies. Instead of creating the nanocavity inside the gate oxide, the nanocavity is created in the channel region which is very useful for the SOI junctionless technology based biodevice having a high current in all operating modes. For better control of the conduction mechanism, a hole trench is created under the channel region just inside the buried oxide. This will help to modulate the energy bands terminating in enhancing the sensing performance. Unlike the conventional biosensors needing a large-scale gate oxide thickness for trapping the biomolecules, the proposed biosensor can work for very low gate oxide thickness. The different biomolecules such as Biotin, Protein A, Bacteriophage T7, and Apomyoglobin have been utilized as targeted biomolecules for evaluating the sensitivity. Comparing the proposed biosensor with the conventional and other biosensors showed an enhanced sensing performance. Practical related issues during the process of sensing in terms of fill factor percentage, steric hindrance of biomolecules, and the charges of biomolecules have been focused in the recommended biodevice. All the results exhibited high superiority of performance of the suggested biodevice as compared to the conventional biosensor.

Sputtered AlOx interlayer for improving performance of a-InGaZnO TFTs: A study on hydrogen diffusion mitigation and electron modulation

In this study, we developed an a-InGaZnO (a-IGZO) thin film transistor (TFT) structure that inserts a sputtered AlOx intermediate layer (IL) within the active layer. The IL not only effectively blocks hydrogen (H) diffusion from the gate insulation (GI) layer to the upper region of a-IGZO but also modifies the energy band structure of the bottom channel region and creates a locally low electron concentration that counteracts the excess electron donated by diffused H. Compared to conventional TFTs, the TFT with the IL exhibits impressive electrical characteristics, including a high saturation mobility (μsat) of 14.5 cm2 V−1 s−1, an on/off current ratio (Ion/Ioff) of 6.2 × 108, and a low subthreshold swing (SS) of 0.16 V/dec. Furthermore, this structure exhibits remarkable stability under negative bias stress and negative bias illumination stress, with ΔVth values of 1.1 and 1.5 V, respectively. The integration of the IL provides a promising approach for enhancing the performance of a-IGZO TFTs, paving the way for next-generation display technologies.

Influence of buffer layer engineering in MoS2/CIPS vdW NCFET logic transistor

Negative capacitance field-effect transistors (NCFETs) using molybdenum-di-sulphide (MoS2) and copper indium phosphorus sulfide ferroelectric (CIPS) van der Waals (vdW) heterostructure realize energy-efficient electronics due to sharper switching. Adding a buffer layer to the transistor's gate stack boosts the carrier flow. This paper explores various buffer layer candidates that could be used in vdW NCFET. Analysis show Al2O3 and h-BN have superior on/off current ratio in the order of 1012 and enhanced current density in the order of 3 × 105 A/cm2. Notably, Al2O3 exhibits a remarkably low potential of −4.43 V in the channel region, minimizing carrier scattering and consequently enhancing the carrier mobility. The transfer characteristics of Al2O3 demonstrate a low threshold voltage of −1.2 V, a subthreshold swing of 28 mV/decade, and a DIBL of 0.18 mV/V.

Numerical Investigation of the Performance of a Proton Exchange Membrane Water Electrolyzer under Various Outlet Manifold Structure Conditions.

The oxygen discharge process significantly affects the electrochemical performance of a proton exchange membrane water electrolyzer (PEMWE), which requires an optimal structure of the flow field implemented in the bipolar plate (BP) component. In this study, we numerically investigated the two-phase (liquid water and oxygen) flow in the PEMWE's channel region with different outlet manifold structures utilizing the volume of fluid (VOF) model. Then, the oxygen volume fraction at the liquid/gas diffusion layer (L/GDL) surface, i.e., the interface of the channel and L/GDL, obtained by the liquid water and oxygen flow model was incorporated into a three-dimensional (3D) PEMWE model, which made it possible to predict the influence of the outlet manifold structure on the multiple transfers inside the whole electrolyzer as well as the electrochemical performance. The results indicate that the existence of oxygen in the flow field significantly decreased the electrolyzer voltage at a fixed operation current density and deteriorated the uniform distribution of the oxygen amount, current density (corresponding to the electrochemical reaction rate) and temperature in the membrane electrode assembly (MEA), indicating that the rapid oxygen removal from the flow field is preferred in the operation of the electrolyzer. Moreover, slight increases in the width of the outlet manifold were helpful in relieving the oxygen accumulation in the anode CL and, hence, improved the electrolyzer performance with more uniform distribution characteristics.

High‐Precision Materials Printer for Fast Prototyping of Electronic Devices Based on 2D Materials

AbstractThere is an increasing interest in printed electronics driven principally by flexible and wearable applications. The interest stems from the ability to fabricate electronic devices, such as Field Effect Transistors (FET), more efficiently in terms of materials use and cost‐effectively than traditional lithographic techniques. Challenges persist in achieving high resolution and accuracy in defining device geometry. In the study, a high‐resolution materials printer able to achieve resolutions in the micron range, surpassing the capabilities of commercially available printers is successfully designed and fabricated. The printer incorporates an all‐in‐one printing system, comprising Inkjet and a Dip Pen Nanolithography (DPN) technique, enabling both additive and subtractive manufacturing at the microscale. The experiments demonstrate the successful fabrication of FETs based on 2D materials (2DMs), with micrometric channel lengths exhibiting a high degree of controllability and repeatability, even when contacting limited channel regions as micrometer‐sized molybdenum disulfide (MoS2) flakes. Electrical characterizations of the fabricated devices underscore the significant technological advancements achieved by the prototypes.

Analytical modeling of threshold voltage and on-resistance in multi-barrier E-mode MISHEMT with gate-recess and field-plates

This work presents an analytical model for threshold voltage and On-resistance of multi barrier Metal–Insulator–Semiconductor High-Electron-Mobility-Transistor (MISHEMT) with gate-recess and field-plates. The device featuring a high two-dimensional electron-gas (2DEG) density in the channel region. The primary objectives of this device are to achieve a high threshold voltage (Vth) and enhance electron mobility with specific low ON-resistance (Ron_sp) by mitigating the degradation effects arising from scattering and interface-charges. Also, a physics based analytical model for Vth and 2DEG charge density at upper and lower channels is presented. This model is validated by comparing with TCAD numerical simulations and are well matched. The proposed MISHEMT demonstrates improved electron mobility in the lower channel of 1260 cm2/V.s, Vth of ∼2.6 V and Ron_sp is minimized by 33 % in contrast with a conventional MISHEMT. Additionally, the proposed MISHEMT becomes a promising device for achieving both high threshold voltage and mobility which are required for power semiconductor devices.

Research of single-event burnout in vertical Ga2O3 FinFET by low carrier lifetime control

This paper presents the 2D simulations of single-event burnout (SEB) in vertical enhancement-mode gallium oxide (Ga2O3) fin-shaped channels field-effect transistor (FinFET) by low carrier lifetime control (LCLC) method. The correctness of the structure parameters and simulated physical models are verified by the basic electrical characteristics in experiments. The SEB simulations show that the most sensitive region to heavy ion is the narrow channel region. The SEB failure is due to the diffusion of a large number of electron–hole pairs induced by heavy ion into a strong electric field region, resulting in a large transient current density to cause the thermal failure. Afterwards, the influences of the narrow channel region width on basic characteristics and SEB performance are discussed. Then, the SEB hardening mechanism of LCLC is studied that the electric field peak in the top of the structure can be effectively reduced, and the transient current caused by second avalanche is restrained. In addition, the basic characteristics with LCLC are proved to be hardly influenced in Ga2O3 FinFET. Finally, the carrier lifetime value and local control region are studied that the SEB hardening performance can be significantly improved by a large enough control area with a low carrier lifetime.

Voltage-Gated Ion Channels: Structure, Pharmacology and Photopharmacology.

Voltage-gated ion channels are transmembrane proteins responsible for the generation and propagation of action potentials in excitable cells. Over the last decade, advancements have enabled the elucidation of crystal structures of ion channels. This progress in structural understanding, particularly in identifying the binding sites of local anesthetics, opens avenues for the design of novel compounds capable of modulating ion conduction. However, many traditional drugs lack selectivity and come with adverse side effects. The emergence of photopharmacology has provided an orthogonal way of controlling the activity of compounds, enabling the regulation of ion conduction with light. In this review, we explore the central pore region of voltage-gated sodium and potassium channels, providing insights from both structural and pharmacological perspectives. We discuss the different binding modes of synthetic compounds that can physically occlude the pore and, therefore, block ion conduction. Moreover, we examine recent advances in the photopharmacology of voltage-gated ion channels, introducing molecular approaches aimed at controlling their activity by using photosensitive drugs.