Reduce Design Complexity Research Articles

Options for small and medium sized reactors (SMRs) to overcome loss of economies of scale and incorporate increased proliferation resistance and energy security

The designers of innovative small and medium sized reactors pursue new design and deployment strategies making use of certain advantages provided by smaller reactor size and capacity to achieve reduced design complexity and simplified operation and maintenance requirements, and to provide for incremental capacity increase through multi-module plant clustering. Competitiveness of SMRs depends on the incorporated strategies to overcome loss of economies of scale but equally it depends on finding appropriate market niches for such reactors. For many less developed countries, these are the features of enhanced proliferation resistance and increased robustness of barriers for sabotage protection that may ensure the progress of nuclear power. For such countries, small reactors without on-site refuelling, designed for infrequent replacement of well-contained fuel cassette(s) in a manner that impedes clandestine diversion of nuclear fuel material, may provide a solution. Based on the outputs of recent IAEA activities for innovative SMRs, the paper provides a summary of the state-of-the-art in approaches to improve SMR competitiveness and incorporate enhanced proliferation resistance and energy security.

Automated design of pin-constrained digital microfluidic biochips under droplet-interference constraints

Microfluidics-based biochips, also referred to as lab-on-a-chip, are devices that integrate fluid-handling functions such as sample preparation, analysis, separation, and detection. This emerging technology combines electronics with biology to open new application areas such as point-of-care diagnosis, on-chip DNA analysis, and automated drug discovery. We propose a design automation method for pin-constrained biochips that manipulate nanoliter volumes of discrete droplets on a microfluidic array. In contrast to the direct-addressing scheme that has been studied thus far in the literature, we assign a small number of independent control pins to a large number of electrodes in the biochip, thereby reducing design complexity and product cost. The design procedure relies on a droplet-trace-based array partitioning scheme and an efficient pin assignment technique, referred to as the “Connect-5 algorithm.” The proposed method is evaluated using a set of multiplexed bioassays.

Fuzzy supervised neurocontrol of electrohydraulic servos

AbstractThe work presents theoretical and experimental investigations concerning the neuro‐fuzzy control of electrohydraulic servos. The control algorithm is built around a neurocontroller designed to optimize a performance index. Whenever the neurocontrol saturates or a system performance parameter decreases, the control scheme switches to a feasible and reliable fuzzy logic control. In accordance with simulation studies developed in previous works of the authors, the neuro‐fuzzy controlled system proves often to be better than the corresponding classical PI or LQG systems. We emphasize that the entire control synthesis is thought as a model free approach, thus ensuring reduced design complexity and focusing on increased system robustness. (© 2006 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

A Low-Complexity Synchronizer for OFDM-Based UWB System

In current ultra-wideband (UWB) baseband synchronizer approaches, the parallel architecture is used to achieve over 500 MSamples/s throughput requirement. Therefore achieving low power and less area becomes the challenge of UWB baseband design. In this paper, a low-complexity synchronizer combining data-partition-based correlation algorithms and dynamic-threshold design is proposed for orthogonal frequency division multiplexing based UWB system. It provides a methodology to reduce design complexity with an acceptable performance loss. Based on the data-partition algorithms, both single auto-correlator and moving-average-free matched filter are developed with 528 Msample/s throughput for the 480 Mb/s UWB design. Simulation results show the synchronization loss can be limited to 0.8-dB signal-to-noise ratio for 8% system packet-error rate

Femtoliter to Picoliter Droplet Generation for Organic Polymer Deposition Using Single Reservoir Ejector Arrays

Direct deposition of photoresist and other spin-on materials, such as low-k and high-k dielectrics, has the potential to reduce waste as well as production costs. A new design of acoustically actuated two-dimensional (2-D) micromachined droplet ejector arrays can eject various solvents and other fluids ranging from femtoliter to picoliter droplet volumes. These ejectors do not harm fluids that are heat or pressure sensitive. Moreover, they are chemically compatible with the materials used in integrated circuit manufacturing. Therefore, they can be used for benign deposition of photoresist and other spin-on materials, such as low-k and high-k dielectrics. A vibrating circular Si/sub x/N/sub y/ thin-film membrane with an orifice at the center forms the unit cell of a 2-D ejector array. Initially, one side of the membrane is loaded with the ejection fluid. Then, ultrasonic waves generated by a piezoelectric transducer force the membranes to displace at resonance. As a result of this actuation, droplets are ejected through the membrane orifice. We ejected water at 1.06 MHz, isopropanol at 1.14 MHz, ethyl alcohol at 1.06 MHz, and acetone at 1.04 MHz from a 20/spl times/20 single reservoir 2-D micromachined array with 160 /spl mu/m in diameter Si/sub x/N/sub y/ membranes and 10 /spl mu/m in diameter orifices. The performance of single reservoir flextensional membrane-based ejector arrays was compared to flextensional membrane-based ejector arrays with reservoirs. A 50% decrease in the required power per ejected droplet and a reduced design complexity were demonstrated over the 2-D micromachined arrays with individual reservoirs. In addition, we deposited Shipley SPR 3612 photoresist at 1.12 MHz in a dry lab environment. No spinning was done after deposition. We covered a 2/spl times/2-mm area on a wafer with a 5.5-/spl mu/m thick photoresist layer. The maximum thickness variation over the area was 0.4 /spl mu/m. Moreover, we present a directly written 1.6-/spl mu/m thick 900-/spl mu/m wide and 8-mm long homogeneous photoresist line. The photoresist thickness variation along the line was 0.2 and 0.4 /spl mu/m in vertical and horizontal directions, respectively.

Decision support for traffic management based on organisational and communicative multiagent abstractions

Modern decision support systems (DSS) not only store large amounts of decision-relevant data, but also aim at assisting decision-makers to explore the meaning of that data, and to take decisions based on understanding. In transportation domains, a multiagent approach to the construction of DSS is becoming increasingly popular, because it does not only reduce design complexity, but it also adequately supports a dialogue-based stance on decision support interactions. However, despite recent advances in the field of agent-oriented software engineering, a principled approach to the design of multiagent systems for decision support is still to come. In this paper, we outline a design method for the construction of agent-based DSS. Setting out from an organisational and communicative model of decision support environments, we present an abstract architecture for multiagent DSS. We then show how this architecture is instantiated for real-world problems by means of two prototypes for transportation management.

Investigation of position sensitive avalanche photodiodes for a new high-resolution PET detector design

We are developing a high-resolution PET detector design with a goal of nearly complete scintillation light collection in /spl les/1 mm width, /spl ges/20 mm effective thickness LSO crystals. The design uses position sensitive avalanche photodiodes in novel layered configurations that significantly improve the light collection aspect ratio. To reduce design complexity and dead area we are investigating the use of 1 mm thick sheets of LSO in addition to discrete crystal rods, and the use of PSAPDs which require only four readout channels per device. The raw spatial response of a 1 mm thick crystal sheet coupled to a PSAPD exhibits a compressed dynamic range compared to that observed with discrete crystals. Measurements with the proposed configurations using /sup 22/Na irradiation achieved 10%-13% FWHM energy resolution at 511 keV and 2 ns coincidence time resolution. 1 mm width crystals with a saw cut surface finish an no inter-crystal reflector were well resolved in flood images.

Methods to extract more light from minute scintillation crystals used in an ultra-high resolution positron emission tomography detector

Recently, there has been great interest in developing finely pixellated position-sensitive scintillation detectors for ultra-high-resolution Positron Emission Tomography (PET) systems designed for breast cancer detection, diagnosis, and staging and for imaging small laboratory animals. We are developing a different high-resolution PET detector design that promotes nearly complete scintillation light collection in ⩽1mm wide, >10mm thick lutetium oxyorthosilicate (LSO) crystals. The design requires the use of semiconductor photodetector arrays in novel configurations that significantly improve the light collection aspect ratio for minute crystals. To reduce design complexity and dead area we are investigating the use of 1mm thick sheets of LSO in addition to discrete crystal rods, and the use of position-sensitive avalanche photodiodes (PSAPDs) which require only four readout channels per device, in addition to pixellated APD arrays. Using a 1mm thick scintillation crystal sheet coupled to a finely pixellated APD array results in a pseudo-discrete response to flood irradiation: due to a very narrow light spread function in the thin sheet we observe sharp (<1mm wide) peaks in sensitivity centered at the APD pixel locations in a very linear fashion all the way out to the crystal edge. We measured an energy resolution of 13.7% FWHM at 511keV for a 1mm LSO crystal coupled to two APD pixels. Using a 1mm thick crystal sheet coupled to a PSAPD the response to flood and edge-on irradiation with a 22Na point source shows a compressed dynamic range compared to that observed with discrete crystals or direct X-ray irradiation. With a discrete LSO crystal array the flood response is peaked at the crystal location where light is focused onto one spot on the PSAPD. We observed strong pin-cushioning effects in all PSAPD measurements. All LSO–PSAPD configurations studied had high aspect ratio for light collection and achieved energy resolutions ⩽12% FWHM at 511keV.

From linear to nonlinear control means: A practical progression

Abstract With the rapid advance of digital control hardware, it is time to take the simple but effective proportional-integral-derivative (PID) control technology to the next level of performance and robustness. For this purpose, a nonlinear PID and active disturbance rejection framework are introduced in this paper. It complements the existing theory in that (1) it actively and systematically explores the use of nonlinear control mechanisms for better performance, even for linear plants; (2) it represents a control strategy that is rather independent of mathematical models of the plants, thus achieving inherent robustness and reducing design complexity. Stability analysis, as well as software/hardware test results, are presented. It is evident that the proposed framework lends itself well in seeking innovative solutions to practical problems while maintaining the simplicity and the intuitiveness of the existing technology.

Hardware/compiler codevelopment for an embedded media processor

Embedded and portable systems running multimedia applications create a new challenge for hardware architects. A microprocessor for such applications needs to be easy to program like a general-purpose processor and have the performance and power efficiency of a digital signal processor. This paper presents the codevelopment of the instruction set, the hardware, and the compiler for the Vector IRAM media processor. A vector architecture is used to exploit the data parallelism of multimedia programs, which allows the use of highly modular hardware and enables implementations that combine high performance, low power consumption, and reduced design complexity. It also leads to a compiler model that is efficient both in terms of performance and executable code size. The memory system for the vector processor is implemented using embedded DRAM technology, which provides high bandwidth in an integrated, cost-effective manner. The hardware and the compiler for this architecture make complementary contributions to the efficiency of the overall system. This paper explores the interactions and tradeoffs between them, as well as the enhancements to a vector architecture necessary for multimedia processing. We also describe how the architecture, design, and compiler features come together in a prototype system-on-a-chip, able to execute 3.2 billion operations per second per watt.

Efficient VLSI architectures for fast computation of the discrete Fourier transform and its inverse

In this paper, we propose two new VLSI architectures for computing the N-point discrete Fourier transform (DFT) and its inverse (IDFT) based on a radix-2 fast algorithm, where N is a power of two. The first part of this work presents a linear systolic array that requires log/sub 2/ N complex multipliers and is able to provide a throughput of one transform sample per clock cycle. Compared with other related systolic designs based on direct computation or a radix-2 fast algorithm, the proposed one has the same throughput performance but involves less hardware complexity. This design is suitable for high-speed real-time applications, but it would not be easily realized in a single chip when N gets large. To balance the chip area and the processing speed, we further present a new reduced-complexity design for the DFT/IDFT computation. The alternative design is a memory-based architecture that consists of one complex multiplier, two complex adders, and some special memory units. The new design has the capability of computing one transform sample every log/sub 2/ N+1 clock cycles on average. In comparison with the first design, the second design reaches a lower throughput with less hardware complexity. As N=512, the chip area required for the memory-based design is about 5742/spl times/5222 /spl mu/m/sup 2/, and the corresponding throughput can attain a rate as high as 4M transform samples per second under 0.6 /spl mu/m CMOS technology. Such area-time performance makes this design very competitive for use in long-length DFT applications, such as asymmetric digital subscriber lines (ADSL) and orthogonal frequency-division multiplexing (OFDM) systems.

Gain-scheduled control for unmodeled subsystem dynamics

A method is developed, based on an extended D-K iteration procedure, for synthesizing controllers that are gain-scheduled on a priori unmodeled dynamics. A controller is designed for an example problem, and its performance is a significant improvement over a controller which is robust to the same set of unmodeled dynamics. In addition, a weighting filter synthesis method is presented which enables time-invariant parametric gain-scheduling problems to be translated into dynamic gain-scheduling problems, which reduces design complexity at the cost of controller performance.

Gain-scheduled control for unmodeled subsystem dynamics

A method is developed, based on an extended D-K iteration procedure, for synthesizing controllers that are gain-scheduled on a priori unmodeled dynamics. A controller is designed for an example problem, and its performance is a significant improvement over a controller which is robust to the same set of unmodeled dynamics. In addition, a weighting filter synthesis method is presented which enables time-invariant parametric gain-scheduling problems to be translated into dynamic gain-scheduling problems, which reduces design complexity at the cost of controller performance.

Architecture-driven modeling of real-time concurrent systems with applications in FMS

Petri nets have become increasingly popular for flexible manufacturing systems (FMS) modeling and control because they accurately capture the concurrent, non-deterministic and time-dependent properties of the systems. While offering many advantages, conventional Petri net models suffer from some serious problems that limit their usability as design models for complex FMS. Central to these problems is the lack of an engineering support for incremental design, refinement, and analysis of large-scale systems. In this paper, we present an architecture-driven approach for the modeling and design of FMS that effectively addresses the problems while leveraging the strengths of Petri nets. The approach has two major aspects: The first is a Net-based and Object-based Architectural Model (NOAM) that introduces a well-founded architectural framework into the Petri nets notation and lays a foundation to support formal design. The second is a modeling method based on NOAM that uses architecture decomposition and refinement as the basis to reduce design complexity, to provide smooth transition from informal to formal design, and to support incremental refinement and analysis. A case study using NOAM for FMS modeling is provided to show the applicability of our approach.

On the Design of the Seljuk-Amoeba Operating Environment

Building dependable distributed applications is not an easy task. Designers of such systems have followed two complementary approaches to reduce design complexity, namely: i) the use of appropriate developing tools; and ii) the choice of the most restrictive failure semantics possible for the components that form the system’s underlying execution layer. The Seljuk model uses these two approaches to specify a structured way of providing fault tolerance services in the context of distributed operating environments, thus facilitating the construction and execution of dependable distributed applications. In this paper we present the design of the Seljuk-Amoeba operating environment, which follows the Seljuk model to enhance the Amoeba distributed operating system with the provision of fault tolerance services

Entity-relationship and object-oriented model automatic clustering

Automatic clustering of semantic models allows a multilevel abstraction of the same reality and reduces design complexity. This paper is concerned with the development and application of automatic clustering of Entity-Relationship (E-R) diagrams and object models. This paper does not consider physical clustering which aims at improving performance of databases but deals with conceptual clustering whose objective is to facilitate the understanding of the database schema. We provide an automatization of conceptual schema clustering leading to a unification of past approaches. Automatization is achieved through the definition of semantic distances between concepts and the use of a clustering algorithm. For entity-relationship clustering, we define three different distances (visual, hierarchical and cohesive) depending on the semantic richness. Object model clustering is based on structural, semantic and communication characteristics of objects. Our approach has been implemented and applied to a great number of examples, leading to interesting results. Applications of automatic clustering in several areas and their potential as a communication, documentation and design tools for E-R diagrams and object oriented models are described and discussed.

Classification and representation of design knowledge for circulating fluidized bed boiler

The knowledge components and the solution heuristics used by expert designers of Circulating Fluidized Bed Boilers (CFBB) have been analysed using a knowledge-based approach. Techniques for knowledge acquisition have been found to be effective for structuring the design process, and formalizing the domain knowledge which had initially been found to be less structured compared to that required for the design of more conventional equipment. It has been shown that design automation of CFBB requires some unique features arising primarily because the equipment is complex and its technology is still evolving. Designers tend to adopt a stepwise refinement procedure consisting of a configuration synthesis step, preliminary design phase and a detailed design phase. Designers often utilise data and experience of previous successful designs. An interesting aspect of the design process is the use of constraints as a means of reducing design complexity and as a substitute for optimisation. The paper also describes the features, structure, knowledge representation and problem-solving aspects of an expert system which has been developed for the preliminary design of a CFB boiler using the methodology and knowledge components of expert designers. A conventional expert-system shell enhanced with supportive paradigms like approximate matching, experience tables, numerical computation and database has been used for the implementation. The expert designer software encodes design knowledge in production rule and experience table form. This provides the capability to assume default values of selected parameters (when the user fails to provide them) obtained from the so-called “experience tables” of previous successful designs by an approximate matching technique. Thus, evolving design experience can be incorporated.

Neurofuzzy Controllers

Fuzzy modeling and control is a technique for handling qualitative information in a formal way. The greater simplicity of implementing fuzzy control systems may reduce design complexity and solve classes of previously intractable problems. Neural nets have come to mean architetures that have massively parallel interconnections of single, neuronlike processors. In control systems, they where first introduced to learn input-output mappings. This paper reviews the underlying ideas and applications of fuzzy and neural control systems. Neurofuzzy control and decision systems that are being developed are particularly emphasized. The key ideas behind these systems are outlined, and currently avaiable hardware and support tools described. Finally, it is suggested how neurofuzzy systems may be used to construct control systems with improved capatibilities.

Four state asynchronous architectures

An approach is presented to high-performance asynchronous architectures offering significant advantages over conventional clocked systems, without some of the drawbacks normally associated with asynchronous techniques. As the level of integration increases, an asynchronous wavefront array designed using the techniques described will have three important advantages over the equivalent synchronous systolic array: faster throughput (rate at which data are clocked through a system), reduced design complexity, and greater reliability. The benefits and drawbacks of using the asynchronous technique are highlighted using three wavefront arrays: two one-dimensional multipliers, and a two-dimensional sorter. All three can be built using just one basic building block.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

An implementation supporting distributed execution of partitioned ada programs

This paper describes the implementation of a novel paradigm for building distributed application software in Ada. The entire application is written as a single program, which is partitioned for distributed execution after its design. The partitioning is expressed in a separate notation called the Ada Program Partitioning Language (APPL). A modified compilation system accepts an Ada program and an APPL specification for it as input, to produce a separate executable image for each node. There is considerable freedom in what Ada entities may be placed on different nodes. The two-phase design approach helps reduce design complexity, and allows experimentation with different strategies for allocating software to hardware without requiring software redesign. Our implementation is currently under the final stages of testing using a modified version of the Ada compiler validation test-suite.Section 1 presents an overview of our paradigm and the rationale behind it. Section 2 introduces APPL. Section 3 describes our current implementation. Section 4 discusses the question of what Ada entities should be distributable, and compares several alternatives. Finally, section 5 concludes the paper with pointers to future work.