Circuit Size Reduction Research Articles

Investigation in the PV Converter Smoothing Circuit Size Reduction vs. Loss in Energy Capturing

The Photovoltaic (PV) cell which can convert directly sunlight into electricity has a nonlinear power vs. voltage curve, and a digital controlled power converter is required to implement the Maximum Power Point Tracker (MPPT) function. This paper aims to investigate the influence of current ripple amplitude which results from the operation of power converter on the efficiency of capturing the available solar energy. By simulation, a tradeoff between the filter size, the current ripple amplitude and the solar energy capture efficiency is found.

Evaluation of Epoxy Flux for Use in Hearing Aid SMD Assemblies

Miniaturization of everyday products has been driving sales for some time and continues to fuel the consumer market. Everyone expects size reduction with each new product generation [1], [2]. Almost everything has electronics inside that must get smaller. There is no market demanding smaller devices that are faster, more capable, more feature-rich than that of the hearing aid industry. While radios, Bluetooth wireless systems and other accessories are added to hearing instruments feature lists, the consumer nonetheless continues to wish for them to be even smaller. Advancements in circuit fabrication, component shrinkage and die consolidation have aided the industry in satisfying this need. However, as this demand continues and even intensifies, current surface mount device assembly materials are becoming inadequate and the limiting factor for overall circuit size reduction; specifically, the die attachment, protection and reinforcement process is limiting how small hearing aid circuits can be. For hearing aids, the addition of more features and connection to more accessories each require a number of integrated circuits and associated passives attached to a flexible circuit. These circuits are invariably bent and twisted during assembly, up to 180°, requiring the integrated circuit solder joints to be reinforced by underfilling to prevent detachment. Unfortunately, the underfilling process is time-consuming and the capillary action necessary for its success is finicky. Even more unfavorably, a designated “keep out” area for other components must surround the die to be underfilled to allow for the dispensing equipment to access the die, reducing the useable board space and limiting the overall possibility of circuit size reduction. Additionally, the underfill material must stay away from circuit board edges and areas to be bent during final assembly. In an attempt to increase useable circuit board space, decrease overall circuit board size, and reduce assembly steps, the application of two epoxy flux materials for die attach fluxing and underfilling of hearing aids was evaluated. Epoxy flux is a relatively new material, which combines the functionality of flux and underfill into a single step. Epoxy flux's application, while eliminating steps, would more significantly eliminate the necessary “keep out” areas around die and allow for more densely placed surface mount components. The epoxy flux materials were applied by both printing and dipping, and then evaluated using x-ray imaging, scanning acoustic microscope imaging, die peel testing, multiple reflow integrity testing and die shear testing.

Reduction of Components in Cascaded Transformer Multilevel Inverter Using Two DC Sources

In this paper a novel cascaded transformer multilevel inverter is proposed. Each basic unit of the inverter includes two DC sources, single phase transformers and semiconductor switches. This inverter, which operates as symmetric and asymmetric, can output more number of voltage levels in the same number of the switching devices. Besides, the number of gate driving circuits is reduced, which leads to circuit size reduction and lower power consumption in the driving circuits. Moreover, several methods to determination of transformers turn ratio in proposed inverter are presented. Theoretical analysis, simulation results using MATLAB/SIMULINK and experimental results are provided to verify the operation of the suggested inverter.

Microwave low phase noise oscillators using T-shaped stepped-impedance-resonator filters

Low phase noise microwave oscillators using T-shaped step-impedance-resonator (TSIR) filters are proposed and experimentally verified. Instead of using a high-quality factor resonator to design an oscillator, the TSIR filter is embedded into the feedback loop as a frequency stabilisation element. As the oscillator is designed at the group-delay-peak frequency of the filter, one can improve the phase-noise performance. Moreover, to miniaturise the oscillator circuit size, the TSIR filter can be further evolved into a compact net-type filter by the folding technique. The developed oscillators using TSIR filters at 1 and 5.2 GHz have the measured phase noises of −131 and −132 dBc/Hz at 1 MHz offset frequency, respectively. On the other hand, as compared with oscillators using TSIR filters, using a net-type TSIR filter to develop the filter-based oscillator at 1 GHz can achieve a 38% circuit size reduction and a 4-dB phase noise improvement at 1 MHz offset frequency.

Generalized Two-Way Two-Section Dual-Band Wilkinson Power Divider With Two Absorption Resistors and Its Miniaturization

A generalized two-way two-section dual-band Wilkinson power divider with two absorption resistors and its size-reduced model are presented. Design equations for dual-band and arbitrary power division are derived from modified even- and odd-mode analysis. The frequency ratio of the lower and upper band frequencies must be lower than three. The channel bandwidth is presented as a function of frequency ratio with mathematical expressions. A coupled line section is introduced to reduce circuit size based on the assumptions of linear phase characteristics and equal phase velocities of the even and odd modes. Two two-way dual-band power dividers, one three-way planar dual-band power divider, and one size-reduced dual-band power divider were fabricated. Experimental results were in good agreement with predicted values.

방향성결합기의 소형화를 위한 가유전체 기판구조의 응용

This paper describes the design of size-reduced directional coupler using the artificial dielectric substrate and its increased effective permittivity. Directional couplers are widely used in measuring RF power indirectly and coupling signal power. Artificial dielectric substrates have higher effective dielectric constant than standard dielectric substrate due to the lots of metalized via-holes, and the increased effective permittivity results in size-reduction of circuits. As a design example, 15dB directional couplers are designed on the standard substrate and artificial dielectric substrate and their size are compared. The size of the directional coupler using the artificial dielectric substrate is only 1/3 of that designed using the standard substrate, while the performances are preserved. In addition, the measured performances of the size-reduced coupler are well agreed with the simulated ones. The measured coupling coefficient, matching, and insertion loss at 2GHz are -14.62dB, -24.1dB, and -0.38dB, respectively.

All-Digital Time-Domain Smart Temperature Sensor With an Inter-Batch Inaccuracy of $-{\hbox {0.7}} ~^{\circ}{\hbox {C}}-+{\hbox {0.6}}~^{\circ}{\hbox {C}}$ After One-Point Calibration

To get rid of the heavy burden of aspect ratio tuning, bias adjustment and porting problem among processes in full-custom or mixed-mode design, a fully digital smart temperature sensor realizable with 140 field programmable gate array (FPGA) logic elements was proposed for painless VLSI on-chip integrations. By simply replacing the cyclic delay line with a retriggerable ring oscillator for accuracy enhancement, modifying the gain of time amplifier from fixed to variable for one-point calibration support and adopting a second-order master curve for curvature correction in this paper, the proposed smart temperature sensor can achieve two thirds reduction in circuit size, at least four-fold improvement in power consumption and more than two-fold enhancement in accuracy. To demonstrate the performance under practical process variation, the sensor realized with as few as 48 FPGA logic elements for rapid prototyping was measured over 0°C to 100°C range for 20 test chips from batches spreading over 4 years. The measured inaccuracy is -0.7°C-+0.6°C which is superior to -1.8°C-+2.3°C of its full-custom predecessor with a third-order master curve and five test samples from one single batch. The accuracy is even better than those of full-custom sensors with two-point calibration. The conversion rate is around 4.4 kHz and the power consumption can be reduced to 175 nJ per conversion by increasing the number of delay stages in ring oscillator to 4608.

Frequency-Agile Patch Element Using Varactor Loaded Patterned Ground Plane

This paper presents, for the first time, a method to realize the concept of frequency agility on patch-type circuits, which have found more applications at very high frequencies because of its simple structure. A patterned ground plane has recently been proposed for size reduction of patch-type circuits making them more favorable at lower frequencies. An additional auxiliary patch on the ground plane is proposed in this paper as a mechanism to change the capacitance between the upper patch and ground plane. The patterned ground plane loaded with tunable capacitors is applied to the patch element to realize frequency agility. For demonstration, a frequency-agile rectangular patch hybrid coupler with a varactor loaded patterned ground plane is designed to operate over a frequency range of 50% (from 1.5 to 2.5 GHz) with good return loss, small amplitude imbalance, and quadrature phase characteristics.

Noise Analysis and Design of Low-Noise Bias-Offset MOS Transconductor

High integration and low power operation of integrated circuits make noise sensitivity high. Therefore, it is important to reduce noise of circuits. A bias-offset transconductor is known as a linear transconductor. It is expected that noise sensitivity of the transconductor becomes higher due to improvement of linearity and reduction of power dissipation. This paper proposes a design method to reduce noise considering high linearity, reduction of power dissipation and small circuit size.

A Class-F Power Amplifier With CMRC

This letter presents a novel harmonic control circuit (HCC) for class-F power amplifiers (PAs). A compact microstrip resonant cell (CMRC) is inserted between the transistor and the output fundamental matching network. Third harmonic open circuit condition and size reduction are achieved simultaneously. This scheme provides a straightforward and simple approach to design HCC. A class-F PA is designed and fabricated for demonstration. The measured maximum power-added efficiency (PAE) is 74% with 10 dB power gain near the 1 dB compression point.

Design of Compact 90$^{\circ}$ and 180$^{\circ}$ Couplers With Harmonic Suppression Using Lumped-Element Bandstop Resonators

Compact 3-dB 90° and 180° couplers with harmonic suppression using lumped-element bandstop resonators are proposed. The bandstop resonators are not only used to provide the high-pass and low-pass characteristics of conventional couplers, but also have a significant harmonic band rejection at the same time. Therefore, the required lumped-element inductors with a low quality factor are reduced as much as possible, enabling significant circuit size reduction. Further, minimum bulky via holes are employed in these topologies, thus carrying them out on the monolithic microwave integrated circuit is beneficial. Detailed design and theoretical analysis are presented for the proposed couplers with harmonic rejection. To validate the design concept, two proposed couplers implemented on an FR-4 printed circuit board at 2.45 GHz are demonstrated. Promising agreements between the simulation and measurement can be observed. Experimental results reveal that the 90° and 180° couplers suppressed the second harmonic below 26 and 30 dB, respectively, within the 0.6-dB amplitude imbalance and 2° phase error at the center frequency.

An Analysis of Multi-Layer Inductors for Miniaturizing of GaAs MMIC

Newly developed multi-layer inductors on GaAs three-dimensional MMICs are presented. We analyzed single-, double-, triple-, and quadruple-layer stacked-type inductors in what may be the first report on inductors on a GaAs MMIC with three or more layers. The performance of single- and multi-layer inductors was measured and calculated by electromagnetic field simulation. The multi-layer inductors produce 2-11 times higher inductance than that of conventional inductors on 2D-MMICs although they are the same size. This means that the proposed multi-layer inductors have smaller areas with the same inductances than those of conventional inductors. We also conducted the first-ever investigation of how performance factors such as parasitic capacitance, Q-factor, and self-resonant frequency are degraded in multi-layer inductors vis-a-vis those of conventional inductors. A microwave amplifier using multi-layer inductors was demonstrated and found to reduce circuit size by 20%.

Design of a Triple-Passband Microstrip Bandpass Filter with Compact Size

This paper presents the triplepassband microstrip bandpass filter (BPF) with compact size. Two sets of the coupled asymmetric stepped impedance resonators (SIRs) and uniform impedance resonators (UIRs) are arranged for generating the triple-passband properties. It is convenient to control the triple-passband properties by tuning the impedance ratio (K) and length ratio (γ) of the asymmetric SIRs. The UIRs are also employed to enhance the coupling between the coupled resonators at 3rd passband. The filter is designed at 2.4/5.2/8.2 GHz and achieves nearly 50% circuit size reduction compared with the previous works. This study provides a simple method to design a triple-passband filter with compact circuit size. Experimental verification is provided, and good agreement has been found between simulation and measurement.

Horizontal roller mill (Horomill ®) application versus hybrid HPGR/ball milling in finish grinding of cement

Industrial scale Horomill ® and hybrid HPGR/two-compartment ball mill applications at puzzolanic portland cement production were presented with emphasis on the general operational characteristics of the circuit configurations, size reduction and energy efficiencies of the Horomill ® and two-compartment ball mill grinding conditions. Horomill ® circuit configuration indicated to have advantages in terms of production of high strength cement as compared to Hybrid HPGR/two-compartment ball milling, depending on the classification performance of the separators influencing the circuit performance.

Magnetic Shape Memory Alloy and Application in Structural Vibration Control

Magnetic Shape Memory Alloys (MSMA) are attractive active materials because they have large strain (about 10%) as the classical shape memory alloys (SMA), but can provide a 100 times shorter time response, so, MSAM will be the ideal material of structural engineering vibration control. The main disadvantages of MSMA based actuators are the brittleness of the single-crystal material, the difficulty to apply the strong magnetic field required to obtain sufficient strain and the nonlinear behaviors. In this paper a novel MSMA based actuator changing the disadvantage of the hysteretic behaviors into an advantage. This device includes two pieces of MSMA material act in an opposite way. The hysteretic behavior of the material permits to keep a stable position when no current is applied. The use of current pulses permits also a reduction of the coil heating (Joule effect losses) and a reduction of the magnetic circuit size. The performances and characteristics of MSMA are between these of classical SMA and these of piezo-electric materials. A thermo-magneto-mechanical model of the actuator is currently in development in order to design an efficient control law well adapted to the specific MSMA properties.

Design of Multi-Valued Quaternary Based Analog-to-Digital Converter

Problem statement: The design of multi-valued quaternary based Analog-to-Digital Converter (ADC) circuit was presented. The ADC generates multi-valued logic outputs rather than the conventional binary output system to overall reduction in circuit complexity and size. Approach: Design was implemented using pipeline ADC architecture and was simulated using model parameters based on standard 0.13 µm CMOS process. Results: Performance analysis of the design showed desirable performance parameters in terms of response, low power consumption, and a sampling rate of 10 MHz at a supply voltage of 1.3V was achieved. Conclusion/Recommendations: The ADC design was suitable for the needs of mixed-signal integrated circuit design and can be implemented as a conversion circuit for systems based on multiple-valued logic design.

Miniaturized Bandpass Filters With Double-Folded Substrate Integrated Waveguide Resonators in LTCC

This paper proposes miniaturized bandpass filters with double-folded substrate integrated waveguide (SIW) resonators using multilayer low-temperature co-fired ceramic (LTCC) technology. Formed by inserting a metal plate with two orthogonal slots into the cavity, the double-folded SIW resonator is used for the circuit size reduction with its footprint about a quarter of the conventional TE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">101</sub> mode. With LTCC technology, there is more flexibility to organize the cavities of filters because of the 3-D arrangement. The vertically stacked cavities are coupled by ldquoLrdquo- or ldquoUrdquo-shaped slots, and if arranged horizontally, by an inductive window on the common sidewall or a suspended stripline between the cavities. Through experimental measurements and simulations at both the <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Ka</i> - <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> -bands, it has been demonstrated that the proposed filter has compact sizes and good frequency responses. The area of the fully stacked Chebyshev filter has 88% size reduction in comparison with a three-pole planar waveguide filter, while the vertically stacked quasi-elliptic filter has 74% size reduction in comparison with a four-pole planar waveguide filter.

Through-the-Wall Surveillance With Millimeter-Wave LFMCW Radars

The use of millimeter-wave radars allows a weight and size reduction of circuits and antennas, which is an important characteristic for Through-the-Wall Surveillance (TWS) applications. Furthermore, when using the millimeter-wave band, a large amount of bandwidth can be easily transmitted, given that the relative bandwidth is smaller. This leads to a high range resolution that allows for the discrimination of several targets that are very close in range, e.g., inside a room. The azimuth resolution is also improved due to the availability in this band of directive antennas with small dimensions. This paper studies the feasibility of using a millimeter-wave linear frequency-modulated continuous-wave radar in a TWS application. A TWS experiment in a real scenario has been done to demonstrate the validity of the theoretical analysis.

RF RAT-RACE COUPLERS WITH U-TYPE DGS MICROSTRIP ELECTROMAGNETIC BAND GAP ELEMENT

In this letter, an investigation of a novel compact rat-race hybrid coupler incorporating a U-type defected ground structure (UDGS) is presented. Served by this microstrip electromagnetic band gap element (MEBE) technology, the size of the coupler is reduced due to its slow-wave effect and its band-stop effect enables strong high-order harmonics rejection. In the meantime, the measured performance of the proposed coupler is comparable to that of a conventional microstrip hybrid coupler. This miniaturization and harmonic suppression technology has great potential application in MICs and MMICs to reduce circuit size, lower material cost and improve the overall performance of wireless communication systems.

Effective Design of Novel Compact Fractal-Shaped Microstrip Coupled-Line Bandpass Filters for Suppression of the Second Harmonic

Novel compact fractal-shaped microstrip coupled-line bandpass filters employing Koch curves for suppression of the second harmonic are proposed, and their effective design procedure is provided. The proposed filters are implemented and measured, and the measurement results show the proposed filters achieved a maximum harmonic suppression of more than 60 dB, and a maximum circuit size reduction of 31%.