A single-chip 2.4-Gb/s CMOS optical-receiver IC has been realized for the first time using 0.15-/spl mu/m gate bulk CMOS. The chip integrates a preamplifier, an automatic gain control, a phase-locked loop, and a 1:8 demultiplexer. This circuit has achieved a low power consumption of 104 mW (at 2.4 Gb/s, V/sub D/D=2 V), which is much smaller than that of conventional GaAs field-effect transistors and Si bipolar IC's. The design methodology to reduce digital-to-analog substrate cross-talk noise is discussed. Using this methodology, a low-cross-talk sensitive preamplifier circuit with a 5.9 GHz bandwidth and a 59-dB/spl Omega/ gain has been developed and integrated into a single-chip receiver IC.