Real-time Digital Signal Processing System Research Articles

Physics-Based LED Modeling and Nonlinear Distortion Mitigating With Real-Time Implementation

In this paper, a nonlinear model for Light Emitting Diodes (LEDs) inspired by semiconductor physics, and a corresponding post-compensator are implemented in a Field Programmable Gate Array (FPGA) for real-time Visible Light Communications (VLC). Our experiments demonstrate that the LED model effectively characterizes the dynamic LED nonlinearity, including the memory effects. The output signal of this nonlinear LED model shows a good resemblance with the measured LED output. In addition, a dedicated nonlinear equalizer, say, a post-compensator, inspired by this LED physical model can mitigate the nonlinear distortion substantially. Thereby it facilitates high data rate over the bandwidth-limited LED. It shows that the nonlinear compensator is attractive for practical real-time digital signal processing systems due to its high performance and low complexity.

FPGA-based electronic system for the control and readout of superconducting quantum processors.

Electronic systems for qubit control and measurement serve as a bridge between quantum programming language and quantum information processors. With the rapid development of superconducting quantum circuit technology, synchronization in a large-scale system, low-latency execution, and low noise are required for electronic systems. Here, we present a field-programmable gate array (FPGA)-based electronic system with a distributed synchronous clock and trigger architecture. The system supports synchronous control of qubits with jitters of ∼5ps. We implement a real-time digital signal processing system in the FPGA, enabling precise timing control, arbitrary waveform generation, in-phase and quadrature demodulation for qubit state discrimination, and the generation of real-time qubit-state-dependent trigger signals for feedback/feedforward control. The hardware and firmware low-latency design reduces the feedback/feedforward latency of the electronic system to 125ns, significantly less than the decoherence times of the qubit. Finally, we demonstrate the functionalities and low-noise performance of this system using a fluxonium quantum processor.

Design and implementation of a real-time digital signal processing system using PIC24 microcontroller and wireless GUI control

In this paper, a real-time Digital Signal Processing (DSP) system is designed and implemented by using a PIC24 microcontroller circuit and a C# GUI application running on PC. The wireless communication between the PIC24 subsystem and the GUI subsystem is implemented via Bluetooth modules on the subsystems. The DSP system first digitises an input square signal of a certain frequency through an on-chip ADC of PIC24 microcontroller, then uses different FIR digital filters to extract certain harmonics of the input signal, and outputs it as a sinusoidal signal to an on-chip DAC as well as sends the sampled data and filtered data over Bluetooth to the GUI. The GUI, besides plotting the input and output wave forms, can provide a means of controlling all functionalities of the system through a developed communication protocol. The design and implementation for the proposed DSP system are successfully demonstrated by experimental results. The hardware and software co-design method can be extended to other industrial applications and used as a good paradigm of engineering education for college students.

Design and implementation of a real-time digital signal processing system using PIC24 microcontroller and wireless GUI control

In this paper, a real-time Digital Signal Processing (DSP) system is designed and implemented by using a PIC24 microcontroller circuit and a C# GUI application running on PC. The wireless communication between the PIC24 subsystem and the GUI subsystem is implemented via Bluetooth modules on the subsystems. The DSP system first digitises an input square signal of a certain frequency through an on-chip ADC of PIC24 microcontroller, then uses different FIR digital filters to extract certain harmonics of the input signal, and outputs it as a sinusoidal signal to an on-chip DAC as well as sends the sampled data and filtered data over Bluetooth to the GUI. The GUI, besides plotting the input and output wave forms, can provide a means of controlling all functionalities of the system through a developed communication protocol. The design and implementation for the proposed DSP system are successfully demonstrated by experimental results. The hardware and software co-design method can be extended to other industrial applications and used as a good paradigm of engineering education for college students.

Design of efficient quantum Dot cellular automata (QCA) multiply accumulate (MAC) unit with power dissipation analysis

Quantum dot cellular automata (QCA) is a hopeful technology in the field of nanotechnology that seems to suite well with signal-processing needs. It is concerned with great interest because of its benefits such as ultra-low power consumption, small size and can operate at one Terahertz. The multiply accumulator (MAC) unit is considered as one of the essential operations in digital signal processing (DSP). In the real-time DSP systems, several applications like speech processing, video coding, and digital filtering etc. require MAC operations. However, the power dissipation and area are the most significant aspects in these systems. Here, the authors design low power MAC unit based on QCA technology. QCADesigner version 2.0.3 is used to validate the accuracy of the proposed circuit. The reliability of this unit is taken at different temperatures. The power dissipation is estimated using QCAPro tool. The total power consumed by this unit is 2.183 μW. The proposed circuit has 90% improvement in terms of power over complementary metal–oxide–semiconductor (CMOS) circuits. Since the works in the field of QCA logic signal processing has started to progress, the suggested contribution will give rise to a new thread of research in the field of real-time signal and image treatment.

Real-time EEG-defined excitability states determine efficacy of TMS-induced plasticity in human motor cortex

BackgroundRapidly changing excitability states in an oscillating neuronal network can explain response variability to external stimulation, but if repetitive stimulation of always the same high- or low-excitability state results in long-term plasticity of opposite direction has never been explored in vivo. Objective/hypothesisDifferent phases of the endogenous sensorimotor μ-rhythm represent different states of corticospinal excitability, and repetitive transcranial magnetic stimulation (rTMS) of always the same high- vs. low-excitability state results in long-term plasticity of different direction. MethodsState-dependent electroencephalography-triggered transcranial magnetic stimulation (EEG-TMS) was applied to target the EEG negative vs. positive peak of the sensorimotor μ-rhythm in healthy subjects using a millisecond resolution real-time digital signal processing system. Corticospinal excitability was indexed by motor evoked potential amplitude in a hand muscle. ResultsEEG negative vs. positive peak of the endogenous sensorimotor μ-rhythm represent high- vs. low-excitability states of corticospinal neurons. More importantly, otherwise identical rTMS (200 triple-pulses at 100 Hz burst frequency and ∼1 Hz repetition rate), triggered consistently at this high-excitability vs. low-excitability state, leads to long-term potentiation (LTP)-like vs. no change in corticospinal excitability. ConclusionsFindings raise the intriguing possibility that real-time information of instantaneous brain state can be utilized to control efficacy of plasticity induction in humans.

Detection of Magnetic Fields Highly Attenuated by the Skin Effect Through a Ferrous Steel Boundary Using a Super Narrow-Band Digital Filter

A complete instrumentation system is described that is capable of launching alternating magnetic fields through a large mild steel plate that is 2 mm in thickness and detecting them on the face opposite from the transmitter with remarkable signal-to-noise ratios. Results for signal frequencies ranging between 4.5 and 13 kHz are reported. The skin depth at 9 kHz for the steel used is approximately 137 mum. The detection of the minute fields arriving at the receiving coil is made possible by the use of digitally synthesized input signals, low-noise amplification, and, in particular, the use of a powerful real-time digital signal processing system that isolates the signal of interest using a super narrow-band filter and very high levels of distortion-free gain. Although traditional methods of weak signal detection, such as lock-in amplification, may also be applied in this context, the digital approach discussed here is both more cost effective and flexible, allowing the simultaneous detection of multiple frequencies.

Dynamically Reconfigurable Embedded Architecture-An Alternative To Application-Specific Digital Signal Processing Architectures

Emerging trends in design of real-time digital signal processing systems indicate that in the future, a significant amount of performance improvement can be achieved using dynamically reconfigurable embedded architectures consisting of reconfigurable, general-purpose components. Although embedded real-time systems have long been prevailing in our society, no firm scientific base has been established yet to handle timing requirements in a systematic manner in real-time embedded computing. Because of this lack of the scientific base, many embedded systems have been designed in an ad hoc manner and most of them have been customized to specific applications, showing inflexibility for the other type of applications. This paper proposes a dynamically reconfigurable embedded architecture which bridges the gap between the embedded system and ASICs. This architecture combines a reconfigurable hardware processing unit with a software programmable processor. The main goal is to take advantage of the capabilities of both resources. While the processor takes care of all sequential computations the reconfigurable hardware takes specialized vector operations. With such integrated system architecture, specific properties of applications, such as parallelism, regularity of computation and data granularity can be exploited by creating custom operators, pipelines and interconnection pathways. To handle the conflicting requirements of being a flexible architecture and implement some application-specific algorithms, a dynamically reconfigurable embedded architecture is proposed. The proposed architecture consists of arithmetic operation-level configurable modules interconnected through multiple data buses that can be logically configured to form one or more pipelines before a specific application is initiated and remains unchanged till the completion of the application. This architecture is targeted at high throughput and real time signal processing applications. The idea of dynamic reconfiguration - changing a circuit while it is operating - is exploited. In particular, we illustrate how dynamic reconfiguration can achieve significant performance improvement.

An axisymmetric guided wave encoded system for flood detection of oil rig cross-beams

A novel and completely autonomous guided wave system for flood detection in the hollow cross-beam members of offshore steel oil rigs is presented. Underwater non-destructive testing methods such as ultrasound have been used to inspect for the presence of seawater in these applications, often in conjunction with remote operating vehicles. Alternatively, a monolithic PZT guided wave transducer which can be permanently attached to a sub-sea installation and that can be powered by the action of the seawater is now being developed. Upon activation, the transducer transmits an ultrasound-encoded signal to a receiver, in the form of a real-time digital signal processing system at the surface level. Experiments have been carried out using a jointed steel pipe structure, 10 m in length, 0.5 m in diameter and 16 mm in thickness, completely immersed in seawater. The transmitter was attached to the inner wall of a spur pipe and configured to generate narrow bandwidth, low frequency ultrasonic chirp signals, coupled to the pipe as an axisymmetric mode. Results confirmed that although some attenuation occurs, the system signal processing system successfully identified the signals above the background noise.

An advanced real-time digital signal processing system for linear systems emulation, withspecial emphasis on network and acoustic response characterization

A fast digital signal processing (DSP) system is described that can perform real-timeemulation of a wide variety of linear audio-bandwidth systems and networks,such as reverberant spaces, musical instrument bodies and very high order filternetworks. The hardware design is based upon a Motorola DSP56309 operating at 110million multiplication-accumulations per second and a dual-channel 24 bit codecwith a maximum sampling frequency of 192 kHz. High level software has beendeveloped to express complex vector frequency responses as both infinite impulseresponse (IIR) and finite impulse response (FIR) coefficients, in a form suitable forreal-time convolution by the firmware installed in the DSP system memory. Analgorithm has also been devised to express IIR filters as equivalent FIR structures,thereby obviating the potential instabilities associated with recursive equations andnegating the traditional deficiencies of FIR filters respecting equivalent analoguedesigns. The speed and dynamic range of the system is such that, when sampling at48 kHz, the frequency response can be specified to a spectral precision of 22 Hz;when sampling at 10 kHz, this resolution increases to 0.9 Hz. Moreover, it is alsopossible to control the phase of any frequency band with a theoretical precision of10−5 degrees in all cases. The system has been applied in the study of analogue filter networks,real-time Hilbert transformation, phase-shift systems and musical instrument bodyemulation, where it is providing valuable new insights into the understanding ofpsychoacoustic mechanisms.

Design and Implementation of High-Performance RNS Wavelet Processors Using Custom IC Technologies

The design of high performance, high precision, real-time digital signal processing (DSP) systems, such as those associated with wavelet signal processing, is a challenging problem. This paper reports on the innovative use of the residue number system (RNS) for implementing high-end wavelet filter banks. The disclosed system uses an enhanced index-transformation defined over Galois fields to efficiently support different wavelet filter instantiations without adding any extra cost or additional look-up tables (LUT). A selection of a small wordwidth modulus set are the keys for attaining low-complexity and high-throughput. An exhaustive comparison against existing two's complement (2C) designs for different custom IC technologies was carried out. Results reveal a performance improvement of up to 100% for high-precision RNS-based systems. These structures demonstrated to be well suited for field programmable logic (FPL) assimilation as well as for CBIC (cell-based integrated circuit) technologies.

Generalised intermediate transforms: methods of computation and potential applications

The Generalised Transform theory defines a class of orthogonal transforms that include the Fourier and Walsh transforms together with a set of transforms known as Intermediate Transforms. The latter are less familiar and are yet to receive serious attention regarding applicability and methods of computation. This paper attempts to address these two issues via the development of efficient methods for computation of the Intermediate Transforms suitable for both software and hardware implementation, and the identification of an application area for these transforms. Based on a radix-2 FFT algorithm, a novel and easy to implement generic method for fast computation of any member of a given Generalised Transform set, has been developed. A potential area of application in real-time digital signal processing and communication systems has been identified, investigated and assessed quantitatively and qualitatively. This is based on employing the Intermediate Transforms as alternative tools to the discrete Fourier transform trading accuracy for speed. Computational speed advantages of the Intermediate Transforms over the FFT are demonstrated by a new high-speed, two-butterfly realisation method suitable for real-time, hardware processor-based implementation.

Design and evaluation of an inductiveQ-detection sensor incorporating digital signal processing forimaging of steel reinforcing bars in concrete

A new inductive sensor is described, based on the principle ofQ-detection and incorporating a real-time digital signalprocessing system, for high-sensitivity detection andimaging of steel reinforcing bars embedded in concrete. TheQ-detection method is widely employed in devices such as metaldetectors and cover meters, and exploits the phenomenon wherebythe real component of the impedance of coil radiating atime-varying magnetic field increases in the presence of aconductive target, as eddy currents are induced within thematerial. In this case, the sensor is employed to detect andimage steel reinforcing bars or cables, in order to establishtheir condition and hence provide information on the state ofhealth of a reinforced concrete structure. Q-detection sensorsare part of a wider family of eddy current sensor, whosesensitivity falls off rapidly as the distance to the targetincreases. By incorporating into the design an advancedreal-time digital signal processor that performs hundreds ofaverages per sample point, it is possible to increasesignificantly the range of the sensor without incurring a timepenalty respecting the scan duration. Furthermore, the resultsshow that this new system provides very much highersignal-to-noise ratios and cleaner images than previous designs.Using a small 15 mm diameter sensor coil, it is possible todetect steel plate to a depth of 300 mm, a 16 mm steelreinforcing bar to a depth of 150 mm, and a 15 mm steel ballbearing to a depth of 100 mm.

Digital signal processors for a signal processing laboratory

An undergraduate level laboratory course on digital signal processors and their use in real-time digital signal processing (DSP) systems is described. Special emphasis is put on some practical issues such as execution time optimization, finite wordlength effects and a pipelined strategy as a suitable way to improve the performance of a real-time DSP system. The primary purpose of the laboratory is a better understanding of the theoretical concepts and a more active participation of the students in the course. The authors think that this paper will be of interest to those teaching related courses such as Introduction to DSP, Digital Signal Processing, Real-time DSP, Microprocessors and Hardware/Softmare Interaction. The well-known Texas Instruments' TMS320C2x and TMS320C5x fixed-point processors are used as the fundamental tool in the lab experiments and the TMS320C3x is suggested as a low-cost floating-point alternative. Enough detail is provided in the paper to duplicate certain parts of the experiments.

Real-Time Vision-based Detection of Waiting Pedestrians

This paper presents a real-time digital signal processing system to detect the presence of pedestrians waiting to cross an intersection. A pedestrian detection algorithm is developed and implemented on a Texas Instruments TMS320C40 digital signal processor (DSP) chip such that videosignals captured and transmitted from an actual intersection are processed in real-time. The detection algorithm consists of a background update and background subtraction components applied to image blocks. The background update is done in order to cope with brightness changes that occur in actual outdoor scenes. In addition, waiting and moving pedestrians are distinguished by using the temporal changes of image block intensities. The results obtained indicate that this DSP implementation provides an acceptable detection rate for this traffic management problem.

GRAPE: a CASE tool for digital signal parallel processing

The use of computer-aided software engineering (CASE) tools for stream-oriented real-time digital signal processing (DSP) applications is discussed. These applications are characterized by a continuous stream of data samples or a continuous stream of blocks of data samples arriving at the processing facility at time instances completely determined by the outside world. An overview of existing development tools for DSP is given. The CASE tool GRAPE (graphical programming environment), which allows for easy programming, compiling, debugging and evaluating of high-frequency real-time DSP systems, is presented. Its main distinctive feature is that the tool spans the whole design process, ranging from analysis over simulation and emulation up to implementation on general-purpose DSP multiprocessors or integration on an application-specific integrated circuit (ASIC). The DSP multiprocessor can be the target hardware or can be used for real-time emulation or accelerated simulation of an ASIC.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Realtime digital signal processing system using a parallel processing architecture

A low cost, high-speed, general-purpose ditigal signal processing system was constructed using the TMS32010 digital signal processor. The system was designed with simplicity, compactness, flexibility and expandibility in mind. A parallel processing architecture was adopted to achieve realtime performance. Four processors were used in the prototype system, but this can be expanded easily. Interprocessor data transfer and communications with the host computer are facilitated via a single common bus and a bank of shared memory. A one-dimensional digital FIR filter and a realtime FFT program were used to evaluate the performance of the system. In addition, a realtime spectrogram was implemented as an application example.

VLSI Array processors

High speed signal processing depends critically on parallel processor technology. In most applications, general-purpose parallel computers cannot offer satisfactory real-time processing speed due to severe system overhead. Therefore, for real-time digital signal processing (DSP) systems, special-purpose array processors have become the only appealing alternative. In designing or using such array Processors, most signal processing algorithms share the critical attributes of regularity, recursiveness, and local communication. These properties are effectively exploited in innovative systolic and wavefront array processors. These arrays maximize the strength of very large scale integration (VLSI) in terms of intensive and pipelined computing, and yet circumvent its main limitation on communication. The application domain of such array processors covers a very broad range, including digital filtering, spectrum estimation, adaptive array processing, image/vision processing, and seismic and tomographic signal processing, This article provides a general overview of VLSI array processors and a unified treatment from algorithm, architecture, and application perspectives.