Reactive Ion Etching Lag Research Articles

Etching High Aspect Ratio Silicon Trenches

Small ground rule (<0.175 μm), high aspect ratio (feature size to depth ratio >40) trenches in silicon are necessary to achieve required values of cell capacitance in the fabrication of charge-storage capacitors in dynamic random access memory devices. Etching of trenches suffers from a dynamic reactive ion etching (RIE) lag mechanism caused by constriction of trench openings during the etch process. Also, at high aspect ratios (accentuated by constriction of trench openings), reduced ion energy and etchant species flux to the trench bottom (etch front) results in slower etch rates leading to etch stop. This dynamic RIE lag effect and potential etch stop pose significant challenges towards obtaining deeper trenches. In this paper, two methods are proposed to minimize these problems. Short duration cleaning steps, predominantly etching in nature without any builtin deposition component, are used intermittently during the multistep etching sequence. Mask selectivity is preserved as these cleaning steps do not contribute significantly to the mask etch rate. The first method decreases the constriction of the trench opening by thinning the sidewall deposition, thus partially restoring the design dimension of the trench opening. The second method removes the etch-stop or blocking layer at the bottom of the trench without significantly contributing to sidewall thinning. These methods increase the differential etch rate of silicon at high aspect ratios, thereby help achieve the higher silicon depths required to meet the manufacturing process tool utilization targets. © 2003 The Electrochemical Society. All rights reserved.

Critical tasks in high aspect ratio silicon dry etching for microelectromechanical systems

The process of pattern transfer of desired topological features into silicon plays a critical role for the production of microelectronic and photonic devices, and micro- and nanoelectromechanical systems. Any deviation from the desired shape of the pattern limits density, yield, and reliability of these devices. Gas reactivity, pressure, ion, electron, and reactant transport to the surface, and product transport away from the surface, have all been identified as important issues that control the microscopic uniformity in high aspect ratio etching. When etch-inhibiting chemistry by the gas chopping deep reactive ion etching (RIE) was employed, it caused enormous complications in the scaling of etching rates, with increasing aspect ratio. Using an energy-resolving quadrupole mass spectrometer assembled into the cathode, specially designed test features, and etching simulation models, we establish the link between etch process parameters such as pressure, rf power, etching gas chemistry, temperature, and the physical and chemical process parameters like energy and angular distribution of ions and neutrals, radical sticking, and surface charging. The most significant effects like RIE lag, notching, bowing, faceting, microtrenching, profile shape dependence, etc. will be discussed in this article. 2003 American Vacuum Society.

Patterning issues for the fabrication of sub-micron memory capacitors' electrodes

This paper describes some of the key issues associated with the patterning of metal electrodes of sub-micron (especially at the critical dimension (CD) of 0.15 μm) dynamic random access memory devices. Due to reactive ion etching lag, the Pt etch rate decreased drastically below the CD of 0.20 μm and thus K-th storage node electrode with the CD of 0.15 μm could not be fabricated using the Pt electrodes. Accordingly, we have proposed novel techniques to surmountly-the above difficulties. The Ru electrode cannot for the stack-type structure is introduced and alternative multischemes based on the introduction of the concave-type selfstructure upto using semi-Pt or Ru as an electrode material are outlined respectively.

Simulation of inverse reactive ion etching lag

Inverse reactive ion etching (RIE) lag was considered by a proposed model, which includes processes of adsorption, heterogeneous reactions, desorption, activation, sputtering, and stochastic mixing. Inverse RIE lag was explained by considering the neutral flux distribution at the groove bottom and assuming that arrival of C atoms from a plasma retards etching by causing surface passivation, whereas ion bombardment leads to etching. The thickness and composition of the altered layer at different points of groove during silicon etching in a fluorocarbon plasma were calculated. It was found that thickness of the altered layer increases with the increase of the microstructure width due to increased flux of C atoms at the groove bottom. Increased concentration of C atoms at the groove bottom reduces etching rate in the vertical direction.

Silicon dioxide etching yield measurements with inductively coupled fluorocarbon plasmas

Oxide etching yield has been measured directly with inductively coupled fluorocarbon plasmas. The yields measurement technique of this work can provide useful information for feature profile evolution modeling, which is essential to understand various issues in oxide etching such as reactive ion etching (RIE) lag, inverse RIE lag, etch stop, microtrenching, bowing, etc. Etching and deposition yields per ion were measured using quartz crystal microbalance (QCM) as a function of ion bombardment energy, ion-to-neutral flux ratio, and ion-impinging angle. C2HF5, C2F6, C2H4F2, and C4F8 were used for the oxide etching. Oxide etching mechanism with those gases is complex because etching and deposition are involved at the same time. In highly selective processes fluorocarbon deposition plays important role in determining etching characteristics. Two fluorocarbon deposition mechanisms are identified in this work: neutral deposition and ion-enhanced deposition. The low-energy ions are believed to enhance the deposition rates by creating active sites and fluorocarbon neutrals deposit on the active sites with higher sticking probability. A surface kinetic model is suggested to explain the ion-enhanced mechanism and shows good agreement with experimental data. Angular yield measurement shows that when fluorocarbon deposition is relatively severe, etching yield decreases significantly as the incident angle increases and deposit fluorocarbon at a high incident angle above 60°.

Organic Low-k Dielectric Material Etching by CH3NH2/N2 Plasma

An etching process has been developed for an organic low-k dielectric material, FLARE, that uses a gas chemistry of CH3NH2/N2 in a magnetic neutral loop discharge (NLD) plasma system. The organic low-k etching can provide a normal-taper profile with no micro-trenching and little hard-mask erosion, which are necessary for fabricating Cu/organic low-k damascene multilevel interconnects. Inverse reactive ion etching (RIE) lag was observed under conditions that produced the normal-taper profile. We evaluated the amount of ions and radicals generated in CH3NH2/N2, CH4/N2, and H2/N2 plasmas by means of quadrupole mass spectrometry (QMS) and analyzed films deposited on a bare Si substrate in CH3NH2/N2, CH4/N2, and H2/N2 plasmas by using X-ray photoelectron spectroscopy (XPS). We found that a normal-taper etching profile was obtained when the C/N concentration ratio of the deposited film was about 2–3 in the CH3NH2/N2 plasma.

CH4/N2 Plasma Etching for Organic Low-k Dielectric Material

The etching of an organic low-dielectric-constant (low-k) material, FLARE, with gas mixtures of CH4/N2 and H2/N2 was investigated in a magnetic neutral loop discharge (NLD) plasma system. The hole-etching profile of FLARE with a SiO2 hard mask and reactive ion etching (RIE) lag characteristics (the etch rate depends on the hole size) were studied for hole diameters from 0.16 to 0.4 µm. We discuss the role of CH4 in organic low-k etching and consider the etching mechanism in a CH4/N2 plasma in comparison with that in a H2/N2 plasma. Etching with no RIE lag was achieved at a CH4 concentration of about 30% with a total flow of 100 sccm, pressure of 0.4 Pa, source power of 1000 W, and bias power of 200 W in a CH4/N2 plasma. FLARE etching profiles with a perpendicular or normal taper and no microtrenching were obtained with CH4 concentrations below about 70%. We used X-ray photoelectron spectroscopy (XPS) to evaluate films deposited on a Si substrate during etching under several plasma conditions to clarify the mechanism of the organic low-k material etching.

Investigation of in situ trench etching process and Bosch process for fabricating high-aspect-ratio beams for microelectromechanical systems

The etching processes and mechanisms for sidewall formation were investigated for the in situ trench etching and releasing process, using a magnetically enhanced reactive ion etcher (MERIE), and for the Bosch process, using an inductively coupled plasma (ICP) etcher. For the Bosch process, almost vertical sidewall profiles were obtained up to etching depth of ∼100 μm. The average height of the scallops on the sidewall was ∼70 nm and the average erosion underneath the mask was ∼0.4 μm, when trenches 50 μm deep were formed. This limited the fabrication capability of small feature sized microelectromechanical system structures of less than ∼1 μm. For the in situ processes using MERIE, the reactive ion etching (RIE) lag was significant when the etching depth reached ∼50 μm. The RIE lag was significantly reduced when the ICP was used at pressure below 50 mTorr. Scallops and undercuts were not observed when the in situ process was used. Anger electron spectroscopy and x-ray photoelectron spectroscopy analysis revealed that the sidewall passivation layer from the in situ process consisted of SiOx (1&amp;lt;x&amp;lt;2, where x varies with sidewall thickness) and small amount of F.

A study on the Pt electrode etching for 0.15 μm technologies

We have developed a high temperature Pt etching by using a titanium (Ti) mask layer in oxygen (O 2)-containing plasma. The high temperature Pt etching technique has been employed to fabricate a stacked capacitor with a critical dimension (CD) of 0.15 μm. Due to reactive ion etching (RIE) lag, the Pt etch rate decreased drastically below the CD of 0.20 μm and, thus, the storage node electrode with the CD of 0.15 μm could not be fabricated. Accordingly, we have proposed novel techniques to surmount the above difficulties.

Etching of SiO2 features in fluorocarbon plasmas: Explanation and prediction of gas-phase-composition effects on aspect ratio dependent phenomena in trenches

A model to calculate etching rates in SiO2 features in fluorocarbon plasmas is presented. The model can predict several aspect ratio dependent phenomena such as reactive ion etching (RIE) lag, etch stop, inverse RIE lag, and aspect ratio independent etching (ARIE) at least for a limited range of aspect ratio values. The model includes three components: (a) a surface model for open area etching of SiO2 (and Si) [Gogolides et al., J. Appl. Phys. 88, 5570 (2000)]; (b) a flux calculator, which calculates local fluxes on each elementary surface of the feature being etched; and (c) a coupling of the two models (a) and (b), the focal point of coupling being the simultaneous calculation of the neutral species fluxes and the corresponding effective sticking coefficients. The model is applied for trench etching and the gas phase conditions considered correspond to a generic fluorocarbon gas. A different approach is presented by which the gas phase composition is divided (i.e., mapped) into regions leading to (a) deposition, (b) RIE lag with no etch stop, (c) intense RIE lag and etch stop, (d) inverse RIE lag, and (e) ARIE. Based on the proposed model an explanation of the aspect ratio dependent phenomena and ARIE is attempted, and a comparison with experimental data is done. Two parameters were found to be important in this explanation: the polymer surface coverage at the bottom of the etched feature and the effective sticking coefficients of the neutral species on the sidewalls of the etched feature.

Method for Reducing Reactive Ion Etching Lag in MEMS Process

Method for Reducing Reactive Ion Etching Lag in MEMS Process

In situ measurement of aspect ratio dependent etch rates of polysilicon in an inductively coupled fluorine plasma

The etch rate of polysilicon in high aspect ratio structures has been studied in an inductively coupled fluorine based plasma (pure SF6). The change of the silicon etch rate with increasing aspect ratio [aspect ratio dependent etch rate or reactive ion etching (RIE) lag] has been measured in situ by interferometry. The experimental structures as well as the process conditions were chosen such that (i) the interaction of neutral fluorine atoms with the silicon surface determines the etch rate, (ii) the ion energy is minimized, (iii) the mass transport of neutrals is in a molecular flow (Knudsen) regime, and (iv) the interaction of the etch species with the sidewalls can be neglected. Under these conditions, the experimental findings indicate that the RIE lag effect is reduced for higher pressures and lower cathode temperatures, i.e., for higher fluorine atom coverages of the silicon surface. This is in agreement with the Knudsen transport model by Coburn and Winters [W. Coburn and H. F. Winters, Appl. Phys. Lett. 55, 2730 (1989)]. Probabilities for the reaction of fluorine atoms with the silicon surface between 0.03 and 0.11 can be derived when fitting the experimental data with this model. The findings reported in this work are of relevance for the formation of deep trench storage capacitors and polysilicon plugs. In particular, we show that we can control RIE lag and etch rate independently for the given process conditions.

Characterization of reactive ion etch lag scaling

Recent advances in ultralarge-scale integration have typically depended on reductions in etched feature size. This has motivated efforts to find etch processes that will precisely etch increasingly smaller features while retaining the ability to etch larger features. As feature sizes push below 0.25 μm, reactive ion etch (RIE) lag control becomes increasingly important. Knowing how RIE lag scales with feature size for a given process aids in determining if that process must be discarded and a new one developed. In those situations where a process cannot be discarded, an understanding of RIE lag scaling aids in predicting fabrication difficulties for a given device design. Using a minimal set of initial assumptions, it is shown that a relationship can be derived which relates etch rate to the time development of the feature aspect ratio. It is then shown that this relationship can be used to derive an expression for the etch depth as a function of time and feature size. The assumptions made are justified by phenomenological observation rather than by an assumed mechanism. This approach enhances the generality of the results obtained, thus making them useful for a variety of practical etch engineering applications.

Study of deep silicon etching for micro-gyroscope fabrication

Deep silicon etching technique can offer many advantages in microelectromechanical system (MEMS) fabrication because of its high etch rate, high aspect ratio and high anisotropic etching behavior comparing with the conventional reactive ion etching technique. In this study, the deep reactive ion etcher produced by Surface Technology Systems Limited (STS, UK) has been used to fabricate the micro-gyroscope. The effects of feature size of the structure, platen power and process pressure on etch rate and reactive ion etching lag have been studied. Micro-gyroscope has been fabricated by using the optimum etching conditions.

A geometric etch-stop technology for bulk micromachining

This paper describes a new fabrication method for thesimultaneous creation of multi-level single-crystalline siliconstructures, each with a different thickness. The method combines deep dryetching and wet anisotropic etching of silicon in order to avoid multipleback-side alignment steps and timed etches. The levels are defined in asingle lithographic step from the front side. The fabrication involvesetching of deep trenches from the front side of the wafer followed by arefill and etch back process. The final structure is defined by masklesswet etching of the bulk silicon. The progress of the anisotropic wet etchis impeded by the geometric pattern at the bottom of the trenches, andthus structures with various thickness ranging from ten to a few hundredmicrometres can be implemented. The effect of various design parameters,such as trench geometry, refill material and reactive ion etching lag, arediscussed and design rules are established. The capabilities of the methodare demonstrated by the fabrication of a number of devices, such as1200×1200×3.5 µm diaphragms supported by a 40 µmthick rim and (1800×10×3 µm) embedded hot-wire anemometerssuspended by a 0.2 µm thick dielectric bridge.

Fabrication of open stencil masks with asymmetric void ratio for the ion projection lithography space charge experiment

For the ion projection lithography space charge experiment [P.W.H. de Jager et al., J. Vac. Sci. Technol. B 17, 3098 (1999)] a suitable stencil test mask has been realized and used. This article addresses the stress engineering and fabrication process of this specific test mask with openings in the range of some few 100 nm up to some 100 μm. This large difference in stencil pattern dimensions causes reactive ion etching (RIE) lag (dependence of the etch rate on feature size and pattern density) during the fabrication process and considerable stress variations across the membrane field. The solution to these problems was by (i) implementing novel doping technologies to create variable thickness areas on the membrane serving as reinforcement and stress relief structures, and (ii) adjusting the design to feature sizes and pattern densities to the same order of magnitude for the e-beam lithography and RIE processing steps. The etching of the openings through the 3 μm thick Si membrane was done by inductively coupled plasma etching with gas chopping techniques. These methods as devoloped for this specific test mask can be used to improve the stencil mask technology in general.

Effects of fluorocarbon polymer deposition on the selective etching of SiO2/photoresist in high density plasma

A new periodic two-step process composing SiO2 etching with high bias radio frequency (rf) power and fluorocarbon deposition with low bias rf power was studied for the highly selective etching of SiO2 to photoresist (PR). In this experiment, the time scale of each step is longer than the conventional time-modulation technique in order to maximize the protection layer on PR and prevent the etch stop. Many works have focused on the gaseous chemical species especially CF2 radicals for selective surface reaction. However, normally utilizing only the difference of stoichiometric surface reaction, they inherently limit the etching conditions such as dependence on the chemical composition of PR, densities, and impurities of SiO2 layers. And these conventional processes severely suffer reactive ion etching lag or etch stop in high selective etching. The new process utilizes fluorocarbon deposition with low bias rf power to increase the mask selectivity by enhancing the difference between the polymer thickness on the mask and that on the bottom surface of hole. After the etching step, the polymer film remains only on the mask, and then the higher selectivity of SiO2 to PR can be achieved. In this article it has been investigated whether the polymer deposition in the suggested process is governed by aspect ratio of holes, surface temperature, bias rf, and microwave powers. The ratio of the amount of etching to deposition is a very important factor in determining the selectivity. With the process a small and deep contact etching with thin PR is possible without shortage of mask thickness with the mask selectivity improved from 6 to 20. We can also find that the etch rate of this new process does not depend significantly on the aspect ratio.

Plasma Properties of a Negative Ion Plasma Reactive Ion Etching System

In high density reactive ion etching (RIE) systems it has been found that there is an aspect ratio charging effect which causes damage, RIE lag and loss of ion current to the bottom of high aspect structures. It has been shown by a number of authors, that one way of reducing these effects is to reduce the electron temperature of the plasma which is above the wafer. We have characterized the plasma properties of a medium to high density plasma system which uses a magnetic filter in an inductively coupled plasma (ICP) to produce a low temperature negative ion plasma above the wafer. At 4 mTorr, the electron temperature of this negative ion plasma is 1/3 of that for the same system without the filter. We present uniformity data and electron temperature data versus pressure and magnetic potential.

Pattern shape effects and artefacts in deep silicon etching

Deep silicon etching in an inductively coupled plasma (ICP) reactor offers a high etch rate (7 μm/min), nearly vertical profile with simple oxide masking. Test structures with patterns of different sizes (from a few microns to over 100 μm) and shapes (square and circular holes and trenches of variable width/length) have been etched to depths up to 500 μm. Long narrow features are etched faster than wide short features, indicating the three-dimensional nature of the reactive ion etching lag. Experiments have been done for many different etch times in order to understand aspect ratio dependence of deep etching. Simple flow conductance model explains most of the observed aspect ratio and feature size dependence.

Deep Reactive Ion Etching of Lead Zirconate Titanate Using Sulfur Hexafluoride Gas

A deep reactive ion etching (RIE) technique that uses sulfur hexafluoride (SF6) gas has been developed for lead zirconate titanate (Pb(Zr,Ti)O3, PZT) three‐dimensional microfabrication from PZT ceramic blocks. The etching was performed by using an inductively coupled plasma that was generated in a narrow‐gap vacuum chamber. The etch depth was 70 µm with a maximum etch rate of 0.3 µm/min and a selectivity of PZT to the electroplated nickel mask of &gt;35:1. The sidewalls of the PZT structures were tapered, with base angles of ∼75°. Both positive RIE lag and unexpected ultrafine‐slit etching phenomena were observed.