Reactive Ion Etching System Research Articles

Effect of RF Powers and O2 Flow Rates on Etch Rate of SiO2 with Reactive Ion Etching System

Effect of RF Powers and O2 Flow Rates on Etch Rate of SiO2 with Reactive Ion Etching System

Simple and Rapid Monolayer Self-Assembly of Nanoparticles at the Air/Water Interface.

Colloidal crystals and their two-dimensional (2D) monolayers, which have been commonly applied in nanosphere lithography, have the potential to revolutionize many engineering disciplines; however, current production techniques are hampered by a restricted preparation area, laborious procedures, and the need for advanced equipment. We propose a self-assembly-driven, simple, and low-cost method to prepare 2D colloidal nanosphere monolayers with excellent repeatability across wide regions. The self-assembly capability of colloidal polystyrene (PS) nanospheres at the air/water interface was utilized to transfer the assembled monolayers onto a substrate. This innovative method combines the advantages of methods that permit deposition at the air/water interface, such as Langmuir and drop coating, in order to deliver defect-free, simple-to-install, and simple-to-apply deposition across vast regions. Using field emission scanning electron microscopy and atomic force microscopy, the resultant coatings were characterized. The size of the nanospheres was reduced using an oxygen plasma etch process in an inductively coupled plasma reactive ion etching system, and the reflectance properties of the substrates for various nanosphere sizes were investigated. By evaporation of a thin gold capping layer on the templates, their optical properties were compared using surface-enhanced Raman scattering spectroscopy. This work has the potential to expand the use of nanosphere lithography by offering a simple and reproducible method that eliminates the need for complicated experimental setups and reduces the amount of material required for monolayer coating, thus lowering the cost.

Formation of Si nanopillars through partial sacrificing in super passivation reactive ion etching

The vertical gate-all-around (VGAA) metal-oxide-semiconductor field-effect transistor (MOSFET) holds remarkable potential in the three-dimensional (3D) integrated circuits (ICs), primarily owing to its capacity for vertical integration. The Si nanopillar, a crucial channel in the VGAA MOSFET, is conventionally shaped via the reactive ion etching (RIE) system employing SF6/O2. Past studies have indicated that high O2 gas conditions in RIE often result in Si grasses irregular nanostructures, such as nanospikes on the bottom surface, due to over-passivation. However, this study revealed that ultrahigh O2 proportions (>70%), especially when combined with low chamber pressure, inhibit the development of Si grasses in the RIE system (termed as super passivation). Nevertheless, this scenario leads to the segmentation of the Si nanopillar. To address this issue, a proposed partial sacrificing method, achieved by sacrificing the upper segment of the nanopillar through prolonged processing time and reduced mask size, successfully yielded Si nanopillars without Si grasses. Furthermore, an empirical model was developed to elucidate how experimental parameters influence etching characteristics, encompassing etching rate and Si nanopillar shape, through a systematic examination of the RIE etching process. This research significantly contributes to the production of VGAA MOSFETs and 3D ICs.

Necking Reduction at Low Temperature in Aspect Ratio Etching of SiO2 at CF4/H2/Ar Plasma.

This study investigated the effect of temperature on the aspect-ratio etching of SiO2 in CF4/H2/Ar plasma using patterned samples of a 200 nm trench in a low-temperature reactive-ion etching system. Lower temperatures resulted in higher etch rates and aspect ratios for SiO2. However, the plasma property was constant with the chuck temperature, indicated by the line intensity ratio from optical emission spectroscopy monitoring of the plasma. The variables obtained from the characterization of the etched profile for the 200 nm trench after etching were analyzed as a function of temperature. A reduction in the necking ratio affected the etch rate and aspect ratio of SiO2. The etching mechanism of the aspect ratio etching of SiO2 was discussed based on the results of the surface composition at necking via energy-dispersive X-ray spectroscopy with temperature. The results suggested that the neutral species reaching the etch front of SiO2 had a low sticking coefficient. The bowing ratio decreased with lowering temperature, indicating the presence of directional ions during etching. Therefore, a lower temperature for the aspect ratio etching of SiO2 could achieve a faster etch rate and a higher aspect ratio of SiO2 via the reduction of necking than higher temperatures.

Air stable plasma passivation of GaAs at room temperature

GaAs surfaces require electrical and chemical passivation for semiconductor devices, but in order to have air stable passivation, high temperatures have been previously required in the passivation step. Here, we demonstrate air-stable, ex situ plasma passivation of GaAs using consecutive hydrogen and nitrogen plasmas at room temperature. No pre-clean using deoxidizing wet chemistry or other means is required. The hydrogen plasma step removes surface oxides and As, which leaves a Ga-rich layer that the nitrogen plasma then turns to GaN. The formed GaN layer efficiently passivates the surface. The plasma-passivated GaAs shows upto 5× room-temperature photoluminescence after 1 year, and room-temperature time-resolved photoluminescence demonstrates robust passivation even after 3 years, both comparisons to similarly aged unpassivated GaAs. Atomic force microscopy was used to confirm that the passivated surfaces can be made smooth enough for microelectronic applications. Grazing incidence x-ray diffraction indicated that the nitride films are amorphous, and energy-dispersive x-ray spectroscopy was used to estimate the nitrogen content. We used a common inductively coupled plasma reactive ion etching system for plasma passivation, thus enabling the rapid adoption of this technique.

Reactive ion Etching of SiO2 and Mo Sidewall Profile Process

This paper investigates the process parameters affecting the sidewall angle of Mo and SiO2 films based on the reactive ion etching (RIE) system, firstly, the photoresist mask with a certain sidewall angle was obtained by adjusting the hardening temperature and hardening time of the photoresist during the lithography process, and their effects on the sidewall angle of the photoresist mask were investigated. In the RIE etching of SiO2 and Mo, the etching gas type (CHF3, CF4, SF6), O2 flow rate, and their effects on the sidewall angle of SiO2 were adjusted to obtain the sidewall angle of SiO2 in the range of 15°~53°, During the RIE etching of Mo, the RF power, SF6 flow rate, and O2 flow rate were adjusted and their effects on the Mo sidewall angle were investigated, resulting in a range of 17.3° to 30.2° for the Mo sidewall angle. This is useful for the study of the thin film body acoustic resonator (FBAR) process.

Comparative investigation of anisotropic etches for polysilicon nanowire definition in thin film technology

We report a low-cost mass manufacturable route for polysilicon nanowire (NW) fabrication through comparative investigations of spacer etch techniques to realize nanowires from amorphous silicon (α-Si) layer. The process uses thin film technology and mature top-down microelectronics (linewidth > 10 μm). Anisotropic deep silicon etch process using the elevated plasma density of high-density low-pressure systems (HDLP) with a simultaneous flow of etchant SF6 and inhibitor C4F8 delivered nanowires with quarter circle shape. The nanowires are also characterised with significant sidewall striations and noticeable aggregation of polymers. HDLP etch system with a sequential flow of etchant SF6 and inhibitor C4F8 delivered a near rectangular nanowire shape. However, the generally good profile is marred with significant sidewall striations and accumulation of polymers at the tip of the etched sidewall. Shallow etch process using low density plasma in a cheap capacitively coupled reactive ion etch (RIE) equipment with a simultaneous flow of etchant SF6 and inhibitor O2 delivered nanowires with ideal rectangular shape. The nanowires have hardly visible sidewall striations and/or polymer. These results indicate that deep silicon HDLP etch processes albeit advanced and costly are not suitable for good quality nanowire definition using spacer etch from a thin film of α-Si layer. Low density plasma process with simultaneous flow of SF6 and O2 gases in relatively cheap RIE system provides high quality nanowires and hence, provides a simple, low cost, wafer scale mass manufacturable route for high quality polysilicon nanowire fabrication.

Low temperature photoluminescence study for identification of intersubband energy levels inside triangular quantum well of AlGaN/GaN heterostructure

A non-destructive method for extracting the true signatures of intersubband energy level states inside a single triangular quantum well for AlGaN/GaN heterostructure is presented. Herein, we report experiments showing light interaction with high-mobility two-dimensional electron gas (2DEG) in Al0.3Ga0.7N/AlN/GaN based HEMT structure using low-temperature photoluminescence spectroscopy. An interband transition from two-dimensional electron gas (2DEG) subbands to the valence band is identified. These observed transitions were confirmed by comparing the PL spectra of the as grown and top barrier layer etched samples. The luminance peak related to 2DEG disappeared when the top AlGaN barrier layer was removed using reactive ion etching (RIE) system. Furthermore, the emission peak data are also supported by a calculation based on a self-consistent solution of one-dimensional Poisson and Schrodinger equations. The three PL spectra peaks corresponding to the interband transitions from 2DEG subbands to the valence band were reported at 3.269, 3.356 and 3.438 eV respectively. The corresponding intersubband energy states inside the quantum well were extracted (simulated) with 87 (91) and 178 (186) meV energy spacing between E0 & E1 and E0 & E2 respectively. The temperature and excitation power-dependent PL measurement makes it easy to identify the transitions from the 2DEG subbands to valence bands.

55‐3: Development of Low‐Temperature Metal Dry‐Etching Equipment via ECR Plasma Source

This paper presents the dry etching performance and expectation of highly conductive thin metal films that are hardly etched at low temperature with conventional plasma dry etching equipment. Dry etching is performed using a combination of H2 and HCl gases in a reactive ion etching system with low temperature susceptor and electron cyclotron resonance (ECR) plasma source. We could achieve high electron temperature enough to dissociate and ionize H and Cl radicals from H2 and HCl molecules.

Surface bonding state of germanium via cyclic dry treatments using plasma of hydrogen iodine and pure oxygen gases

The effect of HI and O2 plasma treatments on a Ge surface is studied by X-ray photoelectron spectroscopy. Ge oxide on a Ge surface can be effectively removed at room temperature by remote HI plasma in inductively coupled plasma reactive ion etching system without substrate bias. The re-oxidation of oxide-free HI plasma-treated Ge has been performed sequentially by O2 plasma. By utilizing HI and O2 plasma treatment cyclically, we have proved the viability of Ge digital dry etching. Ge digital dry etching by controlling the plasma power and the processing time of HI and O2 plasma treatments will be the building block for achieving Ge atomic layer etching.

Selectively dry etched of p-GaN/InAlN heterostructures using BCI3-based plasma for normally-off HEMT technology

In this paper, an alternative selective dry etching of p-GaN over InAlN was studied as a function of the ICP source powers, RF chuck powers and process pressures by using inductively coupled plasma reactive ion etching (ICP RIE) system. A recipe using only BCI3-based plasma with a resulting selectivity 13.5 for p-GaN in respect to InAlN was demonstrated. Surface roughness measurements depending on the etching time was performed by atomic force microscope (AFM) measurement and showed that a smooth etched surface with the root-mean-square roughness of 0.45 nm for p-GaN and 0.37 nm for InAlN were achieved. Normally-off p-GaN/InAlN HEMT devices were fabricated and tested by using the BCI3-based plasma we developed.

Molybdenum nanopillar arrays: Fabrication and engineering

We report on the fabrication of molybdenum (Mo) nanopillar (NP) arrays with NP diameters down to 75 nm by means of deep-reactive ion etching at cryogenic temperatures. A variable-thickness Mo metal layer sputtered onto a Si3N4/Si substrate makes possible NPs with different lengths in a controllable manner. We demonstrate how our fabrication strategy leads to tunable cross-sections with different geometries, including hexagonal, cylindrical, square and triangular shapes, by using electron beam lithography on hydrogen silsesquioxane negative tone resist. To ensure well-defined facets and surfaces, we employ deep-reactive ion etching in a gas mixture of SF6 and O2 at cryogenic temperatures in an inductively coupled plasma reactive ion etching (ICP-RIE) system. These results represent an attractive route towards the realization of high-density Mo NP arrays for applications from nanoelectronics to quantum sensing and hydrogen evolution reaction catalysis.

Silicon Micro-Channel Definition via ICP-RIE Plasma Etching Process Using Different Aluminum Hardmasks

In this work, thermally evaporated aluminum (Al) was used as hardmask (HM) to obtain silicon microchannels (SiMCs), using an Inductively Coupled Plasma - Reactive Ion Etching (ICP-RIE) system, in SF6/Ar gas mixture environment. The channel depth must be greater than 50 μm, with a high aspect ratio. For this, Al HM lines were defined by photolithography and by Al wet etching on a silicon substrate. To improve the resistance against the ICP-RIE etching process, the Al HMs were treated with four different conditions: i) Al HM without treatment step (control sample); ii) with plasma nitridation (AlN/Al structure); iii) with thermal annealing (annealed Al film); iv) with plasma nitridation and annealing (annealed AlN/Al structure). After 100 min of ICP-RIE etching process, SiMC with depths of 90.6 μm, 95 μm, 91.2 μm, and 109 μm, respectively, were measured using a scan profiler system. As the main result, the annealed AlN/Al structure presented a high resistance against the ICP-RIE etching for 100 minutes. Furthermore, Scanning Electron Microscopy (SEM) images indicate an etch uniformity on the walls and bottom of the channels for all the samples. This parameter is a mandatory requirement to obtain the integrated microchannel liquid-cooling technology for heat sinks in photovoltaic cells and Complementary Metal-Oxide-Semiconductor microprocessors.

Removal of GaN film over AlGaN with inductively coupled BCl3/Ar atomic layer etch

Atomic layer etching (ALE) of thin film GaN (0001) is reported in detail using sequential surface modification by BCl3 adsorption and removal of the modified surface layer by low energy Ar plasma exposure in a reactive ion etching system. The estimated etching rate of GaN is ∼ 0.74 nm/cycle. The GaN is removed from the surface of AlGaN after 135 cycles. To study the mechanism of the etching, the detailed characterization and analyses are carried out, including scanning electron microscope (SEM), x-ray photoelectron spectroscopy (XPS), and atomic force microscope (AFM). It is found that in the presence of GaCl x after surface modification by BCl3, the GaCl x disappears after having exposed to low energy Ar plasma, which effectively exhibits the mechanism of atomic layer etch. This technique enables a uniform and reproducible fabrication process for enhancement-mode high electron mobility transistors with a p-GaN gate.

One-Step Etching Characteristics of ITO/Ag/ITO Multilayered Electrode in High-Density and High-Electron-Temperature Plasma.

This paper presents the dry etching characteristics of indium tin oxide (ITO)/Ag/ITO multilayered thin film, used as a pixel electrode in a high-resolution active-matrix organic light-emitting diode (AMOLED) device. Dry etching was performed using a combination of H2 and HCl gases in a reactive ion etching system with a remote electron cyclotron resonance (ECR) plasma source, in order to achieve high electron temperature. The effect of the gas ratio (H2/HCl) was closely observed, in order to achieve an optimal etch profile and an effective etch process, while other parameters—such as the radio frequency (RF) power, ECR power, chamber pressure, and temperature—were fixed. The optimized process, with an appropriate gas ratio, constitutes a one-step serial dry etch solution for ITO and Ag multilayered thin films.

Nanoscale etching of perovskite oxides for field effect transistor applications

The etching of epitaxially grown perovskite oxide BaSnO3 (BSO) and BaTiO3 (BTO) thin films is studied using Cl-based (BCl3/Ar) and F-based (CF4/Ar) plasma chemistries in an inductively coupled plasma reactive ion etching (ICP-RIE) system for the development of field effect transistors (FETs). It is found that the BCl3/Ar process has a time-independent and a higher etch rate and creates a smooth etched surface, while the etch rate of BSO and BTO in CF4/Ar plasma decreases with the etching time duration. For the BCl3/Ar etching process, the etch rate increases with both ion density and ion energy, suggesting the combination of chemical plasma etching and physical ion sputtering mechanisms. Using the Cl-based etching process, BaSnO3 and BaTiO3 heterojunction FETs are developed. The devices with a gate length of 1.5 μm have a saturation current density of 287.6 mA/mm, a maximum transconductance of gm = 91.3 mS/mm, an FET mobility of 45.3 cm2/V s, and a threshold voltage of −1.75 V. The etching processes developed in this work will enable further development of perovskite oxide heterostructure electronic devices.

Extremely vertical sidewall trench etching on silicon substrate and modelling etching using artificial neural network

The control of etching parameters e.g. RF power, gas flow rate, chamber pressure and bias voltage is critical for the modern semiconductor fabrication industry. It is quite benefit to clarify the correlation between parameters and predict the etching results on both scientific research and industrial fabrication. In this paper, we performed a combination of experimental and machine learning analysis to understand the importance of each parameter and the correlation between them. SF6 and O2 was employed in order to investigate the optimal condition for Si trench etching with vertical sidewall based on capacitively coupled plasma reactive ion etching system (CCP-RIE). Scanning electron microscopy (SEM) and atom force microscope (AFM) were separately applied to characterize the etching profile and measure the etching depth. According to the experimental results, the optimal recipe of etching trench with vertical sidewall on silicon substrate is proposed to be a mixture of 30 sccm SF6 flow rate and 20 sccm O2 flow rate with 240 W RF power under the pressure of 5.6 Pa. Machine learning method of artificial neural network (ANN) was conducted to analyze the correlation between etching parameters. Levenberg-Marquart back propagation algorithm with sigmoid activation function is adopted to train the ANN model. Results show that the ANN model can predict the etching rate and etching profile accurately with 0.99154 R-Value. The relative importance of each parameter was also identified by using Random Forest algorithm. The gas flow rate of SF6 is the most significant factor of etching rate, meanwhile the ratio of SF6 to O2 flow rate plays the most important role in etching profile control.

Micro‐/Nanopillars for Micro‐ and Nanotechnologies Using Inductively Coupled Plasmas

Herein, the plasma etching mask transfer of the resistance of e‐beam resists, both negative and positive, as well as nanoparticle masks and hard masks are investigated. Various microscale and nanoscale features are exposed under plasma etching chemistries and are examined through both Bosch and pseudo‐Bosch processes using an inductive‐coupled plasma‐deep reactive ion etching (ICP‐DRIE) system. The selection of masks transfer proposed in this work provides better flexibility and cost‐effective processing. The etch profile depending on plasma etching process and feature size is studied and highlighted. In particular, nanopillars are etched to a length of 10 μm and a diameter of 280 nm with a good aspect ratio (>30) yielding a selectivity of better than 100:1 and a satisfactory vertical profile.

Cl2/Ar based atomic layer etching of AlGaN layers

This paper reports on atomic layer etching of several III-N materials such as GaN, AlN, AlGaN, and InAlGaN based on a sequential surface modification by chlorine adsorption followed by a low energy Ar plasma exposure to remove the modified layer using a reactive ion etching system. A study on the influence of several parameters, such as gas flow rates, removal step duration, RIE power and number of cycles on the etch per cycle, and the root-mean-square roughness, is performed. Low etch per cycle from 0.17 to 1.85 nm/cycle, respectively, for AlGaN and GaN and surfaces as smooth as the as-grown samples were obtained. The developed process is intended to be used for normally off GaN-based high electron mobility transistor processing.

GaN Schottky Contact on the Pattern Sapphire Substrate with Reducted Threading Dislocation

INTRODUCTION Recently, the interest in high quality GaN films has in-creased, GaN and its alloys show good performance at high-power, high-frequency transistors. Because of large mismatches of lattice constant and thermal expansion between GaN epitaxial film and sapphire substrate, however, the high-density dislocation ranging from 108-1010cm-2 does degrade the diode performance profoundly. Thus, growth of GaN with low threading dislocation(TD) has been more and more important. The single-step growth on pattern sapphire substrate(PSS) has been widely used for fabrication of reliable high quality GaN films. To improve the Schottky diode’s performance, high TD density must be considered. Using the PSS technique, we can significantly reduce the TD density. For an ideal Schottky diode the I-V characteristic[1] is given by I=I0exp(qV/nkT) ． [1-exp(-qV/kT)] and I0=SAT2exp(-Фb/kT), In this work, the PSS method developed by ourselves[2] is used to improve the GaN epitaxial film quality, which is then applied to the fabrication of Schottky diode on the GaN film. At last, different pattern dimensions are compared to find an optimum GaN Schottky diode. DEVICE FABRICATION The PSS pattern was defined by Electron-Beam lithography system. The arrayed nanostructure was designed to be arranged on the commercial c-plane(001) sapphire substrate. The dimensions of the arrayed nanostructure are related to the quality of GaN and can be defined as dimension: 600nm, means spacing: 600nm, diameter: 600nm of the fabricated PSS hole array. Next, the reactive ion etching system(RIE) was used to transfer the pattern from photoresist to SiO2 mask, and then the mixed liquid of H2SO4(96%) and H3PO4(85%) was used to etch substrate at 230°C for 60 minutes to make a pyramid shape pattern. Metal-organic-chemical-vapor-deposition(MOCVD) was used to grow GaN thin films. The epitaxial growth began with a 25nm-thick GaN nucleation layer and then an insulating GaN of 4μm thickness as a device buffer layer. The buffer layer has a resistivity greater than 200MΩcm2 to prevent leakage. A 30nm unintentionally doped AlGaN layer and a 2nm GaN cap layer were then grown to complete the modulation doped structure. Schottky devices of both on the planar region and on the pattern region were fabricated on the same substrate for comparison as shown in Fig.1. The process began with mesa iso-selectively etch AlGaN/GaN to mesa etch for electrical isolation. After the dry-etch isolation, Ge/Ti/Al/Ti/Au(10/20/100/55/100nm) were evaporated and annealed at 860°C for 20sec to form source and drain ohmic contacts. THIN FLIM QUALITY ANALYSIS To analyze the quality of GaN thin films, Raman spectrum and EPD(Etching Pit Density) are jointly performed on AlGaN/GaN samples on the planar and pattern regions. The Raman shift and full-width-half-maximum(FWHM) of Raman spectrum were measured to compare the strain and quality of GaN on the planar region and the PSS region. As shown in the Fig.2-1, Raman shifts of the PSS region in different dimension is lower than the planar region and closer to freestanding GaN(567cm-1)[3], which means that the PSS region has less stress accumulation. Fig.2-2 shows that the FWHM trend is the same as Raman shift, which means the quality is improved as the PSS dimension goes down. The narrowest Raman FWHM implies the lowest-stress of GaN and thus the optimum crystal quality, while the widest Raman FWHM of the conventional planar region implies the worst crystal quality of GaN. The EPD experiment used H3PO4 at 230°C for 5 minutes. The dislocation density on the planar region is 3.87x106(cm-2), higher than 1.37x106(cm-2) on the pattern region. This proves that the FWHM of the Raman spectrum corresponds to the reliability of the crystal quality, and that our PSS method does improve the crystal quality. CONTACT RESISTANCE ANALYSIS Schottky contact resistance was measured as shown in Fig.4. As the PSS dimension goes down, the contact resistivity goes down. That is, the proposed GaN thin film on the pattern region has a better quality than that on the planar region. Also, the Schottky contact on the proposed pattern region has a lower resistivity than that on the conventional planar region. Conclusion We have fabricated high quality GaN thin films by MOCVD on the Pattern Sapphire Substrate(PSS). Both Raman spectrum and EPD show that the PSS can magnificently improve the GaN film quality. The defect density has a tendency to correlate with the electrical properties of the component. To reduce defect density and improve electrical performance, different pattern dimensions are designed in the Schottky diodes. By using our PSS technology, the EPD can be reduced from 3.87x106(cm-2) to 1.37x106(cm-2) and the Raman spectrum FWHM can be reduced from 2.46(cm-1) to 2.33(cm-1). Also, the Schottky contact resistivity can be reduced from 0.0657(Ωcm2) to 0.00266(Ωcm2). Figure 1