RAM Size Research Articles

Hybrid task scheduling strategy for cloud computing by modified particle swarm optimization and fuzzy theory

As the world is progressing towards more efficient computing and faster approaches, cloud computing is a popular computing model to such increasing requirements. In order to provide cost-effective executions in cloud environment, appropriate task scheduling strategy is necessary. This paper proposes a hybrid task scheduling algorithm named FMPSO that is based on Fuzzy system and Modified Particle Swarm Optimization technique to enhance load balancing and cloud throughput. FMPSO strategy at first considers four modified velocity updating methods and roulette wheel selection technique to enhance the global search capability. Then, it uses crossover and mutation operators to overcome some drawbacks of PSO such as local optima. Finally, this schema applies fuzzy inference system for fitness calculations. The input parameters for the proposed fuzzy system are length of tasks, speed of CPU, size of RAM, and total execution time. By adding these fuzzy systems, FMPSO strategy achieves the goal of minimizing the execution time and resource usage. We evaluate FMPSO algorithm using the CloudSim toolkit and simulation results demonstrate that the proposed strategy has a better performance in terms of makespan, improvement ratio, imbalance degree, efficiency, and total execution time comparing to other approaches.

AMOGA: A Static-Dynamic Model Generation Strategy for Mobile Apps Testing

In the past few years, mobile devices have been increasingly replacing traditional computers as their capabilities such as CPU computation, memory, RAM size, and many more, are being enhanced almost to the level of conventional computers. These capabilities are being exploited by mobile apps developers to produce apps that offer more functionalities and optimized performance. To ensure acceptable quality and to meet their specifications (e.g., design), mobile apps need to be tested thoroughly. As the testing process is often tedious, test automation can be the key to alleviating such laborious activities. In the context of the Android-based mobile apps, researchers and practitioners have proposed many approaches to automate the testing process mainly on the creation of the test suite. Although useful, most existing approaches rely on reverse engineering a model of the application under test for test case creation. Often, such approaches exhibit a lack of comprehensiveness as the application model does not capture the dynamic behavior of the applications extensively due to the incompleteness of reverse engineering approaches. To address this issue, this paper proposes AMOGA, a strategy that uses a hybrid, static-dynamic approach for generating user interface model from mobile apps for model-based testing. AMOGA implements a novel crawling technique that uses the event list of UI element associated with each event to dynamically exercise the events ordering at the run-time to explore the applications' behavior. Results of the experimental assessment showed that AMOGA represents an alternative approach for model-based testing of mobile apps by generating comprehensive models to improve the coverage of the applications.

Rancang Bangun Sistem Rekomendasi Pemilihan Smartphone Berbasis Web

With so many variations in the number of smartphones in the market makes it difficult to choose. Therefore, it is necessary to make a recommendation system that can help the process of selecting a smartphone. For the system of recommendation used the method weihgted product. Weighted product method is a method frequently used in the Multi- Criteria Decision Making. Weighted product method capable of finding the best sequence of several alternatives, with criteria price, size, type of OS, RAM size, processor speed, storage capacity, the ability of photography, and the battery capacity. To test user satisfaction is conducted survey of 30 respondents, with Likert scale and Cronbach Alpha. The figures obtained was 0.70, indicating that the system got quite good feedback from respondents.
 Keywords - recomended system, smartphones, weighted product.

An analysis on the performance of hash table-based dictionary implementations with different data usage models

The efficiency of in-memory computing applications depends on the choice of mechanism to store and retrieve strings. The tree and trie are the abstract data types (ADTs) that offer better efficiency for ordered dictionary. Hash table is one among the several other ADTs that provides efficient implementation for unordered dictionary. The performance of a data structure will depend on hardware capabilities of computing devices such as RAM size, cache memory size and even the speed of the physical storage media. Hence, an application which will be running on real or virtualised hardware environment certainly will have restricted access to memory and hashing is heavily used for such applications for speedy process. In this work, an analysis on the performance of six hash table based dictionary ADT implementations with different data usage models is carried out. The six different popular hash table based dictionary ADT implementations are Khash, Uthash, GoogleDenseHash, TommyHashtable, TommyHashdyn and TommyHashlin, tested under different hardware and software configurations.

An analysis on the performance of hash table-based dictionary implementations with different data usage models

The efficiency of in-memory computing applications depends on the choice of mechanism to store and retrieve strings. The tree and trie are the abstract data types (ADTs) that offer better efficiency for ordered dictionary. Hash table is one among the several other ADTs that provides efficient implementation for unordered dictionary. The performance of a data structure will depend on hardware capabilities of computing devices such as RAM size, cache memory size and even the speed of the physical storage media. Hence, an application which will be running on real or virtualised hardware environment certainly will have restricted access to memory and hashing is heavily used for such applications for speedy process. In this work, an analysis on the performance of six hash table based dictionary ADT implementations with different data usage models is carried out. The six different popular hash table based dictionary ADT implementations are Khash, Uthash, GoogleDenseHash, TommyHashtable, TommyHashdyn and TommyHashlin, tested under different hardware and software configurations.

A reduction in long-term spatial memory persists after discontinuation of peripubertal GnRH agonist treatment in sheep

Chronic gonadotropin-releasing hormone agonist (GnRHa) administration is used where suppression of hypothalamic-pituitary-gonadal axis activity is beneficial, such as steroid-dependent cancers, early onset gender dysphoria, central precocious puberty and as a reversible contraceptive in veterinary medicine. GnRH receptors, however, are expressed outside the reproductive axis, e.g. brain areas such as the hippocampus which is crucial for learning and memory processes. Previous work, using an ovine model, has demonstrated that long-term spatial memory is reduced in adult rams (45 weeks of age), following peripubertal blockade of GnRH signaling (GnRHa: goserelin acetate), and this was independent of the associated loss of gonadal steroid signaling. The current study investigated whether this effect is reversed after discontinuation of GnRHa-treatment. The results demonstrate that peripubertal GnRHa-treatment suppressed reproductive function in rams, which was restored after cessation of GnRHa-treatment at 44 weeks of age, as indicated by similar testes size (relative to body weight) in both GnRHa-Recovery and Control rams at 81 weeks of age. Rams in which GnRHa-treatment was discontinued (GnRHa-Recovery) had comparable spatial maze traverse times to Controls, during spatial orientation and learning assessments at 85 and 99 weeks of age. Former GnRHa-treatment altered how quickly the rams progressed beyond a specific point in the spatial maze at 83 and 99 weeks of age, and the direction of this effect depended on gonadal steroid exposure, i.e. GnRHa-Recovery rams progressed quicker during breeding season and slower during non-breeding season, compared to Controls. The long-term spatial memory performance of GnRHa-Recovery rams remained reduced (P<0.05, 1.5-fold slower) after discontinuation of GnRHa, compared to Controls. This result suggests that the time at which puberty normally occurs may represent a critical period of hippocampal plasticity. Perturbing normal hippocampal formation in this peripubertal period may also have long lasting effects on other brain areas and aspects of cognitive function.

Relation Between Real Earnings Management And Audit Quality

Net income is composed of CFO and accruals. Auditors generally detect discretionary accruals to raise reliability of financial reporting and call upon managers to correct their financial reports according to the materiality. From these viewpoints, prior researches use the size of discretionary accruals as proxies for the audit quality. However, manager can also use CFO factors as means of earnings management. We confirm whether abnormal CFO factors, that is, real activity earnings management (hereafter RAM) by Roychordhury model(2006), can be as a proxy for the audit quality with comparing the size of RAM with existing proxies of audit quality such as auditors’ size (e.g. big4), audit time and audit fee. Our results show that the size of RAM is positively correlated with some existing proxies of audit quality. Also, we find discretionary accruals positively correlated with RAM in Korea. The result implies managers in Korea simultaneously use RAM as well as discretionary accruals as a means of earnings management.

Comparison of VM Live Migration Process Impacts on QoS of Web Server Hosted in Cloud

Virtual Machine (VM) Live Migration improves system manageability through VMs rearrangement in their physical hosts. System managers can redistribute VMs to tackle different challenges as: VMs consolidation for energy consumption reduction, load balancing and software rejuvenation. VM live migration consists in successive transfers of memory pages from one host to another. Thus, system capacity planning may consider VM live migration overhead. This paper presents impacts of VM live migration operations on system performance of different RAM-sized VMs (512MB, 1GB and 2GB). These experiments aims to observe how RAM size changes can affect responsiveness and reliability of a Web Server hosted on a single VM. The experiment has external client which sends web requests in a constant rate through Autobench (httperf) benchmark tool. This benchmark tool provides results of Web Server errors and response time during VM live migration process. Experiments results also consider network throughput during VM live migration. The results presents that network overhead due to VM live migration causes major system performance degradation in VMs with more amount of RAM. Therefore, this paper results may be useful for managers to consider VM live migration impacts in capacity planning.

Capacity-Independent Address Mapping for Flash Storage Devices with Explosively Growing Capacity

Address mapping for flash storage devices has been a challenging design issue for controllers because of rapidly growing device capacity. In contrast with existing mapping methods, this study proposes a capacity-independent address mapping method to decouple the required on-device RAM space from the capacity of a flash storage device. Especially, the required RAM size of the proposed method depends only on the user accessed data set, which is also referred to as the working set, while the page-level performance can be nearly achieved. In addition, a simple but practical wear-leveling design is proposed with the capability in lifetime estimation of flash storage devices. Experiments of the proposed scheme obtained encouraging results.

SLSM - A Scalable Log Structured Merge Tree with Bloom Filters for Low Latency Analytics

In the era of Bigdata, millions of searches, queries etc. happens in a second. There is a need for next generation databases which can store and process bigdata more effectively. NoSQL databases are created to solve the problems of scalability issues related with traditional databases. Year by year the bigdata is getting new dimensions. HBase is a NoSQL database suitable for random, real-time read/write access to Big Data. LSM tree used in HBase helps to achieve this high performance. Commodity hardware have moderate RAM size. SLSM, an optimized Log Structured Merge Tree which dramatically reduces the read amplification and write amplification is proposed in this paper for commodity hardware. Incorporation of variant of bloom filters increases the read performance.

Multilingual part-of-speech tagging with weightless neural networks

Training part-of-speech taggers (POS-taggers) requires iterative time-consuming convergence-dependable steps, which involve either expectation maximization or weight balancing processes, depending on whether the tagger uses stochastic or neural approaches, respectively. Due to the complexity of these steps, multilingual part-of-speech tagging can be an intractable task, where as the number of languages increases so does the time demanded by these steps. WiSARD (Wilkie, Stonham and Aleksander’s Recognition Device), a weightless artificial neural network architecture that proved to be both robust and efficient in classification tasks, has been previously used in order to turn the training phase faster. WiSARD is a RAM-based system that requires only one memory writing operation to train each sentence. Additionally, the mechanism is capable of learning new tagged sentences during the classification phase, on an incremental basis. Nevertheless, parameters such as RAM size, context window, and probability bit mapping, make the multilingual part-of-speech tagging task hard. This article proposes mWANN-Tagger (multilingual Weightless Artificial Neural Network tagger), a WiSARD POS-tagger. This tagger is proposed due to its one-pass learning capability. It allows language-specific parameter configurations to be thoroughly searched in quite an agile fashion. Experimental evaluation indicates that mWANN-Tagger either outperforms or matches state-of-art methods in accuracy with very low standard deviation, i.e., lower than 0.25%. Experimental results also suggest that the vast majority of the languages can benefit from this architecture.

Design, synthesis and evaluation of a gonadotropin releasing hormone-based subunit vaccine in rams (Ovis aries)

Immunocastration using gonadotropin-releasing hormone (GnRH)-based vaccines has been investigated in rams to reduce aggressive and sexual behaviour and to control meat quality. Despite considerable efforts, a practical GnRH vaccine has yet to be developed for rams. In the present study, a A GnRH-lipopeptide vaccine (GnRH-LP) including two copies of GnRH, 2-amino-d,l-hexadecanoic acid (C16), and a unique T helper epitope, was examined in rams. Rams received a primary and secondary vaccination of GnRH-LP without additional adjuvant (Group 1) or with the adjuvant AdjuVac™ (Group 2). In both Group 1 and 2 anti-GnRH antibody titres increased after secondary vaccination, however, the antibody titres were higher (p<0.01) for rams in Group 2. The latter rams showed a marked decrease in testicular size. The marked and sustained reduction in testicular size in rams treated with GnRH-LP+AdjuVac™ provides the basis for an effective immunocastration vaccine in rams.

Применение графических ускорителей для обработки запросов над сжатыми данными в параллельных системах баз данных

This article talks about using graphics processors for query processing in parallel database systems. The goal is to evaluate query execution efficiency over compressed database without decompression on multicore GPUs which support CUDA technology. GPU’s memory size is significantly smaller than modern computer system’s RAM size. This fact affects database’s size can be loaded into GPU’s internal memory, thus computing potential of GPU can not be used efficiently. The new approach presented in this article allows query processing over compressed data on GPU. An emulator of parallel DBMS is developed based on this approach. The similar emulator for a CPU is designed. Results of computational experiments are presented and analysis of efficiency of the proposed approaches is performed.

An Analysis on the Performance of Tree and Trie Based Dictionary Implementations with Different Data Usage Models

Tree and Trie are the Abstract Data Types (ADTs) that provide efficient implementation of ordered dictionary. The performance of a data structure will depend on hardware capabilities of the computing devices such as RAM size, Cache memory size and even the speed of the physical storage media. Hence, an application which will be running on real or virtualized hardware environment certainly will have restricted access to memory and other resources of the real hardware. Further, the time taken for any operation on a data structure rely on the data usage model and the most significant operations/tests are very much depend on the size of the payload which we use in dictionary like implementations. In this work, we do an analysis on the performance of Tree and Trie based Dictionary ADT Implementations with different data usage models. We consider data usage models such as a typical electronic dictionary with more than million of words or a typical electronic encyclopedia with large string data elements. In this work, we studied the performance of three popular Tree based Dictionary Implementations rbtree, googlebtree, stxbtree, and three Trie based Dictionary Implementations tommy-trie, tommy-trie-inplace, nedtrie under different hardware and software configurations. Among all, tommy trie is proved to be the best for character payload objects with 16 bytes and 4096 bytes. In some operations/tests googlebtree seems to be better. Our evaluation on different tree and trie structures shows tommy trie implementations perform well irrespective of size of application.

An intelligent system of content-based image retrieval for crime investigation

Crimes in the modern world have been increasing dramatically in proportion with technological growth. In many situations, investigators have a sketch of the criminal, generated from the details given by the eye witnesses. There is a need of a better methodology for identifying the culprits from those images. Nowadays, RAM and memory sizes have become huge and in turn, there is a tremendous increase in the size of the databases. Investigators have huge datasets with details, photographs, images of the criminals or crime scenes and this is the second important consideration. Image search has become highly challenging task in these dense database environments. Accuracy and speed are two important factors for this type of image searches. We propose a compact embedded search engine to search and extract images from these data bases, using a content-based image retrieval CBIR algorithm.

Interleaving Test Algorithm for Subthreshold Leakage-Current Defects in DRAM Considering the Equal Bit Line Stress

Since the minimum feature size of dynamic RAM has been down-scaled, several studies have been carried out to determine ways to protect cell data from leakage current in many areas. In the field of testing, more appropriate test algorithms are required to detect weak cells with leakage-current sources. In this paper, we propose an interleaving test algorithm that takes into account the equal bit-line stress regardless of the cell location. The proposed test algorithm allows screening of weak cells that cannot hold cell data due to the subthreshold leakage current. During the stress period, the algorithm can also detect other leakage currents. This paper presents the maximum stress differences according to the cell location, and determines the influence of the refresh operation on the maximum stress time. Therefore, this paper suggests a correlation between the refresh and read time to give maximum stress time.

HRT-PLRU: A New Paging Schemefor Executing Hard Real-Time Programson NAND Flash Memory

For advanced features of next generation vehicles, the real-time programs in automotive embedded systems are dramatically increasing. For such large volume program codes, this paper proposes a novel framework to use high-density and low-cost nonvolatile memory, i.e., NAND flash memory, as a low-cost means of storing and executing hard real-time programs. Regarding this, one challenge is that NAND flash memory allows only 2 KB page-based read operations not per-byte random accesses, which requires RAM as working storage for code executions. This paper proposes two solutions, i.e., partitioned RAM solution and shared RAM solution, that minimize the RAM size required to deterministically guarantee the deadlines of all the hard real-time tasks. The proposed solutions are verified with the actual real-time programs for unmanned autonomous driving. To the best of our knowledge, this is the first work that allows us to use NAND flash memory for hard real-time program executions with the minimal usage of RAM.

A Performance-Based Policy for Job Assignment under Distributed Rendering Environments

Based on the characteristics of rendering phase, a performance-based policy for job assignment under Distributed Rendering Environments (DREs) is proposed. Firstly, a method of evaluating rendering nodes is designed by taking CPU ratio, RAM size, CPU occupation, RAM usage into account. Furthermore, the corresponding algorithm of job assignment for dividing rendering tasks into sub-tasks on available rendering nodes is presented. Whats more, this algorithms correctness is validated by three groups of experiments thereby which offers quantitative guide for optimal job assignment of rendering.

Experimental Verification of Hyper-V Performance Isolation Quality Level

The need for cost optimization in a broad sense constitutes the basis of opera- tion of every enterprise. In the case of IT structure (which is present in almost every field of activity these days), one of the most commonly applied technolo- gies leading to good cost-to-profit adjustment is virtualization. This allows the location of several operational systems with IT systems on a single server. In order for such an optimization to be carried out correctly, it has to be stric- tly controlled by means of allocating access to resources (which is known as performance isolation). Modern virtualizers allow us to set up this allocation in quantitative terms (the number of processors, size of RAM, or disc space). It appears, however, that in qualitative terms (processor time, RAM, or hard disc bandwidth), the actual allocation of resources does not always correspond with this configuration. This paper provides an experimental presentation of the achievable quality level of performance isolation of the Hyper-V virtualizer.

Experimental Verification of Hyper-V Performance Isolation Quality Level

The need for cost optimization in a broad sense constitutes the basis of operation of every enterprise. In the case of IT structure, which is present in almost every field of activity these days, one of the most commonly applied technologies leading to good cost-to-profit adjustment is virtualization. It consists in locating several operational systems with IT systems on a single server. In order for such optimization to be carried out correctly it has to be strictly controlled by means of allocating access to resources, which is known as performance isolation. Modern virtualizers allow to set up this allocation in quantitative terms (the number of processors, size of RAM, or disc space). It appears, however, that in qualitative terms (processor's time, RAM or hard disc bandwidth) the actual allocation of resources does not always correspond with this configuration. This paper provides an experimental presentation of the achievable level of performance isolation of the Hyper-V virtualizer.