PVT Process Research Articles

Sticking coefficient and Si/C ratio of silicon carbide growth species on reconstructed [formula omitted] surface by ab-initio calculations

The production of silicon carbide boule for electronic device fabrication is bedeviled by defects and requires the usage of stable, high symmetry, and high-quality substrate, as a seed, for growth morphology dictation. Aside from this, process parameters such as Si/C ratio, growth temperature, and etching play certain roles in polytype stability and defect control. In this work, we estimated the Si/C ratio in the physical vapor transport process (PVT), by first, modeling and investigating several types of 4H–SiC substrates, including ideal (1x1), buckled (2x1), and (2x1) periodic π-bonded chain structures (both Si-face and C-face), via density functional theory, and found the C-face of the 4H–SiC substrate as the most stable among others. On this substrate, silicon carbide growth species get adsorb, stick, and grow, to form large SiC boule (ingot) in the PVT process. In order to have an idea of the defect concentration in the silicon carbide boule, we calculated the Si/C ratio, by estimating the sticking coefficient of individual growth contributing species (Si(g),SiC2(g),SiC(g),Si2C(g),Si2C2(g),Si4C2(g)(I1) and Si4C2(g)(I2)), coupled with their concentrations. The calculated theoretical sticking coefficients for the growth contributing species at 2186 K are respectively, 0.02882, 0.01226, 0.02113, 0.01271, 0.00807, 0.00335 and 0.00433.

Analysis of the Morphology of the Growth Interface as a Function of the Gas Phase Composition during the PVT Growth of Silicon Carbide

The growth conditions of 75 mm SiC crystals in the PVT process is varied by different methods while the temperature field is kept constant. The addition of graphite into the source material leads to the formation of an ordered step flow with step heights of 0.014 µm, while the addition of graphite into the source together with N2 doping changes the step kinetics on the main facet, leading to very large, bunched steps of 0.17 µm. When elemental Si was added into the source material large macro steps are formed on the whole crystal surface. While the doping induced step bunching is related to the incorporation kinetics, the large steps induced in Si-rich conditions are attributed the reduction of surface energy. With the variation of the inert gas pressure the morphology of the surface is altered, similarly. Under low pressure conditions (0.2 mbar) a fine step structure evolves, while at a high pressure (40mbar) large surface steps are formed on the whole growth interface. Large surface steps are strongly impeded in their lateral motion at defects permeating the growth interface. At these sites the formation of foreign polytypes is facilitated.

Impact of Surface Emissivity on Crystal Growth and Epitaxial Deposition

Tantalum carbide (TaC) coating, produced in an ultrahigh temperature chemical vapor deposition (CVD) process, exhibited high thermal and chemical stabilities, low emissivity, and high purity. Low emissivity of 0.3~0.43 was measured on TaC coating at 1000°C and compared with the one of SiC coating. As revealed in both simulation and experiment, the low emissivity of TaC coatings not only improves temperature uniformity in the SiC PVT process, but also reduces power consumption in both SiC crystal growth and GaN epitaxial deposition. The results provide important guidance to process tuning when switching from a conventional graphite or SiC-coated component to its TaC-coated counterpart.

Review of Sublimation Growth of SiC Bulk Crystals

The review on bulk growth of SiC includes a basic overview on the widely used physical vapor transport method for processing of 4H-SiC boules as well as the discussion of three current research topics: (a) Sublimation bulk growth of large area, freestanding cubic SiC, (b) in-situ Visualization of the PVT Process using 2D and 3D X-ray based imaging and (c) prediction of dislocation formation and motion in SiC using a continuum model of dislocation dynamics (CDD).

A 0.3 V Rail-to-Rail Ultra-Low-Power OTA with Improved Bandwidth and Slew Rate

In this paper, we present a novel operational transconductance amplifier (OTA) topology based on a dual-path body-driven input stage that exploits a body-driven current mirror-active load and targets ultra-low-power (ULP) and ultra-low-voltage (ULV) applications, such as IoT or biomedical devices. The proposed OTA exhibits only one high-impedance node, and can therefore be compensated at the output stage, thus not requiring Miller compensation. The input stage ensures rail-to-rail input common-mode range, whereas the gate-driven output stage ensures both a high open-loop gain and an enhanced slew rate. The proposed amplifier was designed in an STMicroelectronics 130 nm CMOS process with a nominal supply voltage of only 0.3 V, and it achieved very good values for both the small-signal and large-signal Figures of Merit. Extensive PVT (process, supply voltage, and temperature) and mismatch simulations are reported to prove the robustness of the proposed amplifier.

Major Carrier Element Concentrations in SiC Powder and Bulk Crystal

Boron, aluminum, and nitrogen are major and critical elements in silicon carbide. The concentrations of these elements influence the electrical properties of silicon carbide and also the generation of defects. Purification was executed in the powder manufacturing process. High purity powder was used to grow the crystal, which was then sliced into wafers in this work. Secondary ion mass spectroscopy (SIMS) and glow discharge mass spectrometry (GDMS) were used to measure boron, aluminum, and nitrogen concentrations in wafer and powder to compare the concentration difference. The concentration of the elements varies depending on the element’s physical property. Transfer coefficient is defined as the ratio of element concentration in wafer to powder, which is interesting to realize the element behavior in PVT process and studied in this work.

High Purification of Hg2Br2 Powder for Acousto-Optic Tunable Filters Utilizing a PVT Process

High Purification of Hg2Br2 Powder for Acousto-Optic Tunable Filters Utilizing a PVT Process

Resistivity Increase in 6H-SiC Crystal Grown with Simple Modification in PVT Process

6H-SiC single crystal was grown with simple modification in PVT process to investigate the aspect of resistivity change in crystal. The modified process consisted of a new initial step to get rid of impurities in the growth cell before the main growth of SiC crystal. The new step in the modified process was designed to consist of higher temperature than the growth temperature for sublimation of impurities. SiC crystal grown with using 2 times of impurities sublimation process (ISP) step exhibited lower variation of resistivity value on whole wafer than SiC grown using with 1 time. With implementation of new modified step in growth process, SiC single crystal with resistivity value above 103Ωcm could be obtained by simple PVT process and conventional low-purity SiC source material.

Assessment of SiC Crystal Chemistry during the PVT Growth Process: Coupled Numerical Modeling and Thermodynamics Approach

Numerical simulation appeared till now as the only tool able to describe the SiC growth by PVT process, while the chemistry of the Si-C system and its coupling to mass transfer were not considered in a satisfactory way. To assess the chemistry of SiC crystal, the coupling of numerical and thermodynamic calculations computed by FEM, and by treating SiC as a solid solution, respectively, is presented. This enables the possibilities to control the activity of each component in SiC crystal during the growth. The link between growth conditions and SiC crystal chemistry could be one of the key issues to link the growth and the occurrence of cubic or hexagonal polytypes.

Comparison of Thermodynamic Databases for the Modeling of SiC Growth by PVT

The numerical modeling of the SiC bulk growth process by physical vapor transport has been established as the essential tool for the process development, especially for understanding and predicting the favorable growth conditions. An accurate computation of mass transfers is strongly dependent on the equilibrium partial pressure calculations. In this paper, we compare the relative impact of the different thermodynamic databases available on the full PVT process modeling. We found that whatever the database used, the trends regarding growth rate calculation, crystal shape, Si/C ratio are correctly described and none of the database would bring about unacceptable errors from the process development point of view even if some discrepancies in the absolute values could be obtained.

A Thermodynamic Mechanism for PVT Growth Phenomena of SiC Single Crystals

Sublimation-recrystallization phenomena occurring during the PVT growth of SiC single crystals are examined from the viewpoint of quasi-equilibrium phase transition using pressure-dependent Si-C binary phase diagrams. From the results obtained, it is concluded that a thermodynamic interpretation for the PVT growth is consistently possible; the PVT process for SiC is comprised of a combination of elemental reactions driven by transition between phases at the growth temperatures. In addition, various phenomena observed during the PVT growth, such as silicon droplet formation, in-situ etching, and hexagonal void movement, are also discussed based upon the phase diagram, and possible mechanisms for these phenomena are proposed.

무종자결정 상에 성장된 AlN 결정의 형태학적 연구

The growth of AlN single crystals of large size and good quality is of prime importance for UV LEDs and power devices applications. However, the crystals having the size of more than 1 inch and high quality have not been reported in the world. In the PVT growth of AlN, the crystal morphology of as grown were important because the preferred orientation of growth of it was evaluated for growth rate increase. In the present study, the AlN single crystals grown by PVT process were evaluated by the side of the growth morphology. Optical microscopic characterization was carried out to observe the shape of the crystals and the growth facets. Furthermore the growth habit of it were discussed by observation of the surface of AlN crystals.

An All CMOS Current Reference

In this paper, an all CMOS current reference circuit which generates a reference current independent of PVT (Process, supply Voltage, and Temperature) variations is presented. The circuit consists of a self-biased current source (SBCS) and two nested connected transistors which supply a voltage with positive temperature coefficient and the resulting reference circuit has low temperature coefficient. It is based on CSMC 0.5um mixed-signal process with the supply voltage of 5V. The precision of reference current is about ±3.05% when considering the process, supply voltage and temperature variation at the same time.

Defect Reduction in SiC Growth Using Physical Vapor Transport

Abstract4H SiC is a promising material because of its mechanical, electrical, and physical properties. However, SiC material defects have had a rate limiting effect on the widespread adoption of SiC. Micropipes, basal plane dislocations (BPD), elementary screw dislocations (SDD) and threading edge dislocations (TED) have all been identified as limiting to device operation and/or performance. An ideal PVT strategy for manufacturing SiC crystals would be capable of driving defects out the crystal via a combination of thermal field control and defect dissociation pathways. In this work a PVT technology was realized which is capable of continuously improving the crystal quality. A low defect PVT process was conceived and optimized using iterative experiment and simulation methods. During the maturation of the process it was observed that the crystal defect density repeatedly decreased relative to the seed crystal, as evaluated by x-ray topography, x-ray diffraction, and molten salt etching. The process improvements were leveraged successfully to achieve 4H n+ SiC wafers at 76-100 mm diameter with MPD <1 cm-2, SDD <500 cm-2, and BPD <500 cm-2. This paper will illustrate the defect reduction pathways leading to state of the art defect density 4H SiC crystals and the impact of the improved crystal on epitaxy defects and simple device experiments.

Time Management for Low-Power Design of Digital Systems

The implementation of complex functionality in low-power (LP) nano-CMOS technologies must be carried out in the presence of enhanced susceptibility to PVT (Process, power supply Voltage and Temperature) variations. VT variations are environmental or operation-dependent parametric disturbances. Power constraints (in normal and test mode) are critical, especially for high-performance digital systems. Both dynamic and leakage power induce variable (in time and space) thermal maps across the chip. PVT variations lead to timing variations. These should be accommodated without losing performance. Dynamic, on-line time management becomes necessary. The purpose of this paper is to present a VT-aware time management methodology which leads to improved PVT tolerance, without compromising performance or testability. First, the methodology is presented, highlighting its characteristics and limitations. Its underlying principle is to introduce additional tolerance to VT variations, by time borrowing, dynamically controlling the time of the clock edge trigger driving specific memory cells (referred to as critical memory cells, CME). VT variations are locally sensed, and dynamic delay insertion in the clock signal driving CME is performed, using Dynamic Delay Buffer (DDB) cells. Then, methodology automation, using the proprietary DyDA tool, is explained. The methodology is proved to be efficient, even in the presence of process variations. Finally, it is shown that VT tolerance insertion does not necessarily reduce delay fault detection, as multi-V DD or multi-frequency self-test can be used to recover detection capability.

새로운 가이드 튜브를 통한 6H-SiC 단결정의 직경 확장에 관한 연구

A sublimation method using the SiC seed crystal and SiC powder as the source material is commonly adopted to grow SiC bulk single crystal. However, it has proved to be difficult to achieve the high quality crystal and the process reliability because SiC single crystal should be grown at very high temperature in closed system. The present research was focused to improve SiC crystal quality grown by PVT method through using the new inner guide tube. The new inner guide tube was designed to prevent the enlargement of polycrystalline region into single crystalline region and to enlarge the diameter of SiC single crystal. The 6H-SiC crystals were grown by conventional PVT process. The seed adhered on seed holder and the high purity SiC source materials are placed on opposite side in sealed graphite crucible surrounded by graphite insulation. The SiC bulk growth was conducted around 2300 <TEX>$^{\circ}C$</TEX> of growth temperature and 50 mbar in an argon atmosphere of growth pressure. The axial thermal gradient across the SiC crystal during the growth was estimated in the range of 15<TEX>${\sim}$</TEX>20 <TEX>$^{\circ}C$</TEX>/cm.

Bulk and epitaxial growth of micropipe‐free silicon carbide on basal and rhombohedral plane seeds

AbstractIn this paper the criteria for reasonable choice of alternative to (0001) seed orientation are discussed. Growth conditions necessary to produce bulk 6H‐ and 4H‐SiC crystals on rhombohedral (01‐1n) plane seeds in PVT process are presented. Specific defect structures in such crystals are described in relation to growth conditions. In the second part of the paper, liquid phase epitaxial (LPE) growth using high‐temperature silicon based flux and rhombohedral plane seeds is compared to the LPE on basal plane seeds. In both bulk and epitaxial growth processes the employment of rhombohedral plane seed offers important advantages. (© 2008 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)

Growth of Undoped (Vanadium-Free) Semi-Insulating 6H-SiC Single Crystals

II-VI has developed an Advanced PVT (APVT) process for the growth of nominally undoped (vanadium-free) semi-insulating 2” and 3” diameter 6H-SiC crystals with room temperature resistivity up to 1010 W·cm. The process utilizes high-purity SiC source and employs special measures aimed at the reduction of the impurity background. The APVT-grown material demonstrates concentrations of B and N reduced to about 2·1015cm-3. Wafer resistivity has been studied and correlated with Schottky barrier capacitance, yielding the density of deep compensating centers in 6H-SiC in the low 1015 cm-3 range for both ntype and p-type material. The nearly equal density of deep donors and deep acceptors ndicates that the centers responsible for the intrinsic compensation can be amphoteric. TheEPR density of spins from free carbon vacancies is about 1014 cm-3. It is also hypothesized that impurity-vacancy complexes can be present in the undoped material and participate in compensation.

Control of the Supersaturation in the CF−PVT Process for the Growth of Silicon Carbide Crystals: Research and Applications

In the classical sublimation growth of silicon carbide (SiC) single crystals, the supersaturation in the surrounding of the seed is mainly controlled by pressure and temperature distributions within the growth cavity. Precise control of the supersaturation is difficult, especially if it needs to be adjusted during the process. In the first part of the paper, an experimental study performed in a continuous feed−physical vapor transport reactor (CF−PVT) is shown. This process combines CVD for the feeding of the SiC source and PVT for the growth of the single crystal. It is shown that the feeding gas flow rate (TMS diluted in argon) and/or the temperature allow precise control of the supersaturation close to the seed, much more easily than in the classical sublimation process. In the second part of the paper, the application of the supersaturation control to SiC polytype engineering is demonstrated.

A Study of HTCVD Renewing of the SiC Polycrystalline Source during the PVT Process

A Study of HTCVD Renewing of the SiC Polycrystalline Source during the PVT Process