Pulse Generator Circuit Research Articles

Operation mode of the proton injector in the linac of the Institute for Nuclear Research with a 100-Hz pulse repetition rate

Results of the analysis and upgrading of the high-voltage pulse generator circuit in the proton injector for operation with a 100-Hz pulse repetition rate are presented.

A Novel Picosecond Pulse Generation Circuit Based on SRD and NLTL.

Because of the importance of ultra-wideband (UWB) radar in various applications, short pulse generation in UWB systems has attracted a lot of attention in recent years. In order to shorten the pulse, nonlinear transmission line (NLTL) is imported, which expands the application of step recovery diode (SRD) for pulse generation. Detailed analysis and equations for this SRD and NLTL-based pulse generation are provided and verified by simulation and experimental results. Factors that could cause pulse waveform distortions are also analyzed. The generator circuit presented in this paper generates 130ps and 3.3V pulse, which can be used in UWB radar systems that require sub-nanosecond pulses.

Design of High Voltage Pulse Generator and Receiver Circuit for Ultrasonic velocity and Absorption Measurements In liquids

Design of High Voltage Pulse Generator and Receiver Circuit for Ultrasonic velocity and Absorption Measurements In liquids

大電流パルス印加時のCFRPの抵抗変化およびジュール加熱特性

Resistance variation and Joule heating of carbon fiber reinforced plastic after applying a large electric current pulse are investigated. The current has a pulse width of several microseconds and the typical peak value is 2 kA. A double-digit decrease in resistance of a cross-ply laminate is observed after applying the kA current pulse. The decrease in resistance of the cross-ply laminate can be controlled by varying the charge voltage in the pulse generator circuit. In the case of DC current Joule heating, the direction of heat conduction at the surface is parallel to the fiber direction of the cross-ply laminate. However, the kA current pulse locally heats in the vicinity of the electrode and the thermal profile is different from the DC current.

Application of generalized switching laws for increasing current pulse value

To obtain the current pulses applied to the active load, the circuit breaking effect has been used in the primary winding of the pulse transformer. When the direct current voltage source is disconnected, the current of primary winding is reduced to zero, so that a current pulse is formed in the secondary winding of the pulse transformer that is transmitted into the load. A circuit of the inductive pulse generator operating on the basis of generalized switching laws was developed so as to increase the amplitude of current pulses in the active load and the corresponding power. The circuit contains a pulse transformer, the secondary winding of the pulse transformer is connected to the load, and an additional inductor is connected parallel to the primary winding of the pulse transformer. When the direct current voltage source is disconnected, the current of primary winding passes through zero and decreases to a negative value, which leads to a significant increase in the current pulse in the load. In accordance with the generalized law of commutation, the relationships for the calculation of the current jump of pulse transformer primary winding and a jump in the load current have been obtained. Using the state-space technique, mathematical models of the circuits mentioned above with linear active load have been developed. Theoretical and experimental studies have shown a significant increase in the current pulse value and its capacity in the active linear load when the inductive pulse generator has been used. The values of currents in inductive coils detected experimentally were practically the same as the calculated values.

Performance Analysis of a 15 Level Cascaded Multilevel Inverter with Reduced Switches

Multi-level inverters are widely used in high and medium voltage applications as it affords high voltage output without transformer. Apart from this, it also reduces switching losses and voltage stress on switches. When the number of levels are increased, there will be a reduction in Total Harmonic Distortion (THD) but the usage of more number of semiconductor switches is increased. This in turn increases the size and cost of the inverter. Hence in order to overcome this problem, this work proposes a novel 15 level multilevel inverter topology with the reduced number of switches. Space Vector Pulse Generation Circuit is implemented to generate switching pulses for voltage source inverter. This proposed topology was simulated using the MATLAB and experimental results are furnished to validate the efficiency of this method.

LOW-POWER HIGH PERFORMANCE PULSE-TRIGGERED FLIP-FLOP

In this paper, a novel low-power pulse-triggered flip-flop (FF) design is presented. First, the pulse generation control logic, an AND function, is removed from the critical path to facilitate a faster discharge operation. A simple twotransistor AND gate design is used to reduce the circuit complexity. Second, a conditional pulse-enhancement technique is devised to speed up the discharge along the critical path only when needed. As a result, transistor sizes in delay inverter and pulse-generation circuit can be reduced for power saving. Various post layout simulation results based on UMC CMOS 90- nm technology reveal that the proposed design features the best power-delay-product performance in seven FF designs under comparison. Its maximum power saving against rival designs is up to 38.4%. Compared with the conventional transmission gate-based FF design, the average leakage power consumption is also reduced by a factor of 3.52.

An Area-Efficient Current-Mode Bandgap Reference With Intrinsic Robust Start-Up Behavior

During mass production, bandgap reference failure can cause chip failure, resulting in yield loss. A bandgap reference with robust start-up behavior is therefore needed. In this brief, the issue of multiple operating points is examined, along with a prior art low-voltage current-mode bandgap reference (CMBGR) structure. A CMBGR structure with only two stable operating points is proposed, which can be reliably started up with a very simple pulse generator circuit and a power-up signal. The bandgap reference is implemented in 40-nm technology, achieving a 41.5-ppm/°C nominal temperature coefficient. The current consumption is 40 $\mu\mbox{A}$ and the active area is 0.0094 mm 2.

Design and simulation of pulse generator for UWB based on LC-tank differential oscillators topology

This paper presents a detailed analysis, design and simulation of pulse generator for Ultra-Wideband (UWB) based on LC-tank differential oscillators topology. The differential oscillators with a cross-coupled NMOS pair and a tail current source are used to achieve more positive gain and generate negative resistance to the LC-tank. Besides, this oscillator is suitable for UWB high frequency and low power applications. The UWB pulse generator is composed of a simple on-off keying (OOK) modulated and LC-tank differential oscillators. The circuit of UWB pulse generator designed and simulated in 0.13 um CMOS technology. The UWB pulse generator generates a pulse for the 6 - 10 GHz UWB transmitter. Simulation results show a pulse width of 586 ps, a peak to peak amplitude pulse of 88.6 mV from the 1.2 V power supply and the die area of 0.22 mm2. The average power consumption of approximately 0.55 mW and an energy consumption of 1.1 pJ/pulse at 500 MHz pulse repetition rate (PRR) are observed.

A 320 mV, 6 kb subthreshold 10T SRAM employing voltage lowering techniques**Project supported by the National Natural Science Foundation of China (No. 61306039) and the Next Generation of Information Technology for Sensing China (No. XDA06020401).

This paper presents a 6 kb SRAM that uses a novel 10T cell to achieve a minimum operating voltage of 320 mV in a 130 nm CMOS process. A number of low power circuit techniques are included to enable the proposed SRAM to operate in the subthreshold region. The reverse short channel effect and the reverse narrow channel effect are utilized to improve the performance of the SRAM. A novel subthreshold pulse generation circuit produces an ideal pulse to make read operation stable. A floating write bit-line effectively reduces the standby leakage consumption. Finally, a short read bit-line makes the read operation fast and energy-saving. Measurements indicate that these techniques are effective, the SRAM can operate at 800 kHz and consume 1.94 μW at its lowest voltage (320 mV).

DESIGN OF LOW POWER AND HIGH PERFORMANCE PULSE TRIGGERED FLIP FLOP USING CONDITIONAL PULSE ENHANCEMENT METHOD

In this paper, a novel low-power high performance pulse-triggered flip-flop using conditional pulse enhancement design method is presented. Our proposed design is Enhanced Pulse Triggered Low-power Flip Flop (EPTLFF). It design is done by the pulse generation control logic, an AND function, is removed from the critical path to facilitate a faster discharge operation. A simple two-transistor AND gate design is used to reduce the circuit complexity. The EPTLFF avoids unnecessary internal node transitions to reduce power consumption. As a result, transistor sizes in delay inverter and pulse-generation circuit can be reduced for power saving. Various layout simulation results comparison between previously reported design and modified design is based on 90nm and 50nm technology. The proposed design features the best power-delay-product performance in five FF designs under comparison. Its maximum power saving compared to the conventional P-FF designs is up to 18.6%.

Pulse-forming-line based on-chip short pulse generator

A traditional pulse generation circuit based on the pulse-forming-line (PFL) is implemented in a commercial 0.13 μm digital CMOS technology. A meandered on-chip coplanar waveguide is used as the PFL, and CMOS transistor is used as switch in the Cadence Spectre simulation. The circuit sample is fabricated and tested. Pulses of ∼170 ps durations and 120-200 mV amplitudes are obtained when the power supply is tuned from 1.2 V to 2 V. The results show that the traditional PFL based circuit can be implemented in standard CMOS technology for on-chip short pulse generation. Furthermore, the PFL circuits significantly extend the short pulse generation capabilities of CMOS technology.

A radar-based breast cancer detection system using CMOS integrated circuits

An ultrawideband (UWB) radar-based breast cancer detection system, which is composed of complementary metal–oxide–semiconductor integrated circuits, is presented. This system includes Gaussian monocycle pulse (GMP) generation circuits, switching (SW) matrix circuits, equivalent-time sampling circuits, and a compact UWB antenna array. During the detection process, the GMP signal with the center frequency of 6 GHz is first generated and transmitted with a repetition frequency of 100 MHz. The GMP signal is sent to a selected transmitter antenna by the SW matrix module, and the reflected signal is captured by the receiver antennas. Next, the high-speed equivalent-time sampling circuits are employed to retrieve the reflected GMP signal. A confocal algorithm is used to reconstruct the breast image. The total size for the prototype module is $45~\textrm {cm} \times 30~\textrm {cm} \times 14.5$ cm in length, width, and height, respectively, which is dramatically smaller than the conventional detection systems. Using our proposed system, we demonstrate a successful detection of 1-cm cancer target in the breast phantom.

Design of an Integrated Thermoelectric Generator Power Converter for Ultra-Low Power and Low Voltage Body Energy Harvesters aimed at EEG/ECG Active Electrodes

This paper describes a design procedure for an efficient body thermal energy harvesting integrated power converter. This procedure is based on loss examination for a selfpowered medical device. All optimum system parameters are calculated respecting the transducer constraints and the application form factor. It is found that it is possible to optimize converter's working frequency with proper design of its pulse generator circuit. At selected frequency, it has been demonstrated that wide area voltage doubler can be eliminated at the expense of wider switches. With this method, more than 60% efficiency is achieved in simulation for just 20mV transducer output voltage and 30% of entire chip area is saved.

English

In this paper, first a low-power pulse-triggered flip-flop (FF), a simple two-transistor AND gate is designed to reduce the circuit complexity. Second, a conditional pulse-enhancement technique is devised to speed up the discharge along the critical path only when needed. As a result, transistor sizes in delay inverter and pulse-generation circuit can be reduced for power saving. Various post layout simulation results based on United Microelectronics Corporation and Complementary metal–oxide–semiconductor (UMC CMOS) 50-nm technology reveal that the proposed design features the best power-delay-product performance in several FF designs under comparison. Its maximum power saving against rival designs is up to 18.2% and the average leakage power consumption is also reduced by a factor of 1.52.   Key words: Flip-flop, low power, pulse-triggered, pulse enhancement.

Controllable pulse parameter transcranial magnetic stimulator with enhanced circuit topology and pulse shaping

Objective. This work aims at flexible and practical pulse parameter control in transcranial magnetic stimulation (TMS), which is currently very limited in commercial devices. Approach. We present a third generation controllable pulse parameter device (cTMS3) that uses a novel circuit topology with two energy-storage capacitors. It incorporates several implementation and functionality advantages over conventional TMS devices and other devices with advanced pulse shape control. cTMS3 generates lower internal voltage differences and is implemented with transistors with a lower voltage rating than prior cTMS devices. Main results. cTMS3 provides more flexible pulse shaping since the circuit topology allows four coil-voltage levels during a pulse, including approximately zero voltage. The near-zero coil voltage enables snubbing of the ringing at the end of the pulse without the need for a separate active snubber circuit. cTMS3 can generate powerful rapid pulse sequences ( 10 ms inter pulse interval) by increasing the width of each subsequent pulse and utilizing the large capacitor energy storage, allowing the implementation of paradigms such as paired-pulse and quadripulse TMS with a single pulse generation circuit. cTMS3 can also generate theta (50 Hz) burst stimulation with predominantly unidirectional electric field pulses. The cTMS3 device functionality and output strength are illustrated with electrical output measurements as well as a study of the effect of pulse width and polarity on the active motor threshold in ten healthy volunteers. Significance. The cTMS3 features could extend the utility of TMS as a research, diagnostic, and therapeutic tool.

Stepped Impedance Magnetic Compression Line Pulse Generator

A novel and improved magnetic compression-based stepped impedance transmission line pulse generator circuit is presented. It is shown that discharging an initially charged lumped element transmission line with saturable inductor switches in each cell can result in complete energy transfer between cells provided the cell capacitances are in a certain fixed sequence independent of the cell inductances. The use of precharge voltage and proper capacitance sequence in such stepped impedance magnetic compression line provides voltage multiplication in addition to pulse compression.

CMOS Phase and Quadrature Pulsed Differential Oscillators Coupled through Microstrip Delay-Lines

An innovative solution to design phase and quadrature pulsed coupled oscillators systems through electromagnetic waveguides is described in this paper. Each oscillator is constituted by an LC differential resonator refilled through a couple of current pulse generator circuits. The phase and quadrature coupling between the two differential oscillators is achieved using delayed replicas of generated fundamentals from a resonator as driving signal of pulse generator injecting in the other resonator. The delayed replicas are obtained by microstrip-based delay-lines. A 2.4 - 2.5 GHz VCO has been implemented in a 150 nm RF CMOS process. Simulations showed at 1 MHz offset a phase noise of -139.9 dBc/Hz and a FOM of -189.1 dB.

A CMOS UWB transmitter with Vivaldi Array for Ultra-fast Beam steering microwave radar

This work presents a new Ultra Wide Band (UWB) beamforming fifth-order derivative Gaussian pulse transmitter with dual small Vivaldi antennas for remote acquisition of vital signals in impulse radar applications. The system consists of a programmable delay circuit (PDC or τ), a UWB pulse generator (PG) circuit and an array of two Vivaldi planar antennas. The circuits is designed using the 0.18µm CMOS IBM process. Spice simulations show the pulse generation with 90mVpp amplitude and 300ps width. The average power consumption is 120µW per pulse, using a 2V power supply at a pulse repetition rate (PRR) of 100MHz. Full tridimensional electromagnetic simulations, using CST MWS, show the main lobe radiation with a gain of 5.5dB, and a beam steering between 20º and -17.5º for azimuthal (θ) angles at the center frequency of 7.5GHz.

Design and Development of Sensing System for Mines Detector Robot

This paper presents the design and development of sensing system for mines detector robot. The objective of this project is to identify the optimum metal detection system and design and develop the sensing system of mines detection circuit for the landmine mobile robot. This sensing circuit of landmines detection system consists of pulse generation circuit, detector circuit, amplifier circuit, comparator circuit, microcontroller PIC18F4580 and the display result circuit through LCD screen. Size, type and shape of ferrous and non-ferrous object (landmines) will impinge on the output voltage signal from the search coil. The metal (iron) that was targeted in this project will be chosen based on an artificial detonator. Experimental results showed that this circuit able to sense ferrous and non-ferrous object (landmines) with satisfy sensitivity and consistent result.