Inverter Prototype Research Articles

Impact of wind speed on ventilation performance within a container installed with photovoltaic inverter

PV inverter needs proper ventilation for reducing the heat dissipation of the electronic components. In this work, a container installed with PV inverter is considered with different configurations of cooling channels within the container for ventilation analysis. Typically, high capacity PV inverters are installed inside the container and therefore inverters, are not experiencing external wind effects and it depends on the configuration of cooling channels. In this work, the main cooling channel is located at the top of the inverter; inlet and outlet ventilation holes are located on the side of cross ventilation. They help in analyzing the cooling design, dependent on site specific wind flow direction of a container. Wind speeds and their directions can raise back pressures, which may be high enough to block the cooling air flow inside the channels. Reduction of cooling air flow reduces the fan capacity for dissipating the heat losses. In this study, cooling performance of outdoor container installed with PV inverter has been evaluated by using the Computational Fluid Dynamics (CFD) with two separate commercial packages, ANSYS CFX and Mentor Graphics FloEFD. Full scale size PV inverter prototype model has been used for experimental testing using the facility of the Wind Driven Rain equipment testing of the Toptester Limited (Finland). CFD numerical simulation results have been validated by comparing with the measured/experimental results. Wind flow volume rate results investigations have shown the cooling flow drop consequently with the head wind strength and also it has displayed the axial fan saddle region effect on the volume flow. Both the measurements and CFD results have shown significant turbulence in the inlet vent region of the main cooling channel.

Cost-Effective Grid-Connected Inverter for a Micro Combined Heat and Power System

This paper proposes a novel, cost-effective grid-connected inverter for a domestic micro combined heat and power system. A high-frequency (∼12 000 r/min), high-voltage (∼425 Vdc) brushless dc machine is used as the generator. The output of the generator is injected into the grid through a novel grid-connected inverter, utilizing a digital algorithm for the implementation of a constant frequency hysteresis current control. This allows a simplified output filter with smaller components to be employed. A grid synchronization method has also been designed, based on a low-pass filter and a microcontroller to optimize/tune the output power factor. The proposed method is successfully applied to a 500-W, 230-V, 50-Hz grid-connected voltage-source inverter (VSI) prototype, where the output of the VSI has been demonstrated to comply with the operating regulations for domestic distributed power generation systems.

Capacitor impedance estimation utilizing dc‐link voltage oscillations in single phase inverter

Grid tied single-phase solar inverters offer less operational life when compared with the Photovoltaic (PV) panels due to the use of aluminium electrolytic capacitor (AEC). With time, AEC degrades, resulting in an increase in ripple voltage on PV panel. This would reduce the power extraction efficiency of the system, thereby a loss of revenue. This study proposes a simple and cost-efficient online technique for monitoring the health of AECs. The proposed technique suggests evaluating the AEC impedance at twice the grid frequency. Sampling of PV voltage, PV current and inductor current is required to determine the second harmonic impedance of AEC. These voltage and current sensors are present in commercially available solar PV inverters for their control operation. The proposed technique could be extended to other single-phase inverter applications provided that voltage and current sensors are available. Suitable mathematical model of the technique is derived to determine the effect of sampling instant on the accuracy of the results. Criteria for the replacement of capacitor based on impedance monitoring is defined. For validation of the proposed technique, detailed simulation studies are carried out for a single-phase PV system. The technique is verified experimentally on a scaled down solar PV inverter prototype.

Quasi‐resonant DC‐link H5 PV inverter

By removing transformer from PV inverters, they become more attractive for distributed power generation systems. Regardless of their some extra leakage currents, transformer-less inverters would be more advantageous regarding their higher efficiency. However, using traditionally hard-switching converters still causes to drastic switching losses, high di/dt and electromagnetic interference. Quasi-resonant DC-link techniques have promising features to provide zero-voltage switching (ZVS) condition for full bridge inverters, but they are not suitable for transformer-less PV inverters due to consequent high leakage current. In this study, a transformer-less PV inverter is proposed by adapting a proper quasi-resonant DC-link technique to the H5 topology. Using only two auxiliary switches, ZVS turn on and turn off for high-frequency bus switch and ZCS turn on and ZVS turn off for high-frequency switches of the bridge as well as ZVS turn on and turn off of the antiparallel diodes of main switches are realised. Zero current switching (ZCS) turn on and ZVS turn off for auxiliary switches and ZVS turn on and ZCS turn off for antiparallel diodes are also provided. To verify the proposed circuit operation, a 20 kHz 1 kW quasi-resonant DC-link H5 PV inverter prototype is implemented and operation characteristics, soft switching conditions and design rules are confirmed.

Reliability improvement of transistor clamped H‐bridge‐based cascaded multilevel inverter

Reduced voltage stress and low-total harmonic distortion are the main causes for such widespread application of multilevel inverters (MLIs) in various industrial sectors. However, reliability is one of the major concerns of MLIs as it uses a large number of switches as compared with two-level inverters. Therefore, a newly developed transistor clamped H-bridge inverter is proposed in the literature which uses a relatively less number of switches and DC sources as compared with cascaded H-bridge but lacks in reliability due to the absence of redundant states. Hence, in this study, the reliability improvement strategy for newly developed five-level transistor clamped H-bridge-based cascaded inverter is proposed which can be generalised for any number of levels. In the proposed fault tolerant strategy, the fault can be broadly classified based on the two main legs of the proposed inverter. Moreover, the proposed fault tolerant strategy does not require any kind of external circuit for maintaining its capacitor voltage in the balanced state. Finally, to validate the concept, a laboratory prototype of the five-level inverter is developed and results are obtained successfully.

Photovoltaic Module-Integrated Stand-alone Single-Stage Switched Capacitor Inverter with Maximum Power Point Tracking

A switched capacitor (SC) based inverter that tracks the maximum power point (MPP) of a photovoltaic (PV) source and generates a pure sine output is presented. To enable integration with the PV module, efficiency and compactness are maximized with a single-stage topology that tracks the MPP of the PV source, boosts the input dc voltage, and generates a regulated ac output in a stand-alone configuration with scope for grid-connected applications. The SC inverter is realized with multiple identical SC blocks controlled by sinusoidal pulsewidth modulation and load-dependent output capacitor adjustment. A detailed steady-state analysis is carried out, and a mathematical model is derived to understand the interdependence of various inverter parameters on each other and to optimally choose the inverter components. A hardware prototype of the stand-alone single-stage SC inverter that operates from a 60 V/70 W PV module and delivers a 110 Vrms, 50 Hz output is wired to demonstrate the functioning of the proposed MPP tracking inverter under different operating conditions. An inversion efficiency > 95%, a tracking efficiency > 97%, and a total harmonic distortion (THD) <; 4% have been practically achieved. All the details of this work are presented.

Neutral Point Voltage Ripple Suppression for a Three-Phase Four-Wire Inverter With an Independently Controlled Neutral Module

An independently controlled neutral module (ICNM) can be adopted in a three-phase four-wire inverter to form the neutral line and provide the path for zero-sequence current when the loads are unbalanced. The original control objective of the ICNM is to stabilize the neutral point voltage. Since there is a −180° phase jump at the resonant frequency of the neutral inductor and split dc-link capacitors in the system loop gain, system instability may occur. In order to ensure system stability, the inductor current feedback scheme (ICFS) can be incorporated, which is equivalent to introducing a resistor in series with the inductor branch. However, it will lead to increased zero-sequence current flowing through the dc-link capacitors, thus increasing the neutral point voltage ripple. In this paper, three improved control schemes, namely, notch-filter-incorporated inductor current feedback scheme (NF-ICFS), proportional resonant cascaded regulator plus inductor current feedback scheme (PR+ICFS), and neutral current feed-forward plus inductor current feedback scheme (NCFF+ICFS), are proposed, which not only ensure system stability, but also maintain a small neutral point voltage ripple. A 10-kW prototype of the three-phase four-wire inverter with ICNM is built and tested in the laboratory, and the experimental results verify the effectiveness of the proposed control schemes.

Nonlinear PWM-Controlled Single-Phase Boost Mode Grid-Connected Photovoltaic Inverter With Limited Storage Inductance Current

A nonlinear pulse width modulation-controlled single-phase boost mode photovoltaic grid-connected inverter with limited storage inductance current is proposed in this paper. The circuit topology, control strategy, steady-state principle characteristic, and design criterion for the key circuit parameters of this kind of inverter are investigated in depth, and important conclusions are obtained. The inverter's regenerating energy duty ratio 1-D which decreases with the decline of the grid-connected voltage is real time adapted by sampling and feeding back the inverting bridge modulation current, and the average value of the modulation current in each switching cycle tracks the reference sinusoidal signal to get high-quality grid-connected current. The active control of the energy storage inductance current and the balance of the voltage step-up ratio are realized by adding a bypass switch connected in parallel with the energy storage inductance and using two kinds of switching pattern namely boost pattern and freewheeling pattern. The theoretical analysis and experimental results of the 1 kVA 110 VDC/220 V50 Hz photovoltaic grid-connected inverter prototype show that it has the advantages such as single-stage boost conversion, high conversion efficiency, high quality of grid-connected current waveform, low value of energy storage inductance, simple control, etc.

Load Disturbance Compensation for Stand-alone Inverters Using an Inductor Current Observer

A control scheme for stand-alone inverters that utilizes an inductor current observer (ICO) is proposed. The proposed method measures disturbance load currents using a current sensor and it estimates the inductor current using the ICO. The filter parameter mismatch effect is analyzed to confirm the ICO’s controllability. The ICO and controllers are designed in a continuous-time domain and transferred to a discrete-time domain with a digital delay. Experimental results demonstrate the effectiveness of the ICO using a 5-kVA single-phase stand-alone inverter prototype. The experimental results demonstrate that the observed current matches the actual current and that the proposed method can archive a less than 2.4% total harmonic distortion (THD) sinusoidal output waveform under nonlinear load conditions.

A Hybrid Modulation Strategy with Reduced Switching Losses and Neutral Point Potential Balance for Three-Level NPC Inverter

In this paper, carrier-based pulse width modulation (CBPWM), space vector PWM (SVPWM) and reduced switching losses PWM (RSLPWM) for the three-level neutral point clamped (NPC) inverter are introduced. In the case of the neutral point (NP) potential (NPP) offset, an asymmetric disposition PWM (ASPDPWM) strategy is proposed, which can output PWM sequences correctly and suppress the lower order harmonics of the inverter effectively. An NPP balance strategy based on carrier based PWM (CBPWM) is analyzed. A hybrid modulation strategy combining RSLPWM and the NPP balance based on CBPWM is proposed, and hysteresis control is adopted to switch between the two modulation strategies. An experimental prototype of the three-level NPC inverter is built. The effectiveness of the hybrid modulation is verified with a resistance-inductance load and a permanent magnetic synchronous motor (PMSM) load, respectively. The experimental results show that reduced switching losses and an acceptable NPP can be effectively achieved in the hybrid modulation strategy.

An Efficient Control Implementation for Inverter Based Harmony Search Algorithm

This research implements a PI controller based on harmony search (HS) optimization algorithm for voltage source inverter to improve the output performance under step load change conditions. The HS algorithm aims to handle the trial and error procedure used in finding the PI parameters and then apply the proposed control algorithm via the eZdsp TMS320F28355 board to link the inverter prototype with the Matlab Simulink. The mean absolute error (MAE) is used as an optimization problem to minimize the output voltage error for the developed controller (PI-HS) as compared to the PI controller based particale swarm optimization algorithm (PI-PSO). Based on the experimental results obtained, it is noted that the proposed controller (PI-HS) provides a good dynamic performance, robustness, constant voltage amplitude, and fast response in terms of overshoot, transient, and steady-state.

Multilevel inverter with optimal THD through the firefly algorithm

Abstract Reduction of the Total Harmonic Distortion (THD) in multilevel inverters requires resolution of complex nonlinear transcendental equations; in this paper we propose a combination of one of the best existing optimized hardware structures with the recent firefly algorithm, which was used to optimize the THD, through finding the best switching angles and guaranteeing the minimization of harmonics within a user defined bandwidth. The obtained THD through the simulation of the thirteen-level symmetric inverter has been reduced down to 5% (FFT of 60 harmonics). In order to validate the simulation results, a thirteen-level symmetric inverter prototype has been made, and practically experimented and tested with different loads. Consequently, the measured THD with resistive load was 4.7% on a bandwidth of 3 kHz. The main advantage of the achieved work is the reduction of the THD.

DC-Link RMS Current Reduction by Increasing Paralleled Three-Phase Inverter Module Number for Segmented Traction Drive

This paper presents a three-phase inverter dc-link capacitor root-mean-square (RMS) current reduction method. The proposed method is especially suitable for high current electric drive applications while multiple switching devices have to be connected in parallel at the package level, such as Toyota Camry or Tesla Model S. This paper analyzed the proposed method theoretically using double Fourier analysis, and derived the optimal operating point. Furthermore, the effectiveness of the proposed method is also verified by simulation under different PWM strategies (SPWM, SVPWM, and DPWM1), carrier shapes (triangle and sawtooth), and power factors. The proposed dc-link capacitor current cancellation method could lead to smaller dc-link capacitor design; the system volume reduction and cost are also estimated with different number of device packages in parallel. The experimental results are also provided using a 6 kW SiC-based inverter prototype assuming three paralleled devices in each phase leg, which are consistent with the theoretical analysis and simulation results.

A Single-Phase Grid-Connected Photovoltaic Inverter Based on a Three-Switch Three-Port Flyback With Series Power Decoupling Circuit

In this paper, a novel single-stage three-port inverter that connects photovoltaic (PV) panel to a single-phase power grid is introduced. In a single-phase grid-connected PV panel, the input power is constant during the line-frequency period, while the output power oscillates at double-line frequency. A series active power decoupling circuit utilizing thin-film capacitors is incorporated to a conventional flyback inverter to handle input and output power differences. Therefore, popularly low-reliable electrolytic capacitors are replaced with small long-lifetime thin film. The proposed inverter can extract the maximum power from PV, deliver a low total harmonic distortion sinusoidal current to the output, and decouple the input and output powers. The proposed power decoupling circuit shares the inverter main switch. Thus, these functions are achieved using just three switches and a simple control scheme which is applicable for both charging and discharging states. Operation principle and control strategy are discussed in detail. Experimental results based on a 100-W prototype inverter verify feasibility and functionality of the proposed inverter.

Single‐stage AC module with series power decoupling capability for connecting PV to a single‐phase power grid

In single-phase grid-connected photovoltaic inverters, the input power is constant during the grid period, whereas the output power oscillates at double-line frequency. Therefore, electrolytic capacitors are widely used to handle the input and output power differences. However, these capacitors have short lifetime which degrade the inverter reliability. This paper proposes a control strategy to turn a conventional four-switch flyback-based inverter to an inverter equipped with a series power decoupling circuit. Therefore, a long lifetime film capacitor can be used as the main energy storage. The modified inverter has an inherent snubber circuit, which can restore energy of the transformer leakage inductance and improves its overall efficiency. The control strategy can realise maximum power point tracking and inject a sinusoidal low total harmonic distortion current to the grid. A 100 W prototype inverter has been built to verify operation and feasibility of the proposed control strategy.

Voltage-Sensorless Control Scheme for a Grid Connected Inverter Using Disturbance Observer

A grid connected inverter usually requires voltage and current measurements to control the active and reactive powers as well as the inverter output currents. While voltage sensors are essential to obtain reliable information on the phase angle, these additional components certainly increase the production costs and complexity. In this paper, a voltage-sensorless control scheme for a grid connected inverter using a disturbance observer (DOB) is presented. The grid voltages are estimated by DOB in the stationary reference frame using the current measurements and reference signals. Even though the DOB estimates the grid voltages with reasonable accuracy in the presence of the uncertainty such as the unbalanced condition and harmonic distortion, the resultant waveform shows a phase lag depending on the estimation bandwidth. To overcome this limitation, a phase lead compensation is introduced. By using these techniques, the phase angle of grid voltages can be completely restored even if the phase angle of grid is initially unknown. The proposed scheme is simple and straightforward. In addition, it does not require any additional hardware. The feasibility of the proposed voltage-sensorless control scheme is demonstrated through simulations and experiments using 2 kVA prototype inverter.

Quick Diagnosis of Short Circuit Faults in Cascaded H-Bridge Multilevel Inverters using FPGA

Fast and accurate fault detection is the primary step and one of the most important tasks in fault tolerant converters. In this paper, a fast and simple method is proposed to detect and diagnosis the faulty cell in a cascaded H-bridge multilevel inverter under a short circuit fault. In this method, the reference voltage is calculated using switching control pulses and DC-Link voltages. The comparison result of the output voltage and the reference voltage is used in conjunction with active cell pulses to detect the faulty cell. To achieve this goal, the cell which is active when the Fault signal turns to "0" is detected as the faulty cell. Furthermore, consideration of generating the active cell pulses is completely described. Since the main advantage of this method is its simplicity, it can be easily implemented in a programmable digital device. Experimental results obtained with an 11-level inverter prototype confirm the effectiveness of the proposed fault detection technique. In addition, they show that the diagnosis method is unaffected by variations of the modulation index.

Experimental Implementation Controlled SPWM Inverter based Harmony Search Algorithm

An optimum PI controller using harmony search optimization algorithm (HS) is utilized in this research for the single-phase bipolar SPWM inverter. The aim of this algorithm is to avoid the conventional trial and error procedure which is usually applied in finding the PI coefficients in order to obtain the desired performance. Then, the control algorithm of the inverter prototype is experimentally implemented using the eZdsp F28355 board along with the bipolar sinusoidal pulse width modulation (SPWM) to control the output voltage drop under different load conditions. The proposed overall inverter design and the control algorithm are modelled using MATLAB environment (Simulink/m-file Code). The mean absolute error (MAE) formula is used as an objective function with the HS algorithm in finding the adaptive values of and parameters to minimize the error of the inverter output voltage. Based on the output results, the proposed voltage controller using HS algorithm based PI (HS-PI) showed that the inverter output performance is improved in terms of voltage amplitude, robustness, and convergence rate speed as compared to PSO algorithm based PI (PSO-PI). This is to say that the proposed controller provides a good dynamic responses in both cases; transient and steady-state. Finally, the experimental setup result of the inverter controller is verified to validate the simulation results.

Modeling and Optimization of a Zero-Voltage Switching Inverter for High Efficiency and Miniaturization

In a zero-voltage switching (ZVS) inverter, high conversion efficiency and miniaturization are expected since switching loss can be dramatically reduced with proper design. In order to realize ZVS condition, auxiliary components such as inductors, capacitors, and switches are embedded in the inverter to implement the function. Since the design of auxiliary components is critical to the ZVS inverter, it is impossible to realize maximum efficiency or minimum size by following the conventional design procedure. This paper introduces an optimized design methodology for a three-phase ZVS inverter with objectives of both high efficiency and miniaturization. Based on the loss models of different commercial IGBT modules under different ZVS conditions, as well as the loss models of auxiliary components and filter inductors, the issue of pursuing highest efficiency and power density is transformed into solving a constrained nonlinear multivariable problem. According to the proposed design methodology, all parameters that influence the efficiency and physical dimensions are considered simultaneously. Thus, the optimized selection of the IGBT module, the parameters of the auxiliary components and the filter inductors would be obtained. A 30-kW three-phase ZVS inverter prototype is built to verify the proposed design method. With proposed design method, the improved prototype has achieved both smaller passive components volume and higher efficiency compared to the former prototype.

Dead Time Effect on the Double-Loop Control Strategy for a Boost Inverter

The boost inverter topology achieves both boosting and inversion in a single stage. Various controllers have been implemented on boost inverters to obtain stable operation. However, the double-loop control strategy is the most appropriate because it provides good performance under nonlinear loads, abrupt load variations, and transient short-circuit conditions. The double-loop control strategy was introduced with proportional integral (PI) controllers used in each loop. Recently, with the widespread use of proportional resonant (PR) controllers, the PI controllers were replaced with the PR controllers to achieve zero steady-state error for the ac components of the reference. However, during the implementation of the PR controllers, a significant dc offset in the output voltage of the boost inverter was observed. Furthermore, the output voltages of the boost converters showed a clipping effect. In this paper, it is shown that the dc offset and the clipping of the boost converters are attributed to the dead time and parameter mismatch between the boost converters. A new controller is proposed to reduce the dc offset and clipping effect. The improved performance of the proposed controller is demonstrated with experimental results on a boost inverter prototype.