Inverter Prototype Research Articles

Implementation of an Optimum Reduced Components Multicell Multilevel Inverter (MC-MLI) for Lower Standing Voltage

Multilevel inverters (MLI) with reduced components are becoming popular to achieve higher voltage levels with lower cost and complexities of the circuit. Most of the reduced switch MLIs use a large number of isolated voltage sources that have a large total standing voltage (TSV) and higher losses. Moreover, many reduced component MLIs have been developed to reduce the number of switches only and have not utilized the dc-link voltages properly. Thus, an inverter needs to be designed in which the number of dc sources is also small and utilized fully. In this paper, a novel single-phase, multicell MLI configuration is presented that can generate a maximum number of output voltage levels using a minimum number of switches and dc sources. Two optimal configurations of the proposed MLI are proposed based on the minimum requirements of components with the optimum voltage stress of the highest rated switches. Moreover, the TSV of the proposed optimal MLI also becomes low. A generalized multicell optimum MLI is presented and the number of components, voltage stress of all the switches, and the TSV of the proposed as well as the other inverters also determined by the generalized expressions for comparison purpose. The prototype of a specimen 15-level inverter and the optimal 75-level inverter cell is further developed and implemented using DS 1103 in the laboratory to show the effectiveness of the proposed configuration. The experimental results corresponding to the different modulation indices are presented here for the verification of the simulation results.

Parallel Resonant DC Link Inverter Topology and Analysis of Its Operation Principle

To realize a soft-switching inverter with the advantages of simple structure, high efficiency, low voltage stress, and easy to control, a novel parallel resonant dc link inverter with the function of pulse current regeneration is proposed in this paper. All switches in the inverter main circuit can achieve zero-voltage-switching (ZVS) turn-on and ZVS turn-off. All switches in the auxiliary commutation circuit (ACC) can achieve soft-switching. The power in the ACC is small. Freewheeling diodes in the inverter turn off under the zero-current condition, which can reduce the reverse recovery loss of freewheeling diodes. In addition, the bulk capacitors are avoided in the circuit and there is no neutral point potential variation problem. At the same time, the zero-voltage duration is independent of the load current, and the time of transition can be selected freely. According to the equivalent circuits in different operation modes under the proposed modulation strategy, the operation principle, soft-switching implementation condition, and parameter design procedure of the proposed inverter are analyzed successively in this paper. Finally, a 10-kW–10-kHz soft-switching inverter prototype with insulated gate bipolar transistor (IGBT)-based switches is built. Experimental results are given to demonstrate the validity and features of the soft-switching inverter.

Hierarchical Control for Virtual Oscillator Based Grid-Connected and Islanded Microgrids

Virtual oscillator control (VOC) is a nonlinear time domain controller that achieves significantly faster primary control response in islanded microgrids, compared to droop or virtual synchronous machine (VSM) control. Despite its superior performance, adoption of VOC is limited due to the lack of compatible secondary regulation or grid synchronization techniques. This is attributed to the nonlinear nature of VOC that complicates secondary control design, and the third-harmonic component in VOC output voltage that severely restricts grid-tied operation. To leverage the faster primary control response characteristics of VOC, we propose a compatible hierarchical control structure that enables operation and seamless transition between islanded and grid-connected modes. In the islanded mode, the controller achieves voltage and frequency regulation and grid synchronization; in the grid-tied mode, notch filters are used to suppress harmonic currents and tertiary level power reference tracking is achieved. The proposed controllers are validated through a series of real-time hardware-in-the-loop tests and hardware experiments using laboratory inverter prototype and state-of-the-art controls and communications hardware.

Buck-Boost Single-Inductor Multiple-Output High-Frequency Inverters for Medium-Power Wireless Power Transfer

In this paper, a nonisolated buck-boost single-inductor multiple-output (SIMO) dc–ac inverter for driving multiple independent high-frequency ac outputs of medium power is proposed. Compared with traditional bridge-type inverters, the proposed buck-boost SIMO inverter achieves 1) a smaller component count, 2) fully independent power control of its outputs, 3) better scalability in increasing the number of ac output channels, and 4) higher power efficiency. Operating in pseudo-continuous conduction mode, the rated power of each output channel of this inverter can be high while attaining zero cross regulation. The scalability factor of the proposed inverter is formally investigated and the theoretical maximum number of ac outputs is analytically derived. The targeted application of this SIMO-based inverter is for driving multiple transmitter coils to realize versatile multidevice medium-power wireless power transfer. A hardware prototype of a single-inductor three-output buck-boost inverter delivering a medium power of 8.4 W per output channel has been constructed. It is experimentally verified that precise and independent current regulation of individual transmitter coil is achievable with the proposed inverter.

A Novel Eight-Channel Grid-Connected Three Phase Converter

In order to improve power quality to reduce harmonics in ac mains, traditional three phase grid-connected converter was usually working at high switching frequency mode, which caused system’s low conversion efficiency and restricted its application in high power conversion. This paper studied an eight-channel three-phase converter based on space vector modulation (SVM) plus phase shift control strategy in which its main circuit was composed of two groups multipulse converters with the same structure by parallel connection at DC side and series at AC side. This novel converter can output sine wave with very little harmonic content at AC side under three times the fundamental frequency switching mode, thus the high quality of grid current can be obtained with very small filter used at grid side. A 50kW eight-channel grid-connected three phase inverter prototype is developed, experiment results show that the multipulse three phase converter has the advantages of high quality grid current, low switching frequency, good transient performance and system reliability.

Single stationary domain equivalent inverter admittance for three‐phase grid‐inverter system considering the interaction between grid and inverter

Admittance matrix has been used to represent the characteristics of three-phase inverter for grid-inverter system stability evaluation in both stationary, sequence, and dq domain. For the dq domain admittance matrix, the PLL and Park transformation introduce additional dynamics during the admittance measurement that may influence the application of dq model. For the stationary and sequence domain admittance matrix, the model measurement is not affected by the above additional parts but may also encounter other difficulties in actual measurement. First, current frequency response analyser (FRA) is not able to perform two-frequency measurement required by the admittance matrix. Second, practical limitations exist in the course of solving complex-valued admittance matrix equations. Here, a single stationary domain equivalent admittance of three-phase inverter for grid-inverter system with considering the interaction between grid and inverter is defined so that the above two difficulties can be avoided. Then, an equivalent admittance model of prototype inverter is constructed for stability analysis of the grid-inverter system using Nyquist stability criterion, instead of the generalised Nyquist criterion (GNC). The effectiveness of the proposed equivalent inverter admittance model is validated through simulation and experiment verification.

Transformerless Quasi-Z-Source Inverter to Reduce Leakage Current for Single-Phase Grid-Tied Applications

The conventional single-phase quasi-Z-source (QZS) inverter has a high leakage current as it is connected to the grid. To address this problem, this paper proposes a transformerless QZS inverter, which can reduce the leakage current for single-phase grid-tied applications. The proposed inverter effectively alleviates the leakage current problem by removing high-frequency components for the common-mode voltage. The operation principle of the proposed inverter is described together with its control strategy. A control scheme is presented for regulating the DC-link voltage and the grid current. A 1.0 kW prototype inverter was designed and tested to verify the performance of the proposed inverter. Silicon carbide (SiC) power devices were applied to the proposed inverter to increase the power efficiency. The experimental results showed that the proposed inverter achieved high performance for leakage current reduction and power efficiency improvement.

Observer-Based Capacitor Current Sensorless Control Applied to a Single-Phase Inverter System With Seamless Transfer

In this paper, capacitor current sensorless control by using an observer is applied in a seamless transfer single-phase inverter. The proposed control system is a multiloop control system. The control loop is composed of a capacitor voltage outer control loop and capacitor current inner control loop for stand-alone mode. For on-grid mode, the grid current outer loop controller is combined with the stand-alone control structure to form a simple controller structure for mode switching. The capacitor current feedback signal is calculated using the observer in the discrete-time domain and thus sensors are not required. Use of the proposed observer for the inverter with capacitor current control has many advantages, such as sensorless capacitor current calculation, one-sample-ahead data prediction for sampling delay compensation, and an average capacitor current without ripple components. Verification of the theoretical analysis is presented through simulation and experiment. A 5-kW single-phase inverter prototype combined with a Li-ion battery is set up with a digital controller using a TI TMS320F28377D microcontroller unit to confirm the feasibility of the system.

Model-based temperature estimation of power electronics systems

This paper proposes a method for accurate temperature estimation of thermally-aware power electronics systems. The duality between electrical systems and thermal systems was considered for thermal modeling. High dimensional thermal models present a challenge for online estimation. Therefore, the complexity of the thermal network was reduced by applying a structure-preserving model order reduction technique. An optimal number and placement of temperature sensors were used in a Kalman filter to accurately estimate the dynamic spatial thermal behavior of the system. The optimal number of temperature sensors was found by comparing the actual values of the states obtained from the thermal model to the estimated values of the states obtained from the Kalman filter. The optimal placement of temperature sensors was found by maximizing the trace of the observability Gramian. Simulation and experimental results validate the approach on a prototype inverter.

Reduction in components using modified topology for asymmetrical multilevel inverter

PurposeThis study aims to propose a modified topology for an asymmetric multilevel inverter as a basic module that generates 13-level output voltage waveform. The basic module consists of eight switches (unidirectional and bidirectional switch) and four DC voltage sources with unequal magnitudes. The proposed topology reduces the number of switches, isolated DC sources, cost and size of the circuit significantly as compared to other topologies. In addition, the proposed circuit provides a modular structure for a multilevel inverter.Design/methodology/approachThe proposed configuration is implemented through simulation and hardware development of a single-phase 13-level inverter prototype. A multicarrier-based pulse width modulation scheme is adopted for generating switching signals by using dSPACE real-time controller.FindingsTo demonstrate the advantages of the proposed configuration, a comparative analysis is carried out with other multilevel topologies in terms of number of switches, gate driver circuits, on-state switches and blocking voltage on the switches. The comparison results confirmed that the proposed configuration requires less number of components for the same number of voltage levels. Moreover, the peak inverse voltage on switches and losses is lower in the proposed configuration.Originality/valueIn the available literature, numerous topologies are presented with main emphasis on the reduced components count. In this study, the authors proposed a new topology for an asymmetrical source configuration. The performance of the proposed topology under steady-state and dynamic conditions is evaluated using simulation and experimental implementation.

Direct power control with common mode voltage reduction of grid‐connected three‐level NPC inverter

This paper proposes three new direct power control (DPC) algorithms which minimise the variation of the common mode voltage (CMV) provided by a transformerless grid-connected three-level neutral point clamped (3L-NPC) inverter. The proposed techniques make use of three reduced switching tables designed with the aim to control the active and reactive powers and to minimise the variation of the CMV. The first switching table uses large, medium and zero vectors of the space vector diagram; it is therefore named large medium zero vectors DPC. The second table uses the medium and zero vectors. It is referred to as medium zero vectors DPC. The third one namely medium vectors DPC, uses only medium vectors. Numerical simulations and experimental tests carried out on a laboratory prototype of the 3L-NPC inverter confirm the feasibility and effectiveness of the proposed algorithms.

Hybrid PWM Strategy for Power Efficiency Improvement of 5-Level TNPC Inverter and Current Distortion Compensation Method

This paper proposes a pulse width modulation (PWM) strategy for improving the efficiency of a 5-level H-bridge T-type neutral point clamped (TNPC) inverter. In the case of the proposed PWM strategy, unlike the conventional PWM strategy in which both of the switching legs of the H-bridge inverter operate at a high frequency, one switching leg of the inverter operates at a low frequency. As the switching frequency is lowered, the switching loss is reduced, this improving the efficiency of the system. The duty references for the switching legs and the operating principle of the inverter are described in detail. The proposed PWM strategy, however, causes distortion of the output filter inductor current. The cause of the distortion has been analyzed and a compensation method is proposed to mitigate the distortion of the current. The effect of the proposed PWM strategy can be predicted through the loss calculation of the inverter for each modulation strategy. Furthermore, current distortion mitigation obtained by compensation method is confirmed through the simulation. In order to verify the effectiveness of the proposed strategy, a 2 kW H-bridge TNPC inverter prototype is implemented and tested. The simulation and experimental results show that the efficiency of the inverter is improved when the proposed PWM strategy is applied.

Reduction of EMI Noise Due to Nonideal Interleaving in a 100 kW SiC PV Converter

A Grid-tied inverter utilizing wide bandgap devices can achieve higher switching frequency resulting in a power filter with reduced size and weight. However, the increased switching frequency may lead to more switching harmonics entering the electromagnetic interference (EMI) frequency range, which will increase the size of EMI filter. Interleaving paralleled converters can cancel some of the switching harmonics and reduce the size of EMI filter. However, nonideal interleaving will deteriorate the harmonic canceling effect. In this research, the nonideal effects are found to be from the small mismatch of the pulsewidth of the interleaving legs and the mismatch of the impedance between the interleaving legs. A modulation method is proposed to completely eliminate the pulsewidth mismatch. Compared with other solutions, the proposed method does not require the information of filter parameters, neither gate driver synchronization, and nor a special function block of the digital controller. The proposed modulation was implemented on a 150 MHz digital signal processor and a 100 MHz field-programmable gate array, and was experimentally verified on a 100 kW parallel coupled SiC PV inverter prototype.

A Series of New Control Methods for Single-Phase Z-Source Inverters and the Optimized Operation

This paper proposes a series of new control methods for single-phase Z-source inverters. A detailed description of the concept and principle of each method is first presented, then a comparison among them is conducted comprehensively. Afterwards, an optimized closed-loop control scheme with better harmonic elimination performance is derived. Experimental results obtained from a 1kW un-isolated Z-source inverter prototype have demonstrated the effectiveness of the proposed control method. Compared to the conventional boost control, the proposed scheme has better performance with reduced harmonics, more flexible voltage gain, and simple algorithm.

Multiple resonant controllers strategy to achieve fault ride‐through and high performance output voltage in UPS applications

A control strategy to achieve fault ride-through capability and to provide high performance of the output voltage of a single-phase uninterruptible power supply (UPS) inverter is proposed in this study. This strategy consists in controlling the voltage and current waveforms measured at the inverter output filter, with an inner current control loop and an outer voltage control loop, using a plug-in structure based on multiple resonant stages in addition with proportional controllers. In order to achieve stability from no load to short-circuit conditions, the implementation of the multiple resonant controllers includes a compensation of the system phase lag. Moreover, it presents a comparative analysis between two controller structures, the proposed plug-in and the classical proportional + resonant. From this analysis, it can be concluded that the plug-in structure presents improved characteristics of closed-loop output impedance and output voltage dynamic response during fault ride-through events. A controller design methodology to achieve robustness to parametric uncertainties and UPS standard compliance, is detailed. Experimental results from a single-phase 2 kVA inverter prototype are presented to validate the feasibility of the proposal.

Dual‐frequency induction heating for gear hardening: converter, resonant circuit, and FEM modelling

In order to achieve required mechanical properties of hardened elements, such as gear wheels, dual-frequency induction heating may be used. Dual-frequency allows heating only the outline of the gear, due to mixed penetration depth of the subject frequencies. This method of hardening requires the process to be very short as heat may spread by means of conduction. This study presents a 3 kW prototype inverter and its control scheme is used to generate dual-frequency output current. The overall efficiency of the inverter is 96%. An analysis of the output resonant circuit is made to find the resonant frequencies. Finally, circuit and finite element method (FEM) simulations are coupled to analyse the effect of dual-frequency current on the magnetic field, current density, and energy density on the surface of a gear wheel.

Design and Implementation of Digital Phase Locked Loop for Single-Phase Grid-Tied PV Inverters

In this article, a synchronous rotating-frame based phase-locked loop (PLL) for a single-phase PV inverter control system is presented. Detailed PLL mathematical model and the digital implementation for a single-phase PV inverter system are presented. A practical solution for transport delay based orthogonal signal generation using first-in-first-out (FIFO) circular buffer is also discussed. Details of implementation for a real-time system using digital signal processor were also described. The performance of the developed PLL was experimentally verified on a developed single-phase PV inverter prototype.

An Improved PWM Scheme for Three-Level Inverter Extending Operation Into Overmodulation Region With Neutral-Point Voltage Balancing for Full Power-Factor Range

This paper presents a carrier-based pulsewidth modulation (PWM) strategy for a three-level neutral-point-clamped (NPC) inverter that exhibits good control over dc-link capacitor voltages and mitigates low-frequency oscillations in the neutral point (NP) for operation extending into overmodulation region. The overmodulation signals are derived in a generalized way by first determining a bias signal from the zero-sequence injected signals, and then adding the bias with the modulating signals. Such an approach enables seamless transition across different modulation modes covering full modulation depth. It is shown that the incorporation of a signal compression factor generates a nonzero duty ratio for NP connectivity in every PWM cycle in overmodulation region, and thereby creates a room for addition of unbalance compensation signal which can be used to generate neutral current to mitigate existing unbalance in capacitor voltages in the overmodulation region. The compensating signals are in phase with the load currents exhibiting linearity in compensation for full power-factor range. A thorough investigation of the PWM algorithm for operation in both undermodulation and overmodulation with NP voltage regulation is carried out. The performances of the proposed scheme are evaluated through extensive simulation and validated by experiments using a three-level NPC inverter prototype with induction motor load.

Prototype of Implementation SVPWM Inverter in RTI with V/F Control Based Reluctance Machines Application

The paper proposes and investigates a suitable voltage time model implemented in real-time interface. In order to evaluate and compare performance of the emerging brushless doubly-fed reluctance machine (BDFRM) in conjunction with the response to software based architecture a scalar control is integrated into real-time dSPACE platform. The necessary algorithm was integrated and uploaded into dSPACE platform requiring the configuration arrangements of voltage and time vectors. Moreover, machine dynamics and mathematic model were identified, interlinked and synchronised with space vector pulse width modulator (SVPWM). In doing so the time vectors were aligned with RTI microprocessor and/or hardware-in-the-loop (HIL). The RTI library blocks were utilized to enable and substitute the actual machine parameter and match reference data accordingly. Consequently, the controller SVPWM coupled together with the proposed V/f control for the prominent BDFRM have been simulated and experimentally verified under the variable speed operating conditions. The feasibility, correctness and robustness of the proposed controller is validated and corroborated against the qualitative and quantitative data.

LCL Filter Design with EMI Noise Consideration for Grid-Connected Inverter

The grid-injected current total harmonics distortion (THD) and electromagnetic interference (EMI) noise must be considered in a transformer-less grid-connected inverter for a more electric aircraft (MEA) system. This paper develops a procedure for the design of the magnetic components of the LCL filter used in harmonic control and EMI reduction of the silicon carbide (SiC) grid-connected inverter in the MEA. The LCL filter is designed with effective harmonic attenuation and a compact size. To meet the space constraint requirement, specific design attention is focused on a customized amorphous cored inductor, with a comprehensive study of the relationships of inductor winding with respect to EMI noise. Reduced THD and EMI are verified through experiments performed on a 30 kW, 230 V/400 Hz three-phase grid-connected inverter prototype with the LCL filter.