Proposed Switching Pattern Research Articles

Control of Regenerative CHB Motor Drives at Fundamental Switching Frequency

To handle the high-power regeneration power in coal and mine industry applications, the regenerative version of the cascaded H-bridge (CHB) drives is made possible by replacing the diode-front-end rectifier with a three-phase IGBT-based active-front-end (AFE) rectifier in each power cell. However, the IGBT switching devices introduce extra switching losses to the system that must be properly handled due to the thermal constraints in high power medium voltage drive applications. In this article, a novel fundamental switching frequency control strategy is proposed for the AFEs in the regenerative CHB drive. With the proposed control strategy, the main harmonic contents generated by the AFEs are well-reshaped at a low-order harmonics range which can be further eliminated by the existing front-end phase-shifting transformer. This allows accomplishing the meeting of the IEEE std 519-2014 at the fundamental switching frequency <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sw</sub> = 60. Moreover, with the proposed switching pattern, IGBTs can be turned <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> at zero current and therefore it can reduce switching losses simultaneously. The feasibility of the proposed control strategy is verified by experimental results on a seven-level regenerative CHB drive, which can be extended to regenerative CHB drives with any voltage levels.

Active Impedance Network Buck-Boost Three-Level T-Type Inverter With Enhanced Voltage Gain

This paper proposes a new PWM technique for a reduced-component-count active impedance network (RCC-AIN) three-level inverter to maximize the input/output (I/O) voltage gain. Although the max boost control (MBC) technique offers the same I/O voltage gain, it suffers from the drawback of low-frequency (LF) ripples of the source current. In contrast, the proposed PWM technique is a combination of improved MBC (IMBC) and a new switching state pattern that eliminates this drawback and offers up to 79% reduction in the peak-to-peak ripple value of the source current while maintaining the same I/O voltage gain as MBC. The cumulative sum of ripple components is used to find the exact maximum and minimum peaks of the source current over the fundamental period. The proposed switching pattern doubles the switching frequency of a boosting switch to limit the current spikes of capacitors during state change-over. The RCC-AIN topology was analyzed in various voltage-boosting techniques, and the proposed PWM technique utilizes the full potential of the RCC-AIN topology in a better way. The findings have been verified using theoretical calculations, simulation, and experimental results.

Investigation of Staggered PWM Scheme for AC Common Mode Current Minimization in SiC-Based Three-Phase Inverters

The advent of SiC devices which results in lower rise times and steep <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{d}v/\text{d}t$ </tex-math></inline-formula> at the inverter terminal can compromise the common mode (CM)-conducted emissions’ compliance, motor peak ac -CM currents, and leakage currents. Consequently, this results in a high ac and dc side CM filter weight. AC filters at the inverter output terminal are effective in reducing the slew rate of inverter voltage thereby reducing the peak CM current. However, a special case with high <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{d}v/\text{d}t$ </tex-math></inline-formula> arising from low duty cycles is found to increase the peak ac-CM current significantly. Reduced CM voltage (CMV) schemes are popular pulsewidth modulation (PWM) methods to minimize the peak CMV but suffer from high <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{d}v/\text{d}t$ </tex-math></inline-formula> under this special case as well. In this article, a staggered PWM scheme to minimize such peak ac -CM currents for a high-speed variable frequency drive (VFD) is evaluated using a three-level SiC-based T-type inverter as a demonstrator. From the analysis, the proposed switching pattern shows benefits over conventional sinusoidal PWM (SPWM) scheme and is found to be scalable to other PWM schemes and voltage levels. Simulation and experimental results are shown to validate the performance of the proposed switching pattern.

GaN-Based DC-DC Resonant Boost Converter with Very High Efficiency and Voltage Gain Control

This paper presents a concept for the operation of a resonant DC–DC switched-capacitor converter with very high efficiency and output voltage regulation. In its basic concept, such a converter operates as a switched-capacitor voltage doubler (SCVD) in the Zero Current Switching (ZCS) mode with a constant output voltage. The proposed methods of switching allow for the switched-capacitor (SC) converter output voltage regulation, and improve its efficiency by the operation with Zero Voltage Switching (ZVS). In this paper, various switching patterns are proposed to achieve high efficiency and the output voltage control by frequency or duty cycle regulation. Some examples of the application of the proposed switching patterns are presented: in current control at the start-up of the converter, in a bi-directional converter, and in a modular cascaded system. The paper also presents an analytical model as well as the relationships between the switching frequency, voltage ratio and efficiency. Further, it demonstrates the experimental verification of the waveforms, voltage ratios, as well as efficiency. The proposed experimental setup achieved a maximum efficiency of 99.228%. The implementation of the proposed switching patterns with the ZVS operation along with the GaN-based (Gallium Nitride) design, with a planar choke, leads to a high-efficiency and low-volume solution for the SCVD converter and is competitive with the switch-mode step-up converters.

An optimal six vector switching pattern in matrix converters for reducing harmonics and switching loss

This paper analyses harmonic distortion caused by the narrow pulse problem in matrix converters, and presents an improved switching pattern that is based on the basic five vector switching pattern. With limited switching frequencies, the improved pattern solves the narrow pulse problem by applying an additional zero vector and adjusting the sequence of the four active vectors at the same time to minimize the switching times. Simulation results show that in the six vector switching pattern, a) the low-frequency harmonics caused by the narrow pulse problem is greatly reduced; b) the average switching frequency is reduced compared with the five vector pattern; c) the sampling frequency harmonics are apparently attenuated though a little 1/2 and 3/2 sampling frequency harmonics are produced; d) THD of output current is improved to the same level of the three zero vector switching pattern (TZVSP); e) The proposed switching pattern has benefit in both normal and unbalance input voltage conditions. Experimental results on a matrix converter platform verify the benefits of the six vector switching pattern. Faster dynamic, lower harmonics and lower loss can be achieved by using the proposed six vector switching pattern.

Controlled diode bridge clamped three level Z source inverter and its PWM control

ABSTRACT Controlled Diode Bridge Clamped (CDBC) three level inverter configuration is the optimized version of T-type voltage source inverter in terms of power switches and their associated gate driver components. After a brief introduction of CDBC VSI, this paper implements the concept of Z-source inverter into this configuration. The three level SVPWM technique has been used for the generation of gating pulses. It has been pointed out that, in contrast to three level VSI, the switching frequency of three level ZSI depends on the modulation index for any particular carrier frequency. Also, a new switching state pattern has been suggested for optimizing the switching frequency of the power switches using max constant boost (MCB) and simple boost control (SBC) approach of voltage boosting. Comparing the same category of MCB or SBC control, the proposed switching pattern offers minimum switching frequency of power switches without affecting total harmonic distortion of line voltage/current as compared to the existing PWM switching patterns of three level ZSI. The condition of nearest three vector switching has been followed to ensure better output waveform quality. Simulation and experimental results verify the proposed inverter configuration and its PWM technique.

Enhanced Switching Pattern to Improve Cell Balancing Performance in Active Cell Balancing Circuit Using Multi-Winding Transformer

Cell balancing performance is an important factor in determining the operational efficiency of the active cell balancing circuit. Thus, this study approached this need by developing an enhanced switching pattern. The circuit is designed to transfer energy between arbitrary source and target cells. It has been operated in flyback and buck-boost modes according to the position of the source and target cells. In this circuit, the coupling coefficient of the transformer considerably affects the balancing performance of the flyback operation. The energy transferred to the non-target cell is increased by the low-coupling coefficient due to the leakage inductance. Therefore, the high energy transfer ratio cannot be achieved using conventional switching patterns. In this paper, a new flyback switching pattern is proposed, which can minimize the effect of the coupling coefficient in the cell balancing operation. The proposed switching pattern uses the cells which do not participate in the balancing process to control the voltage applied to each winding, which results in a high energy transfer ratio irrespective of the coupling coefficient. In addition, an enhanced operating method has been proposed to improve the cell balancing speed by reducing the energy transfer path in specific cell conditions. The performance of the proposed switching pattern was verified in a 15 W cell balancing circuit.

Advanced Modulations for a Current-Fed Isolated DC–DC Converter With Wide-Voltage-Operating Ranges

An active-bridge-active-clamp (ABAC) topology with its associated switching patterns and modulation techniques is introduced in this paper. The topology has been designed to comply with stringent power quality requirements in a More Electric Aircraft application. The dual transformer secondary structure of the ABAC allows the definition of a particular phase shift-based switching pattern. The proposed switching pattern ensures not only the output current switching harmonics elimination but also even power sharing between the secondary half-bridges. Consequently, passives on the low-voltage side of the converter are minimized, and transformer dc bias is eliminated. All these features can be achieved independently from the operating point of the converter. In this paper, the basic operation of the ABAC converter is first introduced. The theoretical analysis of switching harmonics elimination and power sharing is then carried out in the development of the proposed switching patterns. The theoretical claims are validated by both simulation and experimental results on a 10-kW 270-V/28-V ABAC converter.

Two different non‐shoot‐through operating modes for generating changeable general boost factor in switched Z‐source inverters with modified modulation technique

In this study, a new switching pattern for switched Z-source inverters (ZSIs) is proposed. By this technique, the switched ZSIs can generate general boost factor with different functions. The proposed modulation technique is a general technique and can be applied for all types of switched boost inverters, switched ZSIs and active ZSIs. The mentioned inverters do not use additional passive elements in comparison with the conventional ZSI. Moreover, variable boost factor with ability of changing both switching factor and shoot-through duty cycle makes these inverters more valuable than transformer-based ZSI. Applying the proposed technique leads to make different non-shoot-through (nST) operating modes which are named adjacent-nST and non-adjacent-nST operating modes. The extraction of equations and steady-state analyses for a type of switched ZSIs in different operating modes are presented. In addition, the design considerations and calculation of critical inductance in the new switching pattern are given. The logical diagram of the switching pattern is introduced and comparison between different types of switched ZSIs with the proposed switching pattern from different aspects is done. Finally, the simulation and experimental results are given to show the good agreement between the theoretical and measured results.

An Interleaved Bi-Directional AC–DC Converter With Reduced Switches and Reactive Power Control

In this brief, a new interleaved ac–dc converter with a reduced number of semiconductor components for high power energy storage applications is proposed. The interleaved structure reduces the ac side current ripple as well as increases the overall current rating. Moreover, the proposed switching pattern reduces switching and the developed controller provides reactive power control during both power flow directions. The proposed structure is simulated and analyzed using MATLAB/Simulink software, and a 3.5 kW prototype of the system has been implemented in the lab. The results confirm the performance of the proposed topology. There is a seamless transition between operation with different power factors and the current ripple is significantly reduced.

A bidirectional non-isolated hybrid modular DC–DC converter with zero-voltage switching

In this paper, a bidirectional non-isolated hybrid modular DC–DC converter for high-voltage (HV) applications is investigated. In this configuration, conventional Half-Bridge Sub-Modules (HB-SMs) are employed. The proposed DC–DC converter is based on connecting the SMs capacitors in series across the high DC voltage level while connecting them sequentially across the low DC voltage level. On another frontier, an HV valve, based on series-connected Insulated-Gate Bipolar Transistors (IGBTs), is required at the HV side. The main confronted challenge of the series-connected IGBTs is the voltage sharing during turn-on and turn-off periods, which necessitates the engagement of an intricate voltage sharing technique. In this work, a switching pattern is proposed to ensure zero-voltage switching (ZVS) of the involved HV valve. In order to reduce the switching losses and avoid complex active gate control recruited for dynamic voltage sharing, the zero-voltage state is extended beyond the switching time. A detailed illustration of the hybrid modular DC–DC converter is presented, elucidating the proposed switching pattern. Simulation results, using Matlab/Simulink platform, are presented to validate the contribution of the paper. Finally, a scaled-down prototype is employed for experimental verification.

Model Predictive Direct Power Control of Three-Phase Grid-Connected Converters With Fuzzy-Based Duty Cycle Modulation

An improved model predictive direct power control (MPDPC) for three-phase grid-connected converters is proposed. In the proposed method, two voltage vectors are applied during a control period and their duty cycles are determined by a fuzzy logic-based modulator. The inputs to the modulator are the active and reactive power errors and the output is the duty cycle of the first (main) voltage vector. The fuzzy rules are developed based on expert knowledge and the fact that small/large power errors can be compensated by applying the main voltage vector for a small/large portion of the switching period. The candidate voltage vector pairs are examined on a control Lyapunov function and the pair that satisfy the closed-loop stability criteria are selected. The voltage vector pairs are then applied following a proposed switching pattern through which reduced average switching frequency is achieved. Comparative simulation and hardware-in-the-loop studies between the proposed method and a most recently introduced duty cycle-based MPDPC confirm that in addition to lower average switching frequency, better quality currents and active and reactive powers can be achieved under the proposed MPDPC.

An Effective SVM Method for Matrix Converters With a Superior Output Performance

This paper presents the development of an effective space vector modulation (SVM) regarding matrix converters (MCs) for the full range of the voltage transfer ratio (VTR), whereby a superior output performance was achieved. The proposed method uses all of the vectors adjacent to the reference output-voltage vector in one sector to build a unique general switching pattern to drive the MC. For the purpose of pursuing the high output performance of MCs, the proposed switching pattern can be applied to low and high VTRs with a unique modulation strategy owing to generalized equations. In addition, an output current-ripple-minimization technique is also accomplished through a design of the duty cycles of zero vectors that enhances the output performance for the MC. With the unique switching pattern, the proposed SVM method can be easily implemented. The experiment results are given to confirm the effectiveness of the proposed method.

Modulation and control of ac/dc matrix converter for battery energy storage application

In this study, ac/dc matrix converter is applied in battery energy storage system (BESS). Aiming at reducing the dc current ripple and regulating the active and reactive power, modulation and control strategies are investigated in depth. First, a novel dc current ripple analysis approach using a geometric description of ripple vector locus is proposed. Then a simple optimal switching pattern with minimum dc current ripple under arbitrary power factor condition is developed and is compared with conventional switching patterns. On the basis of the characteristics of ac/dc matrix converter, a control scheme suitable for BESS is presented. The strategy can realise independent grid side active power control (battery charging/discharging control) and reactive power control. The simulation and experimental results verify the effectiveness of the proposed switching pattern and control strategy, and demonstrate the feasibility of applying ac/dc matrix converter in BESS.

Optimal Switching Pattern for PWM AC-AC Converters Using Bee Colony Optimization

This paper proposes a harmonic reduction approach for a pulse width modulation (PWM) AC-AC converters using Bee Colony Optimization (BCO). The optimal switching angles are provided by BCO to minimize harmonic distortions. The sequences of the PWM switching angles are considered as a technical constraint. In this paper, simulation results from various optimization techniques including BCO, Genetic Algorithm (GA), and Particle Swarm Optimization (PSO) are compared. The test results indicate that BCO can provide a better solution than the others in terms of power quality and power factor improvement. Lastly, experiments on a 200W AC-AC converter confirm the performance of the proposed switching pattern in reducing harmonic distortions of the output waveform.

Enhanced three‐phase multilevel inverter configuration

This study reports a three-phase multilevel inverter (MLI) topology. The MLI configuration generates voltage levels similar to the corresponding well-known conventional diode-clamped, flying capacitors and cascaded H-bridge inverters but with fewer power circuit components and simplicity. By optimising the proposed switching patterns through analysis, the total harmonic distortion of the inverter output line voltage waveforms have been reduced. The validity of the proposed cascade MLI is verified through simulation and experiments.

Cascaded H-bridge PWM 멀티레벨인버터의 스위칭 손실 저감을 위한 효율적인 스위칭 패턴

It presents an efficient switching pattern, which expects a reduction of switching losses in a cascaded H-bridge PWM multilevel inverter. By the proposed switching scheme, the lower H-bridge module operates at low frequency of 60[Hz] because it assigns to transfer most load power. The upper H-bridge module operates at high frequency of PWM switching to improve THD of output voltage. The proposed switching pattern applies to cascaded H-bridge multilevel inverter with PD, APOD, bipolar, and unipolar switching methods. By computer-aided simulations, we verify the validity of the proposed switching scheme. Finally, we prove that the proposed PD and APOD switching patterns are better than those of the conventional one in efficiency.

A new approach for SVPWM of a three-level inverter-induction motor fed-neutral point balancing algorithm

In this paper the performance of a neutral point clamped (NPC) three-level voltage source inverter is investigated. The inverter feeds an electric drive which is controlled by field oriented control (FOC). The improvement of the control scheme is achieved using Mamdani’s fuzzy logic controller for both rotor speed and inverter current. The main issue of this work is neutral point (NP) balancing for a three-level NPC inverter combined with a new Space Vector Pulse Width Modulation (SVPWM) algorithm. The performance of the electric system is verified via Matlab/Simulink©. The operation of the electric system is investigated in steady state and transient responses in both cases whether using or not the NP balancing algorithm. Finally, the ability of the proposed switching pattern generation algorithm for NP balancing is established.

Three-phase, Five-level Multi-level Inverter Topology

This article reports a three-phase multilevel inverter topology. The multilevel inverter configuration generates voltage levels similar to the corresponding well-known conventional diode-clamped, flying capacitors and cascaded H-bridge inverters but with fewer power circuit components and simplicity. By optimizing the proposed switching patterns through analysis, the total harmonic distortion of the inverter output line voltage waveforms have been reduced. The validity of the proposed cascaded multilevel inverter is verified through simulation and experiments.

3상 매트릭스 컨버터의 고효율 변조방법 설계 및 시뮬레이션

A matrix converter is used for converting AC/AC power directly. In order to generate sinusoidal input/output waveform in matrix converter, it uses nine bidirectional switches and PWM modulation. This paper presents an analytical averaged loss model of matrix converter with DDPWM(direct duty ratio PWM) and proposes a new switching method for reducing switching losses. A Mathematical loss models with average magnitude of voltage/current are classed as conduction and switching loss. The proposed switching pattern is improved with existing DDPWM. To prove improved efficiency with proposed DDPWM, this paper compares losses between suggested switching pattern and conventional switching pattern using mathematical and simulation method. Each loss types are influenced by environmental factors such as temperature, switching frequency, output current and modulation method.