Controlled diode bridge clamped three level Z source inverter and its PWM control

Abstract

ABSTRACT Controlled Diode Bridge Clamped (CDBC) three level inverter configuration is the optimized version of T-type voltage source inverter in terms of power switches and their associated gate driver components. After a brief introduction of CDBC VSI, this paper implements the concept of Z-source inverter into this configuration. The three level SVPWM technique has been used for the generation of gating pulses. It has been pointed out that, in contrast to three level VSI, the switching frequency of three level ZSI depends on the modulation index for any particular carrier frequency. Also, a new switching state pattern has been suggested for optimizing the switching frequency of the power switches using max constant boost (MCB) and simple boost control (SBC) approach of voltage boosting. Comparing the same category of MCB or SBC control, the proposed switching pattern offers minimum switching frequency of power switches without affecting total harmonic distortion of line voltage/current as compared to the existing PWM switching patterns of three level ZSI. The condition of nearest three vector switching has been followed to ensure better output waveform quality. Simulation and experimental results verify the proposed inverter configuration and its PWM technique.