Proportional Absolute Temperature Research Articles

A Low-Cost CMOS Smart Temperature Sensor Using a Thermal-Sensing and Pulse-Shrinking Delay Line

This paper presents an economical time-domain CMOS smart temperature sensor with only one delay line. With the use of a path selection circuit, the delay line was used to first sense the temperature, to generate a pulse with a width proportional to absolute temperature (PTAT). The original delay line was then reused to measure the PTAT pulse. Final digital code conversion was fulfilled using a simple counter. Compared with former work with two delay lines, the proposed work with the novel structure can reduce one delay line to lower the circuit area. The proposed circuit was fabricated in a TSMC CMOS 0.35- μm 2P4M digital process, and had an extremely small chip area of 0.025 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , which is currently the best size among smart temperature sensors that has ever been reported when considering the CMOS process. The achieved measurement errors for eight chips are within -0.8 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C-1.0 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C after two-point calibration over a 0 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C-100 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C temperature range. The effective resolution is measured to be 0.2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C, and the power consumption is 1.5 μW at a sampling rate of 10 samples per second.

A CMOS Temperature Sensor with a Maximum Accuracy of 1.6 °C after One-Point Calibration

This paper presents a time-domain CMOS oscillator-based temperature sensor with one-point calibration for test cost reduction. Compared with the former CMOS sensors with linear delay lines, the proposed work composed of a temperature-to-pulse generator with adjustable time gain and a time-to-digital converter (TDC) can achieve lower circuit complexity and smaller area. A temperature-dependent oscillator for temperature sensing was used to generate the period width proportional to absolute temperature (PTAT). With the help of calibration circuit, an adjustable-gain time amplifier was adopted to dynamically adjust the amplified width that was converted by the TDC into the corresponding digital code. After calibration, the fluctuation of the sensor output with process variation can be greatly reduced. The maximum inaccuracy after one-point calibration for six package chips was 1.6 °C within a 0 80 °C temperature range. The proposed sensor fabricated in a 0.35-μm CMOS process occupied a chip area of merely 0.07 mm2, achieved a fine resolution of 0.047 °C/LSB, and consumed a low power of 25 μW@10 samples/s.

1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs

This paper presents bandgap reference (BGR) and sub-BGR circuits for nanowatt LSIs. The circuits consist of a nano-ampere current reference circuit, a bipolar transistor, and proportional-to-absolute-temperature (PTAT) voltage generators. The proposed circuits avoid the use of resistors and contain only MOSFETs and one bipolar transistor. Because the sub-BGR circuit divides the output voltage of the bipolar transistor without resistors, it can operate at a sub-1-V supply. The experimental results obtained in the 0.18-μm CMOS process demonstrated that the BGR circuit could generate a reference voltage of 1.09 V and the sub-BGR circuit could generate one of 0.548 V. The power dissipations of the BGR and sub-BGR circuits corresponded to 100 and 52.5 nW.

A Subthreshold-MOSFETs-Based Scattered Relative Temperature Sensor Front-End With a Non-Calibrated $\pm 2.5^{\circ}{\rm C}$$3\sigma$ Relative Inaccuracy From -$40^{\circ}{\rm C}$ to 100$^{\circ}{\rm C}$

This paper presents a subthreshold MOSFETs-based scattered relative temperature sensor front-end operating at a low supply voltage. Dynamic element matching and dynamic offset cancellation have been implemented to minimize the errors induced by device mismatches. An individual proportional-to-absolute-temperature (PTAT) voltage generator was first implemented to verify the low voltage operation capability and the mismatch-error correction. A low voltage reference circuit has been also designed and tested. A gate-bulk-driven error correction amplifier is proposed in order to minimize the offset error and maintain low voltage operation. The scattered relative temperature sensor front-end was then implemented in AMI 0.5 μm CMOS process with an array of 5 × 5 sensor nodes across the chip. The minimum supply voltage was measured as 1 V over -40-100°C with a typical N-JP-type threshold voltage of around 0.8 V and 0.9 V at room temperature, respectively. The measured relative inaccuracy was less than ±2.5°C without calibration. To the best of the authors' knowledge, this is the first time that non-calibrated on-chip relative temperature monitoring accuracy is reported. Furthermore, the multi-location thermal monitoring function has been experimentally demonstrated and a 2°C/mm on-chip temperature gradient was detected.

4-비트 축차근사형 아날로그-디지털 변환기를 내장한 2.5V 0.25㎛ CMOS 온도 센서

본 논문에서는 칩 내부의 온도를 측정하기 위한 CMOS 온도 센서가 제안된다. 제안하는 온도 센서는 칩 내부의 온도에 비례하는 전압을 생성하는 proportional-to-absolute-temperature (PTAT) 회로와 디지털 인터페이스를 위한 4-비트 아날로그-디지털 변환기로 구성된다. 소면적을 가지는 PTAT 회로는 CMOS 공정에서 vertical PNP 구조를 이용하여 설계된다. 온도변화에 둔감한 저전력 4-비트 아날로그-디지털 변환기를 구현하기 위해 아날로그 회로를 최소로 사용하는 축차근사형 아날로그-디지털 변환기가 이용되며, 이를 위해 커패시터-기반 디지털-아날로그 변환기와 시간-도메인 비교기를 이용한다. 제안된 온도 센서는 2.5V <TEX>$0.25{\mu}m$</TEX> 1-poly 6-metal CMOS 공정에서 제작되었고, <TEX>$50{\sim}150^{\circ}C$</TEX> 온도 범위에서 동작한다. 구현된 온도 센서의 면적과 전력 소모는 각각 <TEX>$130{\times}390{\mu}m^2$</TEX>과 <TEX>$868{\mu}W$</TEX>이다. In this paper, a CMOS temperature sensor is proposed to measure the internal temperature of a chip. The temperature sensor consists of a proportional-to-absolute-temperature (PTAT) circuit for a temperature sensing part and a 4-bit analog-to-digital converter (ADC) for a digital interface. The PTAT circuit with the compact area is designed by using a vertical PNP architecture in the CMOS process. To reduce sensitivity of temperature variation in the digital interface circuit of the proposed temperature sensor, a 4-bit successive approximation (SA) ADC using the minimum analog circuits is used. It uses a capacitor-based digital-to-analog converter and a time-domain comparator to minimize power consumption. The proposed temperature sensor was fabricated by using a <TEX>$0.25{\mu}m$</TEX> 1-poly 6-metal CMOS process with a 2.5V supply, and its operating temperature range is from 50 to <TEX>$150^{\circ}C$</TEX>. The area and power consumption of the fabricated temperature sensor are <TEX>$130{\times}390{\mu}m^2$</TEX> and <TEX>$868{\mu}W$</TEX>, respectively.

Low-Voltage PTAT Voltage Reference with Area Efficiency Improved

SUMMARY The structure of a proportional-to-absolute-temperature (PTAT) voltage reference with MOSFETs operating in the subthreshold region is proposed. It is based on the conventional structure, operation equivalent to which is achieved from the viewpoint of relations between the voltages and currents of MOSFETs. The derived structure relaxes the occupied area. Experimental results of a PTAT voltage reference implemented on a chip as an example are presented.

A High Resolution Vernier Ring Oscillator with Ultra-Low Temperature Drift

Nowadays, the precise measurement of the time interval between two events with very fine timing resolution is common challenge in the test and measurement instrumentation. This paper present a new high resolution vernier ring oscillator(VRO), which can measures the clock jitter as the operation temperature rises.The goal of this work focuses on the design of a TDC of temperature stable oscillator and we propose an ultra-low temperature drift of a differential delay cell oscillator based on a proportional to absolute temperature(PTAT) compensation methodology. It is very desirable to have a single integrated circuit producing a stable high resolution timing circuit over a wide temperature range developed in a standard CMOS process. By the simple concept of vernier delay line and two ring oscillators, the proposed can achieve a fine time resolution with wide working temperature. For each channel of ring oscillator, the relative delay time is fine tuned by an external VBIAS input. From 25°Cto 45°C, the maximum error percent of delay time without compensation circuits is more than 2.9%, but it with compensation circuits is less than 0.3%. The different operating temperature will affect entire circuit and the delay time of ring oscillator. A compensation circuit to reduce the variety of ring oscillator is also added. The new architecture of high resolution TDC with temperature compensated circuit is proven to be applicable in high precision clock applications which is analyzed and implemented in a CMOS 0.18μm 1P6M process.

A 220-nA 32-kHz Crystal Oscillator with Wide Voltage Range (1.0–5.5 V) for Battery-Operated Microcontrollers

Most microcontrollers (MCUs) have a real-time clock function driven by a 32-kHz crystal oscillator. A low-power 32-kHz crystal oscillator for operation in battery-operated MCUs over a wide voltage range (1.0–5.5 V) is described. The circuit features a proportional to absolute temperature (PTAT) bias-current generator to ensure an oscillation margin and an adaptive comparator for detecting small oscillation signals with little effect from by process and temperature variations. Experimental results indicate that the circuit achieves a small operating current of only 220 nA while ensuring a 10-times oscillation margin with a low-CL (3.1 pF) quartz crystal, providing sufficient noise tolerance and quick start-up. The duty cycle is 40–60% and start-up time is less than 0.6 s. This circuit is expected to realize the smallest MCU standby current of 420 nA.

A 1.2-V Piecewise Curvature-Corrected Bandgap Reference in 0.5 $\mu$m CMOS Process

A 1.2-V piecewise curvature-corrected CMOS bandgap reference (BGR) is proposed. It features in utilizing piecewise nonlinear curvature-corrected current and rail-to-rail operational amplifier to a conventional first-order current-mode BGR. The corrected current is zero, exponential with temperature and proportional to the squared temperature in the lower, middle and higher temperature range (TR). The rail-to-rail operational amplifier biased by a current proportional to absolute temperature (PTAT) helps to provide negative feedback for the proposed BGR. Measured results indicate that the proposed BGR achieves temperature coefficient (TC) of 8.9 ppm/°C in the TR of -40°C-110°C without trimming, power supply rejection (PSR) of - 58 dB and line regulation of 2.4 mV/V in the supply range of 1.2-3.2 V. It is fabricated in CSMC 0.5-μ m mixed-signal CMOS process with power consumption of 48 μW and effective chip area of 0.1 mm2 .

Ultra-miniature wireless temperature sensor for thermal medicine applications.

This study presents a prototype design of an ultra-miniature, wireless, battery-less, and implantable temperature-sensor, with applications to thermal medicine such as cryosurgery, hyperthermia, and thermal ablation. The design aims at a sensory device smaller than 1.5 mm in diameter and 3 mm in length, to enable minimally invasive deployment through a hypodermic needle. While the new device may be used for local temperature monitoring, simultaneous data collection from an array of such sensors can be used to reconstruct the 3D temperature field in the treated area, offering a unique capability in thermal medicine. The new sensory device consists of three major subsystems: a temperature-sensing core, a wireless data-communication unit, and a wireless power reception and management unit. Power is delivered wirelessly to the implant from an external source using an inductive link. To meet size requirements while enhancing reliability and minimizing cost, the implant is fully integrated in a regular foundry CMOS technology (0.15 μm in the current study), including the implant-side inductor of the power link. A temperature-sensing core that consists of a proportional-to-absolute-temperature (PTAT) circuit has been designed and characterized. It employs a microwatt chopper stabilized op-amp and dynamic element-matched current sources to achieve high absolute accuracy. A second order sigma-delta (Σ-Δ) analog-to-digital converter (ADC) is designed to convert the temperature reading to a digital code, which is transmitted by backscatter through the same antenna used for receiving power. A high-efficiency multi-stage differential CMOS rectifier has been designed to provide a DC supply to the sensing and communication subsystems. This paper focuses on the development of the all-CMOS temperature sensing core circuitry part of the device, and briefly reviews the wireless power delivery and communication subsystems.

Low-power low-voltage superior-order curvature corrected voltage reference

A complementary metal oxide semiconductor (CMOS) voltage reference with a logarithmic curvature-correction will be presented. The first-order compensation is realised using an original offset voltage follower (OVF) block as a proportional to absolute temperature (PTAT) voltage generator, with the advantages of reducing the silicon area and of increasing accuracy by replacing matched resistors with matched transistors. The new logarithmic curvature-correction technique will be implemented using an asymmetric differential amplifier (ADA) block for compensating the logarithmic temperature dependent term from the first-order compensated voltage reference. In order to increase the circuit accuracy, an original temperature-dependent current generator will be designed for computing the exact type of the implemented curvature-correction. The relatively small complexity of the current squarer allows an important increasing of the circuit accuracy that could be achieved by increasing the current generator complexity. As a result of operating most of the MOS transistors in weak inversion, the original proposed voltage reference could be valuable for low-power applications. The circuit is implemented in 0.35 μm CMOS technology and consumes only 60μA for t = 25°C, being supplied at the minimal supply voltage V DD = 1.75V. The temperature coefficient of the reference voltage is 8.7 ppm/°C, while the line sensitivity is 0.75 mV/V for a supply voltage between 1.75 V and 7 V.

Low-Cost Calibration Techniques for Smart Temperature Sensors

Smart temperature sensors generally need to be trimmed to obtain measurement errors below ±2°C. The associated temperature calibration procedure is time consuming and therefore costly. This paper presents two, much faster, voltage calibration techniques. Both make use of the fact that a voltage proportional to absolute temperature (PTAT) can be accurately generated on chip. By measuring this voltage, the sensor's actual temperature can be determined, whereupon the sensor can be trimmed to correct for its dominant source of error: spread in the on-chip voltage reference. The first calibration technique consists of measuring the (small) PTAT voltage directly, while the second, more robust alternative does so indirectly, by using an external reference voltage and the on-chip ADC. Experimental results from a prototype fabricated in 0.7 ?m CMOS technology show that after calibration and trimming, these two techniques result in measurement errors (±3?) of ±0.15°C and ±0.25°C, respectively, in a range from -55°C to 125°C.

A Sub-$\mu$W Embedded CMOS Temperature Sensor for RFID Food Monitoring Application

An ultra-low power embedded CMOS temperature sensor based on serially connected subthreshold MOS operation is implemented in a 0.18 μm CMOS process for passive RFID food monitoring applications. Employing serially connected subthreshold MOS as sensing element enables reduced minimum supply voltage for further power reduction, which is of utmost importance in passive RFID applications. Both proportional-to-absolute-temperature (PTAT) and complimentary-to-absolute-temperature (CTAT) signals can be obtained through proper transistor sizing. With the sensor core working under 0.5 V and digital interfacing under 1 V, the sensor dissipates a measured total power of 119 nW at 333 samples/s and achieves an inaccuracy of + 1/-0.8°C from - 10°C to 30°C after calibration. The sensor is embedded inside the fabricated passive UHF RFID tag. Measurement of the sensor performance at the system level is also carried out, illustrating proper sensing operation for passive RFID applications.

저전압 저전력 듀얼 모드 CMOS 전류원

In this paper, a new temperature-insensitive CMOS dual-mode current reference for low-voltage low-power mixed-mode circuits is proposed. The temperature independent reference current is generated by summing a proportional to absolute temperature(PTAT) current and a complementary to absolute temperature(CTAT) current. The temperature insensitivity was achieved by the mobility and the other which is inversely proportional to mobility. As the results, the temperature dependency of output currents was measured to be and , respectively. And also, the power dissipation is 0.84mW on 2V voltage supply. These results are verified by the n-well CMOS parameter.

Sub-1-V-Output CMOS bandgap reference circuit with small area and low power consumption

In this paper, a new low-VDD CMOS bandgap reference circuit with small layout area and low power consumption is proposed. The proposed circuit delivering its output voltage below 1V has its Proportional-To-Absolute-Temperature (PTAT) term compensated by the Complementary-proportional-To-Absolute- Temperature (CTAT) voltage thereby suppressing a change in its output voltage regardless of temperature and VDD variations. Using a commercial CMOS 0.18-µ m process, the proposed circuit has been verified to be able to save its layout area by 48.7% and the power consumption by 29.9% compared with the previous sub-1-V-output bandgap circuit.

An Electronically Tunable Linear or Nonlinear MOS Resistor

We present a bidirectional MOS resistor circuit that is electronically tunable and has zero dc offset. For a given I-V characteristic, the circuit senses the source-to-drain potential across an MOS device and automatically generates an appropriate bias for the gate terminal to implement the characteristic via negative feedback. We show that the I-V characteristic of the resistor can be designed to be linear, compressive or expansive by using appropriate translinear current mode circuits for the feedback biasing. Our technique does not require the MOS transistor to operate in the triode region and is valid in both weak and strong inversion. Experimental results from a CMOS process show that a square-root, linear, or square resistor can be implemented as examples of our topology. The linear version was tunable over a resistance range of 1 MOmega-100 GOmega in our particular implementation and exhibited proportional-to-absolute temperature (PTAT) behavior. The measured excess noise of the resistor agrees with theoretical predictions.

A voltage reference circuit for current source of RFIC blocks

PurposeThe purpose of this paper is to design a voltage reference circuit for current source of radio frequency integrated circuit blocks. The voltage reference circuit is called voltage for current source (VCS).Design/methodology/approachThe circuit concept is discussed. A voltage‐controlled oscillator (VCO) and buffer circuit together with VCS circuit are built to prove the concept. Though the VCS circuit employs no array of diode like standard bandgap circuit, it still employs the concept of proportional to absolute temperature (PTAT) and a complement to absolute temperature (CTAT) elements. The integrated VCO, together with VCO core and VCO buffer circuits, are designed for W‐CDMA application particularly for the demodulator section. All circuits are built in fT=45 GHz SiGe BiCMOS process.FindingsAt 760 MHz the power consumption for core circuit is 0.6 and 3.3 mA for VCO buffer amplifier. The fabricated VCO circuit together with VCO buffer was tested and measured with VCO output of −6 dBm at 760 MHz with variation of 0.1 dBm across −40°C to 85°C.Originality/valueA voltage reference circuit which is derived from PTAT and CTAT current generators is presented. The circuit is capable of providing a constant current across absolute temperature or a current PTAT.

PTAT direct current converter for bias circuit applications

A novel proportional to absolute temperature (PTAT) current converter is presented. Output current gain ratios in excess of 50 are possible without the use of an operational amplifier. Simulation measurements show an output temperature coefficient within 15 ppm/°C of the reference current over the temperature range of −40 to +85°C.

Precision Temperature Measurement Using CMOS Substrate PNP Transistors

This paper analyzes the nonidealities of temperature sensors based on substrate pnp transistors and shows how their influence can be minimized. It focuses on temperature measurement using the difference between the base-emitter voltages of a transistor operated at two current densities. This difference is proportional to absolute temperature (PTAT). The effects of series resistance, current-gain variation, high-level injection, and the Early effect on the accuracy of this PTAT voltage are discussed. The results of measurements made on substrate pnp transistors in a standard 0.5-/spl mu/m CMOS process are presented to illustrate the effects of these nonidealities. It is shown that the modeling of the PTAT voltage can be improved by taking the temperature dependency of the effective emission coefficient into account using the reverse Early effect. With this refinement, the temperature can be extracted from the measurement data with an absolute accuracy of /spl plusmn/0.1/spl deg/C in the range of -50 to 130/spl deg/C.

Series Resistance Compensation in PTAT Temperature Sensors and Bandgap Reference Circuits

A general compensation technique for the extrinsic series resistor in the pn diode has been proposed in this paper. Proportional-to-absolute-temperature (PTAT) temperature sensors and bandgap reference circuits using diodes have been also proposed. In the design of bandgap reference circuits, the most common method used to produce an output voltage that is independent of temperature variations is the curvature correction method. The series resistance compensation technique represents part of this curvature. Several designs of PTAT temperature and bandgap circuits have been proposed in this work. For illustration, the PTAT sensor and bandgap circuits are numerically simulated, using the proposed algorithm.