Layer Printed Circuit Board Research Articles

A Broadband and Wide-Scanning Dual-Polarized Dipole Array with Low Profile

This study presents a novel methodology for designing a planar broadband wide-scanning dual-polarized array using tightly-coupled dipoles and wide-angle impedance matching. By etching the S-shaped gaps between the dipoles and incorporating shorting vias with defected ground structures, we demonstrated that all radiation elements can be arranged on a single-layer substrate. Additionally, we introduced a thin printed circuit board (PCB) layer with two-dimensional periodic structures for impedance matching at wide scan angles. Leveraging high permittivity and constrained electromagnetic waves, we realized zero-scan blindness within this band. The aperture consisted of only two PCB layers, with a total profile of approximately 0.091λlow, where λlow represented the free-space wavelength at 6 GHz. A 3 × 4 dual-polarized array was fabricated and measured to validate the proposed approach. The measured active voltage standing wave ratio for one embedded array element surpassed 2.2 over 6–18 GHz. By enabling the orthogonal dipoles at the edge of the array to be mutually coupled using an additional metal patch, the active S11 for the edge cells exceeded −8.8 dB over 6.9–18 GHz. The measured patterns were in good agreement with simulations over 6–18 GHz, with the array exhibiting good radiation performance over ±60° in the E- and H-planes.

Alignment Error Estimation of the Conductive Pattern of 3D-Printed Circuit Boards

Introduction. When manufacturing printed circuit boards (PCBs), including their prototypes, the proper alignment of PCB layers is mandatory. While the causes and preventive measures against misalignment in PCBs manufactured using conventional technologies are known, research into alignment errors in 3D-printed PCBs is still ongoing. Another task regarding 3D printing, which is related to topological accuracy (alignment errors in particular), consists in ensuring the opportunity to remove the printed part of the product in order to perform operations thereon, such as embedding components, followed by its return and continuation of the printing process.Aim. Numerical estimation and analysis of the causes of layer-to-layer alignment errors in PCBs manufactured using 3D printing.Materials and methods. The research was conducted using the following materials and equipment: Polyethyleentereftalaatglycol (PETG); an Ultimaker Cura slicer; an Ender 3 S13D printer; a brass nozzle with a diameter of 0.3 mm. The study was conducted using the facilities of the Additive Technologies Center, Bauman Moscow State Technical University. Interlayer alignment errors are estimated by microsection analysis and X-ray inspection, as well as using the misalignment decomposition method described by Yu.B. Tsvetkov for electronics.Results. The possibility of manufacturing PCB prototypes with three conductive layers is demonstrated, including a method for removing the printed part of the product and its further return in the printing process using printed pins. Large-scale distortions were found to make the largest contribution to the alignment error: on average, approximately 150 gm for each layer when compared to its 3D model and approximately 60 gm when comparing the topology of the top layer with the bottom layer. These values exceed the common misalignment value of 50 gm for the pin lamination process. This substantiates the need to control and minimize temperature effects, e.g., using 3D printers with a thermostatically-controlled chamber.Conclusion. The conducted analysis of possible causes of misalignment emergence determines the significance of temperature gradients that occur during 3D printing. The proposed manufacturing method allows the printed part of the product to be removed and further returned into the printing process, which can be used to produce PCB prototypes with three conductive layers.

Polymer Enabled Ultra-Thin Package Solutions for Heterogeneous, Package-in-Package and Embedded ICs

Heterogeneous integration for system in package (SiP), flip-chip integration in 3D packaging and embedded ICs in advanced Printed Circuit Boards (PCB) are all pushing the limits for low profile packaging. Advanced polymer materials applied in Semiconductor-on-Polymer™ wafer level chip scale packaging (SoP WLCSP) are gaining traction as a high reliability ultra-thin packaging solution. The 2019 roadmap for Heterogeneous Integration defines heterogeneous Integration (HI) as the integration of separately manufactured components into a higher-level assembly that provides enhanced functionality and improved operating characteristics. The development of this technology is a significant industry challenge that can evolve quickly with the application of SoP polymer based packaging. At advanced nodes, die yield falls exponentially with die size. Splitting a large monolithic SoC into smaller tightly coupled die, is an attractive alternative considering that die cost per unit area is escalating. The smartphone industry has been an early adopter of HI technologies in the use of SiP for multiple generations, essentially for the advantages in miniaturization, modularity for co-design, and enhanced generation-over-generation performance. The application processor is almost always on the most advanced node and housed in a Package on Package (PoP) configuration with memory component(s) stacked on top of this ASIC. Teardowns of the Package-on-Package (PoP) packages for Apple XSMax, Samsung Galaxy S9+, and Huawei 20 Pro have shown the utilization and need for continued z-axis thickness scaling. Implementation of SoP CSP for package in package integration or for chip on thin PCB, interposer or flex can provide another package capability for evolution of multi-layer heterogeneous integration. Reliable ultra-thin polymerized die have the potential to tackle the third dimension (z-axis) of total IC package volume in 3D integration. SoP die can replace current full thickness or partially thinned (typically >250µm) die with <35µm package thickness devices. In addition, the SoP process has the potential to extend package roadmaps enabling smaller higher performance packages in several areas, including Fan-Out (FO). Thin bridge die could simplify localized high IO for substrates. Thin embedded IPD (integrated passive devices) have the potential to increase the capability and shrink the size of substrate process based passives, similar to the performance increase for wafer based devices versus printed electronics. In addition thin high IO die could allow simplified embedding in substrates. The differentiation of PCBs, interposers and flex circuits is starting to blur. Package integration within the layers of these devices can create embedded ICs that take less system space and improve system performance. Traditionally, manufacturing steps to place an IC within the board substrate vary and require space to be created for the component body, in the form of a cavity for traditional packaged ICs. In Integrated module board (IMB), components are aligned and placed inside a cavity that is routed to the core laminate by controlled-depth routing. The cavity is filled with molding polymer to ensure chemical, mechanical, and electrical compatibility with the substrate. Isotropic solder is impregnated with the polymer to form reliable solder joints when the embedded part is laminated into the stack. Polymerized ICs in SoP CSP eliminate cavity requirements and molding polymers for IMB. Chip in polymer (CIP) approaches use thin chips in built up dielectric layers of PCBs, rather than integrating them into the core layers. When SoP CSP is applied, it is feasible to achieve the same capability, but with a much smaller z-axis and without creating a surface geography perturbation. This presentation will include an introduction to SoP CSP utilizing advanced polymer technology for accelerating evolution of HI, PoP and Embedded applications.

Concepts for realizing High-Voltage Power Modules by Embedding of SiC Semiconductors

Today’s power electronics modules typically consist of a ceramics substrate (DBC – Direct Bond Copper), carrying IGBTs, diodes or MOSFETs. These semiconductors are soldered or sintered to the ceramics and their top sides are interconnected by thick Al wires. An integration of further components or functions on the DBC substrate is difficult or even not possible. Therefore, driver circuits and controllers have to be mounted to a separate substrate, typically an organic Printed Circuit board (PCB). The PCB has to be connected to the DBC by wires or pins. The mechanical integration of the whole system requires a bulky housing. Embedding of power semiconductors like SiC MOSFET allows a significant size reduction, improved electrical performance and a high degree of reliability of such modules. In the last years, the capability of PCB embedding technology for the realization of low and high voltage power modules was demonstrated. Fraunhofer IZM together with partners from the industry demonstrated the feasibility for different applications, from single die SiC packages to high voltage automotive traction inverters. In this paper, a general overview about innovative power module technologies will be given and the embedding of power semiconductors will be introduced in detail. It will address all most relevant point, like the demands on the semiconductor, the thermal and electrical considerations as well as the demands on the used materials. To address the integration of the required driver circuits and controllers, the idea of modularization such electronics systems will also be presented. Here already packaged components will be used and embedded into PCB layers too. As a result, a modular approach to form a complete system will be developed. Different functional layers, e.g. power switches, logic modules, will be formed and finally stacked und connected to form the system. The concept and first realized demonstrators will be discussed.

Analysis of Decoupling Capacitor Performance in Improving Power Integrity in Two Layer/Three Layer Printed Circuit Boards

Electronic circuits can only function properly if supplied with clean power. The clean power is only possible if the AC. & D.C. noise in the power supply voltage which is supplied to electronic devices is below tolerance limits. To keep this noise within the limits, the impedance of Power Distribution Network (PDN) should be as minimal as possible. The use of Decoupling Capacitors is the most proven strategy to keep the PDN impedance low. In this paper, an attempt has been made to analyze the performance of PDN of a two-layer and three-layer P.C. Board, for the same set of Decoupling Capacitors. The PDN design has been carried out to meet an assumed set of specifications. The values of Interconnection Inductance have been obtained. The Interconnection Inductance is mostly responsible for PDN impedance, especially at higher frequencies. The simulations have been conducted for the PDN impedance of a two-layer as well as a three-layer P.C. Board. From the simulated impedance profiles, it is evident that PDN impedance obtained for a two-layer P.C. board is almost similar to that of a three-layer one if the width of the power supply trace is suitably tailored. It is therefore more prudent to go for a two-layer PDN configuration considering its simplicity and economy.

Highly efficient and accurate algorithm for multiscale equivalent modeling and mechanical performance simulation of printed circuit boards

The increasing prevalence of reliability issues related to printed circuit boards (PCBs) has led to significant interest in applying finite element analysis (FEA) for PCBs. This study presents an equivalent property algorithm based on the mesoscale finite element method (FEM), which took into account the intricate structural features of conductive layers in PCBs. Additionally, a series of automated scripts were developed to streamline the modeling and calculating process, markedly enhancing the accuracy and efficiency of equivalent modeling and simulation of the PCB. Based on the proposed algorithm, a multiscale three-point bending finite element model of a PCB was established. By comparing the results to experimental data from three-point bending tests, it was demonstrated that the stress field simulated using the proposed algorithm accurately represented the anisotropic properties of the intricate copper traces in the conductive layers, leading to more accurate predictions of mechanical responses than those obtained using conventional algorithms. Furthermore, the research on the impact of partition size on both simulation accuracy and computational efficiency clearly demonstrated that partition size significantly affected these aspects. In conclusion, the proposed algorithm provided a more reliable and efficient approach for applying FEA and FEM to PCBs, contributing to advancements in the field of PCB analysis and fostering improvements in electronics design and manufacturing.

Termination Design Optimization of High-Current PCB-Winding Matrix Transformers

Due to their high power densities and efficiencies, high-frequency resonant converters using printed circuit board (PCB)-based transformers are gaining popularity in applications, such as datacenters and automotive. However, in such high-frequency, high-current applications, the PCB transformer's termination losses may become significant if not designed properly. This article aims to highlight multiple design considerations to minimize the termination losses while designing a PCB-based matrix transformer. Various termination techniques for full-bridge and center-tap secondary-rectifiers are studied, and it is shown that placing the devices and output filter capacitors directly on the secondary windings results in the lowest termination loss. However, this results in the output filter capacitors being split between the two secondary PCB layers, resulting in a long paralleling loop between them. It is demonstrated that the parasitic inductance of this loop undergoes parallel resonance with the filter capacitors, resulting in high circulating currents and, hence, high termination losses. Methods to mitigate this effect at the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converter's switching frequency are discussed. Improvements of the proposed terminations are demonstrated by modeling and measuring the transformer's ac resistance. Furthermore, the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converters' efficiency improvements are also showcased with the improved terminations.

Compact or Wide-Stopband SIW Diplexers With High Intrinsic Isolations Based on Orthogonal Dual Modes

This brief proposes two miniaturized substrate integrated waveguide (SIW) diplexers with wide stopband and high isolation based on orthogonal dual-mode technique. With the orthogonal dual-mode SIW junction-resonators to eliminate the traditional T-junctions, significant circuit miniaturization and the inter-channel isolations can be achieved for SIW diplexers. Additionally, the fractional bandwidth (FBW) diagrams are utilized to identify the feasible FBWs in both passbands effortlessly. To verify the developed method, two types of SIW diplexers centered at 12 and 14 GHz are synthesized and fabricated utilizing a single layer printed circuit board technology. The performances of both diplexers are demonstrated by the measured and simulated results.

Analysis and Design of a Stacked PCBs-Based Quasi-Helix Antenna

In this communication, a new class of circularly polarized (CP) antennas is presented. It is based on the utilization of stacked printed circuit boards (PCBs) in order to realize a quasi-helix. An end-cap disk is used to optimize the axial ratio (AR). Good impedance matching and low AR in a wide frequency band make the proposed antenna an excellent candidate for satellite communication systems and Wi-Fi applications. The structure is composed of eight PCB layers, where each layer is processed using regular single-layer PCB technology. The lowest PCB laminate is used for the feed network, while the higher stacked PCB laminates form the helical radiating element section. Seven microstrip 120° arcs are used on PCB laminates to form a quasi-helix structure, which, with the help of the end-cap disk, can generate electromagnetic CP radiation. A prototype of the proposed antenna for 5.8 GHz WLAN was fabricated and measured to validate the proposed concept. The measured operating bandwidth for <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\vert S_{11}\vert &lt; -10$ </tex-math></inline-formula> dB is 33% (5.05–7.05 GHz). The measured 3 dB AR bandwidth covers a frequency band from 5.45 and 6.6 GHz (19.25%). Unidirectional radiation patterns with excellent performance in terms of CP and high front-to-back ratio were obtained over the operating bandwidth.

SIW Filter With Adjustable Number of Passbands Using Assembled Multimode Resonant PCBs

A novel substrate integrated waveguide (SIW) bandpass filter (BPF) with adjustable number of passbands based on assembled multimode resonant printed circuit boards (PCBs) is proposed in this brief, for the first time. Three independent PCBs with perturbed TE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">102</sub> and TE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">201</sub> modes are designed to realize the high-selective filtering response with desired different number of passbands. Particularly, single-, dual- and triple-band responses can be adjusted by using one layer, two layers and three layers of PCBs, respectively. A prototype is simulated and measured to verify the proposed method.

Dual-Band High-Gain Shared-Aperture Antenna Integrating Fabry-Perot and Reflectarray Mechanisms

This work presents a dual-band high-gain shared-aperture antenna. The proposed antenna integrates both the Fabry-Perot and reflectarray mechanisms; the antenna works as a Fabry-Perot cavity antenna (FPCA) in the S-band (2.45 GHz) and as a reflectarray antenna (RA) in the X-band (10 GHz). The antenna has a simple structure made up of only two printed circuit board layers. The bottom layer acts as a source antenna, a ground plane for the FPCA, and as a reflective surface for the RA. The upper layer contains the source antenna for the RA and serves as a partially reflective superstrate for the FPCA. The FPCA and RA thus share the same physical aperture but function independently. As an example, we design, fabricate, and characterize an antenna that operates at 2.45 and 10 GHz with an aperture size of 300 × 300 mm2. The measured results are found to be in good agreement with the simulations. We show that the proposed antenna achieves a gain of 16.21 dBi at 2.45 GHz and 21.6 dBi at 10 GHz with a −10 dB impedance bandwidths of 2.39–2.66 GHz and 9.40–10.28 GHz. The isolation between the two antenna ports is found to be larger than 30 dB.

Developing Broadband Microstrip Patch Antennas Fed by SIW Feeding Network for Spatially Low Cross-Polarization Situation.

A stacked multi-layer substrate integrated waveguide (SIW) microstrip patch antenna with broadband operating bandwidth and low cross-polarization radiation is provided. A complete study on the propagating element bandwidth and cross polarization level is presented to demonstrate the importance of the design. The proposed antenna includes three stacked printed circuit board (PCB) layers, including one layer for the radiating 2 × 2 rectangular patch elements and two SIW PCB layers for the feeding network. There are two common methods for excitation in cavity-backed patch antennas: probe feeding (PF) and aperture coupling (AC). PF can be used to increase the bandwidth of the antenna. Although this method increases the antenna’s bandwidth, it produces a strong cross-polarized field. The AC method can be used to suppress cross-polarized fields in microstrip patch antennas. As microstrip patch antennas are inherently narrowband, the AC method has little effect on their bandwidth. This paper proposes an antenna that is simultaneously fed by AC and PF. As a result of this innovation, the operating bandwidth of the antenna has increased, and cross-polarization has been reduced. Actually, the combination of probe feeding and aperture coupling schemes leads to achieving a broadband operating bandwidth. The arrangement of radiator elements and cavities implements a mirrored excitation technique while maintaining a low cross-polarization level. In both numerical and experimental solutions, a less than −30 dB cross-polarization level has been achieved for all of the main directions. A fractional impedance bandwidth of 29.8% (10.55–14.25 GHz) for < −10-dB is measured for the proposed array. Simulated and measured results illustrate good agreement. Having features like low cost, light weight, compactness, broadband, integration capabilities, and low cross-polarization level makes the designed antenna suitable for remote-sensing and satellite applications.

A 28‐GHz reconfigurable 1‐bit substrate‐integrated‐waveguide based phase shifter

A switched-line substrate integrated waveguide 1-bit phase shifter is designed and measured at 28 GHz. Reconfigurability is achieved through a set of floating metallized vias whose connection to the waveguide top and bottom layers can be controlled using PIN diodes. The reconfigurable vias are used to dynamically create alternative paths having different phase delays. A three-metal layer printed circuit board stack-up is employed to fully integrate the diode biasing network and to ease the routing of the bias signal. The high integration of the proposed configuration makes it well suited for the implementation of reconfigurable Butler matrices. The phase shift offset between the two states of this digital 1-bit phase shifter equals 262° at 28 GHz, leading to a measured figure of merit of 161°/dB, and input 1-dB compression point over 20 dBm. The total area is 13.72 × 10.9 mm without feeding lines and bias.

Digital crosstalk between triple traces in a double layer PCB

ABSTRACT Transient coupling between the traces in a double-layer printed circuit board (PCB) is analysed for excitation with different signal waveforms involved in the digital circuits. Different types of signals such as trapezoidal, step, impulse and clock are considered for excitation at the source end in a two-layer board having three traces on the top of the substrate. All the traces are matched terminated with 50-ohm loads. The source waveforms are represented by mathematical formulae and the transient crosstalk is computed using transmission line theory. The capacitive and inductive coupling elements are calculated using the Method of Moments (MoM). Initially, the transient crosstalk is calculated on the adjacent victim traces for excitation in a single trace. Subsequently, two different input signals are applied simultaneously to the two side traces and the effect of transient coupling is determined on the middle trace. The computation of the results is done by using MATLAB. The variation of coupling is also studied for different PCB configurations such as spacing between the traces, substrate height and dielectric constant, and terminating loads. The results are compared graphically. It is observed that the transient coupling increases with a decrease in the rise time of the pulses.

Au Coated Printed Circuit Board Current Collectors Using a Pulse Electroplating Method for Fuel Cell Applications

The effect of the Au coated printed circuit board (PCB) as a current collector on the performance of fuel cells is demonstrated. In this study, optimized pulse electroplating was introduced, which was found to be much more effective compared to the direct current (DC) plating for the PCB fabrication based on the passive area from the potentiodynamic polarization scan. Variable electrochemical parameters such as applied potential and frequency for the pulse electroplating method are controlled. Using the polarization tests, the corrosion behavior of the Au coated PCB layer was also observed. From these basic data, the coating methods and electrochemical parameters were systematically controlled to achieve efficient results for direct methanol fuel cells (DMFCs). The stability test for the cell operation indicates that the micro DMFC with the Au coated PCB substrate formed at a frequency of 10 Hz exhibited the highest stability and performance. As a result, the Au coated PCB substrate using pulse electroplating at 1.5 V and 1 kHz can be a promising current collector for portable DMFCs.

Interfacial polarization effects on dielectric properties in flax reinforced polypropylene/strontium titanate composites

Interfacial polarization or Maxwell-Wagner-Sillars effect using a dielectric study with the addition of strontium titanate and flax fiber reinforcement on a polypropylene matrix were investigated. Scanning electron microscopy (SEM) was performed for characterizing the fabricated sample to identify its fibers, ceramic, and polymer matrix regions. In the presence of strontium titanate and flax fiber reinforcement, the SEM images show signs of small ceramic agglomerates with fewer voids on fiber surfaces and a homogeneous distribution of fillers in the polymer matrix. The dielectric measurements revealed that dielectric relaxation occurs at low temperatures. The interfacial polarization was modeled using the Havriliak-Negami function, whereas the theoretical calculation shows a good best fit line with the experimental ones. The interfacial relaxation strength showed an increase of 202.54% from neat polypropylene matrix to flax reinforced polypropylene-strontium titanate composite from 0.866 to 2.62, respectively. This increase in dielectric strength is attributed to the accumulation of charge carriers at polypropylene-flax, polypropylene-strontium titanate, and strontium titanate-flax fiber interfaces. The potential use of these materials is in layered printed circuit board applications.

Efficient Transition Hybrid Two-Layer Feed Network: Polarization Diversity in a Satellite Transceiver Array Antenna

In this article, an efficient solution for the development of a new class of two-layer microstrip patch antenna (MPA) with orthogonal polarization ports, based on substrate-integrated waveguide (SIW) through an aperture coupling technique, is presented. Applying the SIW feeding network and aperture coupling to feed the MPA reduces the losses resulting from the feeding circuit and gives a more compact and efficient system. The proposed 4 × 4 array consists of two stacked layers, including an SIW layer as a feeding network and one layer as an antenna layer. The main design feature is the dual orthogonal port to generate different linear polarizations (LPs) (horizontal, vertical, 45°, and 135°). Each layer can be easily fabricated by a single layered printed circuit board (PCB) technology, and then PCB laminates are fixed together using screws. The measured -10-dB impedance bandwidth spans from 9.25 to 10.2 GHz (9.76%). The maximum measured gain at 9.9 GHz is 18.2 dB. The peak radiation efficiency is 84%. The proposed dual orthogonal port antenna exhibits low cost, ease of design, lightweight, high efficiency, and compactness, which makes it a suitable candidate for the polarization diversity in a transceiver for Earth-station applications.

A Wideband PCB-Stacked Air-Filled Luneburg Lens Antenna for 5G Millimeter-Wave Applications

This letter presents a novel wideband printed circuit board (PCB)-stacked Luneburg lens antenna with a flared open edge for multibeam scanning application at 5G millimeter-wave band. The lens consists of two groups of parallel PCBs. Each group includes 12 layers of low-cost FR4 PCB, which are fixed by metal screws. Inside the lens there is no dielectric, resulting in an air-filled structure. With drilling holes of different radius in each PCB layer (except the top and bottom layers), the air spacing between the two groups of PCBs varies discretely which approximates the graded refractive index. Eleven antipodal linearly tapered antennas are placed on the focuses of the lens as feed elements, permitting the beam to cover a wide angular range. To enhance the gain of the lens, the radiation aperture is flared, like an H-plane horn. Measurements of the lens antenna with a diameter of 130 mm show good agreement with the theoretical predictions. The measured impedance bandwidth covers 26-37 GHz with isolations better than 18.8 dB. The measured peak gain is around 15.4 dBi at 29 GHz. By switching the 11 feed elements, the overall 2-D beam scanning coverage is up to ±72°. The results indicate that the proposed Luneburg lens antenna demonstrates a good application potential for 5G millimeter wave wireless communication.

Comparison of PCB winding topologies for axial‐flux permanent magnet synchronous machines

Although axial-flux permanent magnet machines have high torque densities, challenges regarding mass production of stators make them a less appealing choice. Printed circuit board (PCB) axial-flux machine is a type of machine with a stator that is made of layers of PCB. Given the precise, fast, and cheap mass production capabilities of PCB manufacturers, PCB axial-flux machines stand as a viable alternative for conventional round-wire winding machines. In this study, five different winding topologies are compared. Their induced phase voltages and torque are calculated using the developed magnetic scalar potential method and finite element analysis (FEA). Proposed windings are tested on a 16-pole, 2000-RPM, double rotor-single stator axial-flux permanent magnet synchronous machine. Results showed that the parallel winding had the smallest resistance and loss. Moreover, radial and concentric winding had the highest induced voltage and torque while the radial winding had 20% less phase resistance than concentric. Also, the induced voltage of radial winding had the smallest total harmonic distortion in comparison with other winding types. A novel unequal width parallel winding is proposed and it is compared with parallel winding separately. It is found that by simply increasing the cross-section area of wave windings, it is possible to decrease copper loss by 17%.

Software-Defined Radios for CubeSat Applications: A Brief Review and Methodology

CubeSats have revolutionized the way scientists and students perceive space. The majority of CubeSat communication is greatly limited by the AX.25 standards, the small communication window, the available transmission power, and the available bandwidth at VHF/UHF band. As a result, CubeSat radios could only establish low data rate links which restrict the communication capabilities of a CubeSat mission. In this article, a brief review of current software-defined radios (SDRs) used in space missions is given. In addition, two different design methodologies for SDRs for CubeSats are proposed that can be used as a guideline for CubeSat developers. Finally, a high data rate SDR for the UOW CubeSat project is presented that address all the above limitations. The radio operates at S-band, employs quadrature amplitude modulation with a maximum data rate of 60 Mb/s consuming 2.6 Watts in transmit mode and 0.4 Watts in receive mode. The digital signal processing functions and the mode control of the radio are orchestrated by a field programmable gate array system-on-chip. The analog radio frequency domain is accommodated by a 4-layer printed circuit board with dimensions of 92 mm × 88 mm. The goal of the UOW CubeSat radio is an adaptive, on-flight reconfigurable communication platform that will revolutionize the current communication capabilities of the CubeSats and expand nanosatellites mission perspectives.