Defects In Printed Circuit Boards Research Articles

Research of Design Technology of Printed Circuit Board

This paper delves into various methodologies for enhancing the quality, design, and optimization of Printed Circuit Boards (PCBs). With the development of the technology, the importance of Printed Circuit Board(PCB) is recently mentioned by more and more people who is trying to make progress of human technology. The classification of PCB defects, a crucial step in ensuring product reliability, is discussed on several categories of defects in PCB, highlighting recent advancements such as fuzzy c-means segmentation, which significantly improves defect detection accuracy. When producing, the layout is quite significant. In a conference, a group of scientists used a thermal layout modelling and optimization routine to make the board having more space to put circuit on it. Methods to ensure PCB quality during production are examined, focusing on optical and electrical testing. The PCB design process is also explored, emphasizing the importance of those considerations before production. Finally, the paper reviews innovative approaches to PCB layout optimization, particularly in managing heat dissipation and dynamic behavior through advanced simulation techniques.

Efficient detection method for tiny defects on printed circuit boards based on focus information transfer and structurally flexible head

Abstract Aiming at the conflict between the defect feature recognition capability and the detection speed of current vision inspection techniques in the task of detecting tiny defects in printed circuit boards (PCBs). In this paper, we proposed an EPD-YOLO with a focus information transfer (FIT) structure and a structurally flexible head (SFHead). While improving the network’s ability to recognize tiny defects in similar PCBs through FIT, the feature information capturing capability of the dual SFHead structure is utilized to ensure detection accuracy and improve real-time detection speed. Experimental results show that the proposed EPD-YOLO has a mAP of 97.6 % , while the number of network parameters is only 5.13M, and it takes only 7.4 ms to detect an image, which achieves a better balance between accuracy and speed.

YOLO-BFRV: An Efficient Model for Detecting Printed Circuit Board Defects.

The small area of a printed circuit board (PCB) results in densely distributed defects, leading to a lower detection accuracy, which subsequently impacts the safety and stability of the circuit board. This paper proposes a new YOLO-BFRV network model based on the improved YOLOv8 framework to identify PCB defects more efficiently and accurately. First, a bidirectional feature pyramid network (BIFPN) is introduced to expand the receptive field of each feature level and enrich the semantic information to improve the feature extraction capability. Second, the YOLOv8 backbone network is refined into a lightweight FasterNet network, reducing the computational load while improving the detection accuracy of minor defects. Subsequently, the high-speed re-parameterized detection head (RepHead) reduces inference complexity and boosts the detection speed without compromising accuracy. Finally, the VarifocalLoss is employed to enhance the detection accuracy for densely distributed PCB defects. The experimental results demonstrate that the improved model increases the mAP by 4.12% compared to the benchmark YOLOv8s model, boosts the detection speed by 45.89%, and reduces the GFLOPs by 82.53%, further confirming the superiority of the algorithm presented in this paper.

MuSAP-GAN: printed circuit board defect detection using multi-level attention-based printed circuit board with generative adversarial network

MuSAP-GAN: printed circuit board defect detection using multi-level attention-based printed circuit board with generative adversarial network

A deep learning approach for automated PCB defect detection: A comprehensive review

The ever-expanding market for electronic devices has significantly heightened the demand for high-quality printed circuit boards (PCBs). Even minor defects in PCBs can pose substantial safety risks for end-users. This article provides a comprehensive review on deep learning-based approaches for PCB defect detection. Our exploration covers various critical aspects, including the classification of PCB defects, automated vision inspection (AVI) techniques, object detection methodologies, and the widespread adoption of deep learning models. Specifically, we focus on the state-of-the-art approach known as region-based Fully Convolutional Network with Feature Pyramid Networks (FPN-RFCN). Additionally, we discuss effective data augmentation techniques and commonly used evaluation metrics in this domain. This review provides valuable insights for researchers, practitioners, and industry professionals engaged in PCB quality assurance.

PCB defect detection algorithm based on deep learning

Deep learning gained great popularity in the task of object detection. This paper proposes a printed circuit board (PCB) defect detection algorithm based on deep learning, which can improve product quality and avoid potential failures and accidents in the electronics manufacturing industry. In this paper, the YOLOv7 model is selected as the original model for PCB defect detection. Firstly, the K-means++ clustering algorithm is used to calculate the target anchor parameters which can enhance the dataset. Secondly, the receptive field enhancement (RFE) module is added to the head layer of the network to take full advantage of the receptive field in the feature map. Thirdly, the loss function CIoU of the YOLOv7 model is changed to WIoUv2. Fourthly, add the Triplet attention mechanism to the CBS and SPPCSPC modules. Finally, the detection accuracy of the improved YOLOv7 model is compared with that of Faster R-CNN, SSD, YOLOv3-tiny, YOLOv5s, and YOLOv7 models. The experimental results show that the detection accuracy and detection speed of the improved YOLOv7 model are enhanced compared with the original YOLOv7 model.

MFAD-RTDETR: A Multi-Frequency Aggregate Diffusion Feature Flow Composite Model for Printed Circuit Board Defect Detection

To address the challenges of excessive model parameters and low detection accuracy in printed circuit board (PCB) defect detection, this paper proposes a novel PCB defect detection model based on the improved RTDETR (Real-Time Detection, Embedding and Tracking) method, named MFAD-RTDETR. Specifically, the proposed model introduces the designed Detail Feature Retainer (DFR) into the original RTDETR backbone to capture and retain local details. Subsequently, based on the Mamba architecture, the Visual State Space (VSS) module is integrated to enhance global attention while reducing the original quadratic complexity to a linear level. Furthermore, by exploiting the deformable attention mechanism, which dynamically adjusts reference points, the model achieves precise localization of target defects and improves the accuracy of the transformer in complex visual tasks. Meanwhile, a receptive field synthesis mechanism is incorporated to enrich multi-scale semantic information and reduce parameter complexity. In addition, the scheme proposes a novel Multi-frequency Aggregation and Diffusion feature composite paradigm (MFAD-feature composite paradigm), which consists of the Aggregation Diffusion Fusion (ADF) module and the Refiner Feature Composition (RFC) module. It aims to strengthen features with fine-grained awareness while preserving a certain level of global attention. Finally, the Wise IoU (WIoU) dynamic nonmonotonic focusing mechanism is used to reduce competition among high-quality anchor boxes and mitigate the effects of the harmful gradients from low-quality examples, thereby concentrating on anchor boxes of average quality to promote the overall performance of the detector. Extensive experiments are conducted on the PCB defect dataset released by Peking University to validate the effectiveness of the proposed model. The experimental results show that our approach achieves the 97.0% and 51.0% performance in mean Average Precision (mAP)@0.5 and mAP@0.5:0.95, respectively, which significantly outperforms the original RTDETR. Moreover, the model reduces the number of parameters by approximately 18.2% compared to the original RTDETR.

PCB plug-in solder joint defect detection method based on coordinated attention-guided information fusion

Printed Circuit Boards (PCBs) are the foundational component of electronic devices, and the detection of PCB defects is essential for ensuring the quality control of electronic products. Aiming at the problem that the existing PCB plug-in solder defect detection algorithms cannot meet the requirements of high precision, low false alarm rate, and high speed at the same time, this paper proposes a method based on spatial convolution pooling and information fusion. Firstly, on the basis of YOLOv3, an attention-guided pyramid structure is used to fuse context information, and multiple convolutions of different size are used to explore richer high-level semantic information; Secondly, a coordinated attention network structure is introduced to calibrate the fused pyramidal feature information, highlighting the important feature channels, and reducing the adverse impact of redundant parameters generated by feature fusion; Finally, the ASPP (Atrous Spatial Pyramid Pooling) structure is implemented in the original Darknet53 backbone feature extraction network to acquire multi-scale feature information of the detection targets. With these improvements, the average detection accuracy of the enhanced network has been elevated from 94.45 to 96.43%. This experiments shows that the improved network is more suitable for PCB plug-in solder defect detection applications.

Attentive context and semantic enhancement mechanism for printed circuit board defect detection with two-stage and multi-stage object detectors

Printed Circuit Boards (PCBs) are key devices for the modern-day electronic technologies. During the production of these boards, defects may occur. Several methods have been proposed to detect PCB defects. However, detecting significantly smaller and visually unrecognizable defects has been a long-standing challenge. The existing two-stage and multi-stage object detectors that use only one layer of the backbone, such as Resnet’s third layer (C4\\documentclass[12pt]{minimal} \\usepackage{amsmath} \\usepackage{wasysym} \\usepackage{amsfonts} \\usepackage{amssymb} \\usepackage{amsbsy} \\usepackage{mathrsfs} \\usepackage{upgreek} \\setlength{\\oddsidemargin}{-69pt} \\begin{document}$$C_4$$\\end{document}) or fourth layer (C5\\documentclass[12pt]{minimal} \\usepackage{amsmath} \\usepackage{wasysym} \\usepackage{amsfonts} \\usepackage{amssymb} \\usepackage{amsbsy} \\usepackage{mathrsfs} \\usepackage{upgreek} \\setlength{\\oddsidemargin}{-69pt} \\begin{document}$$C_5$$\\end{document}), suffer from low accuracy, and those that use multi-layer feature maps extractors, such as Feature Pyramid Network (FPN), incur higher computational cost. Founded by these challenges, we propose a robust, less computationally intensive, and plug-and-play Attentive Context and Semantic Enhancement Module (ACASEM) for two-stage and multi-stage detectors to enhance PCB defects detection. This module consists of two main parts, namely adaptable feature fusion and attention sub-modules. The proposed model, ACASEM, takes in feature maps from different layers of the backbone and fuses them in a way that enriches the resulting feature maps with more context and semantic information. We test our module with state-of-the-art two-stage object detectors, Faster R-CNN and Double-Head R-CNN, and with multi-stage Cascade R-CNN detector on DeepPCB and Augmented PCB Defect datasets. Empirical results demonstrate improvement in the accuracy of defect detection.

FSPDD: A double-branch attention guided network for few-shot PCB defect detection

AbstractDuring the production of printed circuit board (PCB), there will be defects due to inappropriate operations, which will affect the use of electronic products. Majority defect detection methods cost a large number of annotated samples to train detection models. However, PCB defect samples are difficult to collect. Moreover, existing few-shot object detection methods tend to extracting low-level features from support and query images via the shared backbone such as ResNet-50. However, it is not sufficient to obtain fine-grained prior guidance. To address the above issues, we propose a few-shot PCB defect detection model with double-branch attention. Specifically, the joint attention enhancement (JAE) module is proposed to fully mine effective information of query PCB images in multiple dimensions to enhance the representation of latent defects. Then, the multi-scale guidance (MSG) module is proposed to integrate prior knowledge within support PCB images into vectors to reweight query PCB images. Experiments on the PCB defect dataset demonstrate that AP of FSPDD outperforms state-of-the-art methods under different shot settings (k=1,2,3,5,10,30) and our proposed FSPDD has a good generalization ability, in which AP reachs 0.273 when $$k=30$$ k = 30 and is 5.28% higher than SOTA methods.

Local and Global Context-Enhanced Lightweight CenterNet for PCB Surface Defect Detection.

Printed circuit board (PCB) surface defect detection is an essential part of the PCB manufacturing process. Currently, advanced CCD or CMOS sensors can capture high-resolution PCB images. However, the existing computer vision approaches for PCB surface defect detection require high computing effort, leading to insufficient efficiency. To this end, this article proposes a local and global context-enhanced lightweight CenterNet (LGCL-CenterNet) to detect PCB surface defects in real time. Specifically, we propose a two-branch lightweight vision transformer module with local and global attention, named LGT, as a complement to extract high-dimension features and leverage context-aware local enhancement after the backbone network. In the local branch, we utilize coordinate attention to aggregate more powerful features of PCB defects with different shapes. In the global branch, Bi-Level Routing Attention with pooling is used to capture long-distance pixel interactions with limited computational cost. Furthermore, a Path Aggregation Network (PANet) feature fusion structure is incorporated to mitigate the loss of shallow features caused by the increase in model depth. Then, we design a lightweight prediction head by using depthwise separable convolutions, which further compresses the computational complexity and parameters while maintaining the detection capability of the model. In the experiment, the LGCL-CenterNet increased the mAP@0.5 by 2% and 1.4%, respectively, in comparison to CenterNet-ResNet18 and YOLOv8s. Meanwhile, our approach requires fewer model parameters (0.542M) than existing techniques. The results show that the proposed method improves both detection accuracy and inference speed and indicate that the LGCL-CenterNet has better real-time performance and robustness.

Performance Evaluation of a Decentralized Learning Architecture for PCB Defect Classification

Printed circuit board (PCB) defect detection, which is an important task in industrial factories, receives great attention from both researchers and practitioners. To achieve high detection accuracy, the traditional training method requires data collection from multiple industrial factories. However, in practice, factories possess their own data and do not want to share the private data with other participants. Therefore, we introduce a decentralized learning method that makes use the knowledge of clients in the system. By leveraging the federated learning technique, a consensus global detection model can be produced while maintaining data privacy. We have conducted extensive experiments to evaluate the detection performance under various learning methods: federated learning, centralized learning, and local learning. We also compare the detection performance of two well-known detection models: YOLOv5 and YOLOv8. The experimental results show that the federated learning based method yields better detection performance than the local learning.

Enhancing YOLOv5 for superior PCB defect detection: lightweight heads and small target precision

Abstract This paper introduces an improved YOLOv5 network designed to achieve enhanced performance in the field of printed circuit board (PCB) defect detection. We incorporate a lightweight detection head, reducing the number of network parameters and improving computational efficiency. This not only facilitates operation in resource-constrained environments but also maintains detection accuracy. To better address the specific requirements of PCB defect detection, we introduce a small target detection head. By adding a detection head specifically designed for small targets, we enhance the network’s ability to perceive subtle defects, thereby improving detection accuracy. Finally, we validate our proposed improvements through experiments on a large-scale PCB defect dataset. Compared to the traditional YOLOv5 network, our model exhibits significant improvements in both accuracy and efficiency.

Fault Detection in Printed Circuit Board (PCB) using Image Subtraction Method

Fault detection in PCBs is a important task in the electronics industry to ensure the consistency and performance of electronic devices. One common approach for detecting defects in PCBs is the subtraction method, which involves subtracting a reference image of a defect-free PCB from an image of a PCB with defects. The resulting image gives the differences between the two images, making it easier to detect and classify defects. In this work, a defect detection system for PCBs using the subtraction method using MATLAB is proposed. The research work uses publicly available PCB defect datasets to train and test the system. The work consists of image pre-processing, image subtraction, and defect detection.

EHIR: Energy-based Hierarchical Iterative Image Registration for Accurate PCB Defect Detection

Printed Circuit Board (PCB) Surface defect detection is crucial to ensure the quality of electronic products in manufacturing industry. Detection methods can be divided into non-referential and referential methods. Non-referential methods employ designed rules or learned data distribution without template images but are difficult to address the uncertainty and subjectivity issues of defects. In contrast, referential methods use templates to achieve better performance but rely on precise image registration. However, image registration is especially challenging in feature extracting and matching for PCB images with defective, reduplicated or less features. To address these issues, we propose a novel Energy-based Hierarchical Iterative Image Registration method (EHIR) to formulate image registration as an energy optimization problem based on the edge points rather than finite features. Our framework consists of three stages: Edge-guided Energy Transformation (EET), EHIR and Edge-guided Energy-based Defect Detection (EEDD). The novelty is that the consistency of contours contributes to aligning images and the difference is highlighted for defect location. Extensive experiments show that this method has high accuracy and strong robustness, especially in the presence of defect feature interference, where our method demonstrates an overwhelming advantage over other methods.

Automatic PCB Sample Generation and Defect Detection Based on ControlNet and Swin Transformer.

In order to improve the efficiency and accuracy of multitarget detection of soldering defects on surface-mounted components in Printed Circuit Board (PCB) fabrication, we propose a sample generation method using Stable Diffusion Model and ControlNet, as well as a defect detection method based on the Swin Transformer. The method consists of two stages: First, high-definition original images collected in industrial production and the corresponding prompts are input to Stable Diffusion Model and ControlNet for automatic generation of nonindependent samples. Subsequently, we integrate Swin Transformer as the backbone into the Cascade Mask R-CNN to improve the quality of defect features extracted from the samples for accurate detection box localization and segmentation. Instead of segmenting individual components on the PCB, the method inspects all components in the field of view simultaneously over a larger area. The experimental results demonstrate the effectiveness of our method in scaling up nonindependent sample datasets, thereby enabling the generation of high-quality datasets. The method accurately recognizes targets and detects defect types when performing multitarget inspection on printed circuit boards. The analysis against other models shows that our improved defect detection and segmentation method improves the Average Recall (AR) by 2.8% and the mean Average Precision (mAP) by 1.9%.

DSASPP: Depthwise Separable Atrous Spatial Pyramid Pooling for PCB Surface Defect Detection

Printed circuit board (PCB) defect detection is an important and indispensable part of industrial production. PCB defects, due to the small target and similarity between classes, in the actual production of the detection process are prone to omission and false detection problems. Traditional machine-learning-based detection methods are limited by the actual needs of industrial defect detection and do not show good results. Aiming at the problems related to PCB defect detection, we propose a PCB defect detection algorithm based on DSASPP-YOLOv5 and conduct related experiments on the PKU-Market-PCB dataset. DSASPP-YOLOv5 is an improved single-stage detection model, and we first used the K-means++ algorithm for the PKU-Market-PCB dataset to recluster the model so that the model is more in line with the characteristics of PCB small target defects. Second, we design the Depthwise Separable Atrous Spatial Pyramid Pooling (DSASPP) module, which effectively improves the correlation between local and global information by constructing atrous convolution branches with different dilated rates and a global average pooling branch. The experimental results show that our model achieves satisfactory results in both the mean average precision and detection speed metrics compared to existing models, proving the effectiveness of the proposed method.

LW-YOLO: Lightweight Deep Learning Model for Fast and Precise Defect Detection in Printed Circuit Boards

Printed circuit board (PCB) manufacturing processes are becoming increasingly complex, where even minor defects can impair product performance and yield rates. Precisely identifying PCB defects is critical but remains challenging. Traditional PCB defect detection methods, such as visual inspection and automated technologies, have limitations. While defects can be readily identified based on symmetry, the operational aspect proves to be quite challenging. Deep learning has shown promise in defect detection; however, current deep learning models for PCB defect detection still face issues like large model size, slow detection speed, and suboptimal accuracy. This paper proposes a lightweight YOLOv8 (You Only Look Once version 8)-based model called LW-YOLO (Lightweight You Only Look Once) to address these limitations. Specifically, LW-YOLO incorporates a bidirectional feature pyramid network for multiscale feature fusion, a Partial Convolution module to reduce redundant calculations, and a Minimum Point Distance Intersection over Union loss function to simplify optimization and improve accuracy. Based on the experimental data, LW-YOLO achieved an mAP0.5 of 96.4%, which is 2.2 percentage points higher than YOLOv8; the precision reached 97.1%, surpassing YOLOv8 by 1.7 percentage points; and at the same time, LW-YOLO achieved an FPS of 141.5. The proposed strategies effectively enhance efficiency and accuracy for deep-learning-based PCB defect detection.

Printed Circuit Board Defect Detection Algorithm Based on yolov5s Structure Improvement

In terms of the existing PCB defect detection algorithm in complicated model structure with huge numbers of parameters slow speed, low detection accuracy and other problems, an improved PCB defect detection algorithm which is based upon yolov5s is proposed. Taking the yolov5s model as the main framework, the Omni-Dimensional Dynamic Convolution (OdConv) structure is used to replace the backbone of the original model, and the Convolutional Block Attention Module (CBAM) attention mechanism is introduced after the Conv layer of the Neck network. CBAM attention mechanism is brought in after the Conv layer of the Neck network (Neck), and the Focal-EIoU Loss function is modified by the Complete Intersection and Merger Ratio Loss (CIoU Loss) function, and different weights are assigned to high-quality samples and low-quality samples respectively, which solves sample imbalance existing in the target detection problem, and the results show that this algorithm is comparable to the original model. Experiments are conducted and the results show that this paper’s algorithm improves the mAP by 1.9%, speeds up by 47.75Fps, decrease the model size by 13.26 M, and reduces the computation volume by 12.3 G compared to yolov5s at IoU = 0.5.

Improving PCB defect detection using selective feature attention and pixel shuffle pyramid

– Due to the ongoing miniaturization of electronic products and the use of miniature printed circuit boards (PCBs), existing AI-based defect detection methods have exhibited poor performance in detecting tiny PCB defects. This issue can potentially compromise safety, degrade manufacturing quality, and increase production costs. To tackle this problem, we propose two novel techniques for PCB defect detection, namely Selective Feature Attention (SF attention) and Pixel Shuffle Pyramid (PSPyramid). SF attention identifies important features from a pyramid feature map to fuse the semantic and spatial information, while PSPyramid effectively fuses semantic features to detect various types of defects on PCBs, especially tiny defects. Moreover, a customized training strategy, specifically for PCB defect detection, is devised. To evaluate the performance of our proposed algorithms, extensive experiments have been conducted on two well-known PCB datasets containing tiny defects: the DeepPCB and TDD datasets. Our proposed non-referential method achieves performance comparable to existing referential methods on the DeepPCB dataset, making it more feasible for industrial applications. Compared to state-of-the-art methods, our method reduces the error by 16%, in terms of AP50, on the TDD dataset. The experimental results demonstrate the effectiveness of our proposed method in improving the quality assurance process for PCBs in the electronics industry.