In Very Large Scale Integration (VLSI) circuits, the estimation techniques for resistors (R), inductors (L), and capacitors (C) heavily rely on segmented circuit analysis, which involves usage of complex mathematical simplification models. These methods have been conventionally applied to estimate the behavior of circuits, but when faced with systems featuring unique circuit architectures, they often encounter inaccuracies and limitations. The significance of adders as fundamental building blocks in intricate circuit design cannot be overstated. In such complex circuits, various parameters, including parasitic resistances, inductances, and capacitances, engage an indispensable effort in the analysis of delays and performance. However, the conventional estimation methods fail to address the complexities of these systems and the impacts of parasitics accurately. To overcome these challenges, this paper proposes a novel approach that harnesses the potential of machine learning algorithms. By integrating machine learning into the estimation process, the research aims to achieve specific and precise analysis methods that can cater to the needs of modern VLSI circuits. The proposed methodology involves collecting a comprehensive dataset using different adder circuits. From each individual adder circuit layout, the relevant information on resistors, capacitors, and inductors is carefully extracted and compiled. This dataset serves as the foundation for training the machine learning models. Three standard machine learning models are employed in this study: adaboost, Tree, and k-Nearest Neighbors (kNN). Their task is to predict the values of resistors, inductors, and capacitors based on the input data from the adder circuits. Among these models, adaboost proves to be the most effective, exhibiting superior performance by achieving a reduced root mean square error of about 0.008. When compared to the Tree and kNN models, adaboost stands out as the optimal choice for accurately estimating the R values in VLSI circuits.
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