Power Semiconductor Research Articles

Machine learning-based prediction of on-state voltage for real-time health monitoring of IGBT

Real-time temperature monitoring of power semiconductors is a powerful tool for the predictive maintenance and lifetime prediction of power converters, and is typically performed by measuring temperature sensitive electrical parameters (TSEP). In this work, we demonstrate a machine learning-based method to estimate the on-state voltage of a real converter prototype featuring variable load of electric vehicle (EV) and photovoltaic (PV) systems under different ambient temperatures induced in a climate chamber. The method provides for the first-time insights on the uncertainties and feature importance for the predictions, and is aimed to be industrial compatible by applying only methods that are well established in industry. The approach is further flexible to any converter system, independently of its specifications. We have used the Support Vector Machine, K-Nearest Neighbors, and Decision Tree algorithms to predict the on-state voltage as functions of the readily measured parameters of a converter. We show that for the PV case, the K-Nearest Neighbor method yields the lowest mean absolute error of about 0.75 % for prediction, while for EV, the K-Nearest Neighbor algorithm gives the lowest mean absolute error of 5 %.

Short-circuit protection scheme with efficient soft turn-off for power modules

With the increased current density of power semiconductor devices, their short-circuit reliability becomes a critical concern, especially prominent in SiC MOSFETs, exhibiting a much narrower short-circuit withstanding time. This paper proposes an effective protection scheme utilizing a compact PCB Rogowski coil to detect the short-circuit fault fast, and an active gate clamping circuit with a soft turn-off for protection. This scheme is first experimentally verified in discrete Si IGBT and SiC MOSFET, and subsequently in power modules for both. The results confirm its benefits in decreasing overshoot drain or collector voltage, peak current, and limiting short-circuit energy to avoid thermal runaway failure. Furthermore, the influence of key circuitry parameters in the soft turn-off circuit is investigated, and the general design methodology aiming for different devices is proposed.

Reliability investigation of repeated unclamped inductive switching in a diode-clamped SiC circuit breaker

This paper investigates the reliability of a solid-state circuit breaker with a clamped SiC diode as avalanche voltage after repeated cutoff operations. In solid-state circuit breakers, a clamping element is connected in parallel with a power semiconductor switch to divert the cutoff current. The SiC merged PiN Schottky (MPS) diode is one of the candidates for clamping elements in solid-state circuit breakers because of its high avalanche tolerance and good robustness after the shocks. Reliability tests indicate that no significant electrical characteristics are found for both the SiC MOSFET and the SiC MPS diode in the proposed circuit breaker, even after more than 10,000 unclamped inductive switching (UIS) cycles. These results are based on a 400V, 50A DC distribution system with the UIS condition. The results show that the SiC MPS diode works well as a clamped element for the long-term reliability of the solid-state circuit breaker.

Calibration methods and power cycling of double-side cooled SiC MOSFET power modules

Reliability analysis depends heavily on accurate measurements of junction temperatures for power semiconductors. It forms the foundation for precise reliability tests such as power cycling tests. One of the most established methods for junction temperature measurement in MOSFETs is the VSD(T) method. With the introduction of new module configurations such as the DSC (double-side cooled) module with cooling on both sides, conventional calibration methods for single side cooling require a critical review regarding their applicability. This article will highlight various calibration options and analyse them in regard to sensitivity and reproducibility for DSC modules. Subsequently, the most promising methods are evaluated experimentally. It was found that by heating the modules on both sides, a better temperature uniformity can be achieved than from single side heating alone. This allows to apply the VSD(T) method on DSC modules also during power cycling. A power cycling test with in situ mechanical force measurement was conducted to verify the results.

Data-driven and physics-based reliability tests to failure of a power electronics converter

This paper presents an overview on design and execution of reliability tests for a power converter, with an outlook on in-field health management. The topics include physics-based and data-driven accelerated tests to failure, each adapted for the constituent elements of a converter: power semiconductor modules, DC link capacitors, and control electronics. The methods describe the outline of how the different role and nature of the components require a tailored reliability investigation approach to be most cost-effective for increasing system reliability. Testing examples for electronics are given in this article, as they are often neglected in the reliability discussion of power converters.

Analysis of SiC/Si Heterojunction Band Energy and Interface State Characteristics for SiC/Si VDMOS.

SiC/Si and GaN/Si heterojunction technology has been widely used in power semiconductor devices, and SiC/Si VDMOS and GaN/Si VDMOS were proposed in our previous paper. Based on existing research, breakdown point transfer technology (BPT) was used to optimize SiC/Si VDMOS. Simulation results showed that the BV of the SiC/Si heterojunction VDMOS was considerably increased from 259 V to 1144 V, and Ron,sp decreased from 18.2 mΩ·cm2 to 6.03 mΩ·cm2 compared with Si VDMOS. In order to analyze the characteristics of the SiC/Si heterojunction structure deeply, the influence of the interface state characteristics of the SiC/Si heterojunction on the electrical parameters of VDMOS was analyzed, including electric field characteristics, blocking characteristics, output characteristics, and transfer characteristics. In addition, the influence of the interface state of the SiC/Si heterojunction on energy band characteristics was analyzed. The results showed that with an increase in the interfacial charge (acceptor) concentration, the p-type trap layer was introduced into the interface of the SiC/Si heterojunction, energy increased slightly, and the barrier height difference at the heterojunction increased, resulting in an increase in BV. At the same time, since the barrier height became higher, electrons did not flow easily, so Ron,sp increased. On the contrary, when a charge (donor) was introduced at the interface of the SiC/Si heterojunction, the number of electrons in the channel increased, resulting in an increase in the electron current, which is conducive to the flow of electrons, resulting in a decrease in Ron,sp. The energy band and other characteristics of devices with temperature were simulated at different temperatures. Finally, the effects of SiC/Si heterojunction interface states on interface capacitances and switching performances of VDMOS devices were also discussed.

Terminal strength test of TO-220 packaged Schottky barrier diode using finite element method

Power semiconductors are used in various industries owing to their high energy efficiency and controllability. Recently, their use in the aerospace and automotive industries has given rise to the need for high reliability in the market. Individual power semiconductor devices have a major impact on the reliability of the entire power system as they are the most basic elements. To ensure the reliability of semiconductors, various reliability tests are required to be conducted according to various international evaluation standards. This study evaluates the terminal strength testing of TO-220 package according to Method 2036 of MIL-STD 750E document. Finite element analysis was utilized to perform axial tensile tests and compared with actual experiments. Additionally, transverse tensile, torque, and bending tests were performed to evaluate the safety factors for different components of the package. Moreover, the failure mechanism of wire bonding according to various terminal strength tests using the finite element method is discussed.

Active Thermal Control in Neutral-Point-Clamped Multilevel Converters Based on Switching-Cell Arrays

Neutral-point-clamped multilevel converters are a suitable solution to the implementation of low–medium voltage and power applications at present, thanks to their intrinsic superior voltage and current quality. The conventional configurations of these converters present uneven power loss distribution, causing thermal stress in some power semiconductors, which weakens the power converter reliability. To overcome this, an implementation of the neutral-point-clamped multilevel converter based on a switching-cell array is introduced, adding redundant conduction paths on one side and more options to distribute the switching losses on the other side. An active thermal control is proposed to balance the temperature distribution in the converter. A four-level converter has been implemented to evaluate the proposed solution. The experimental results show that the proposed implementation and active thermal control presents an enhanced temperature distribution in the converter and, therefore, reduced thermal stress and better reliability.

Tribological behavior of polycrystalline diamond based on photo-Fenton reaction

Polycrystalline diamonds (PCD) has high thermal conductivity and as heat sinks in semiconductor power devices. However, PCD exhibits high hardness and strong chemical inertness lead to lower processing efficiency and increase processing costs. Hence, achieving efficiently obtain high-quality PCD surfaces is crucial. In this study, we investigated the tribological behavior of PCD in different environments (deionized water, H2O2 + UV, Fenton, and photo-Fenton) and under different photo-Fenton conditions (pH, light intensity, Fe3O4 concentration, and H2O2 concentration) via Si3N4 ball-disk friction and wear experiments. The photo-Fenton reaction improved the material removal rate of PCD, which was the highest (285.4 μm3/min) under optimized conditions of pH = 3, 100 mW/cm2 light intensity, 2 wt% Fe3O4 concentration, and 10 wt% H2O2 concentration. Based on the friction and wear experimental results and X-ray photoelectron spectroscopy, we propose a material removal mechanism for PCD. The hydroxyl radical (·OH) produced by the photo-Fenton reaction oxidize the PCD surface to form CO, CO, and C–OH groups, which are converted into C–O–Si bridge bonds on the PCD surface, resulting in material removal. Our study findings provide theoretical support for the photo-Fenton reaction -assisted CMP of PCD.

FFC-NMR Power Supply with Hybrid Control of the Semiconductor Devices

The performance of FFC-NMR power supplies is evaluated not only considering the technique requirements but also comparing efficiencies and power consumption. Since the characteristics of FFC-NMR power supplies depend on the power circuit topology and on the control solutions, the control design is a core aspect for the development of new FFC systems. A new hybrid solution is described that allows controlling the power of semiconductors by switches (ON/OFF mode) or as a linear device. The approach avoids over-design of the power supply and makes it possible to implement new low power solutions constituting a novel design by joining a continuous match between the ON/OFF mode and the linear control of the power semiconductor devices.

Technology and Applications of Wide Bandgap Semiconductor Materials: Current State and Future Trends

Silicon (Si)-based semiconductor devices have long dominated the power electronics industry and are used in almost every application involving power conversion. Examples of these include metal-oxide-semiconductor field-effect transistors (MOSFETs), insulated-gate bipolar transistors (IGBTs), gate turn-off (GTO), thyristors, and bipolar junction transistor (BJTs). However, for many applications, power device requirements such as higher blocking voltage capability, higher switching frequencies, lower switching losses, higher temperature withstand, higher power density in power converters, and enhanced efficiency and reliability have reached a stage where the present Si-based power devices cannot cope with the growing demand and would usually require large, costly cooling systems and output filters to meet the requirements of the application. Wide bandgap (WBG) power semiconductor materials such as silicon carbide (SiC), gallium nitride (GaN), and diamond (Dia) have recently emerged in the commercial market, with superior material properties that promise substantial performance improvements and are expected to gradually replace the traditional Si-based devices in various power electronics applications. WBG power devices can significantly improve the efficiency of power electronic converters by reducing losses and making power conversion devices smaller in size and weight. The aim of this paper is to highlight the technical and market potential of WBG semiconductors. A detailed short-term and long-term analysis is presented in terms of cost, energy impact, size, and efficiency improvement in various applications, including motor drives, automotive, data centers, aerospace, power systems, distributed energy systems, and consumer electronics. In addition, the paper highlights the benefits of WBG semiconductors in power conversion applications by considering the current and future market trends.

Performance evaluation of five‐level packed U‐cell inverter and its fault‐tolerant variants

SummaryIn the power electronics industry, reliability is of utmost importance to manufacturers. Power semiconductor devices are extensively utilized in multilevel inverters (MLIs), which results in increased failure probability. MLI structures have a significant impact on the system's overall reliability. MLIs with a high degree of reliability reduce system maintenance costs and improve efficiency and the life of the entire system. This paper presents a comprehensive evaluation of five‐level packed U‐cell (PUC5) inverter, modified five‐level PUC (MPUC5) inverter, and their fault‐tolerant (FT) variants with respect to reliability, degree of fault tolerance, power loss and efficiency, and cost. A more accurate reliability evaluation method is used in this work in which failure rates of each component of inverter topologies under healthy and post‐fault conditions are calculated. Hence, this method provides more accurate reliability function of an MLI topology as compared to other methods in which failure rates are assumed to be same for all switches. Typhoon HIL‐402 emulator is used to demonstrate the FT capabilities of topologies in hardware‐in‐the‐loop (HIL) environments.

Paralleling of IGBT Power Semiconductor Devices and Reliability Issues

Paralleling of power semiconductor devices is inevitable considering their widespread application and exploitation in the extended horizon of these applications. However, paralleling of power semiconductor devices is prone to severe unbalancing corresponding to the non-idealities of device parameters, which leads to non-identical dynamic and static characteristics of the power devices, as well as the operating conditions and aging. Therefore, the currents are generally non-uniform and cause the derating of the system. This paper discusses and analyzes issues associated with the paralleling of IGBT power devices, which can evoke serious reliability issues. Furthermore, the paper examines the techniques and methodologies that have been proposed to reduce the issue of current unbalancing of parallel-connected power devices.

Enhanced asymmetrical modulation for half‐bridge series resonant inverters in induction heating applications

AbstractThis paper presents a method that improves the reliability of half‐bridge (HB) series resonant inverters (SRI) for high‐frequency induction heating applications. Many industrial processes, like induction heat treatments, are very repetitive. This cyclical operation represents a strong limitation of the inverter's reliability, mainly due to the accelerated stress of the power semiconductors. This method consists in an enhanced asymmetrical pulse width modulation (EAPWM) that allows distributing the losses across the components, thereby reducing the cyclic increase in junction temperature of the power devices, and thus achieves a reliability that is more than twice as high as that achieved using traditional modulation methods. The work methodology includes a theoretical study of the HB inverter and a complete analysis of losses. The presented design rules have been used to implement a 25 kW, 100 kHz inverter. The use of silicon carbide (SiC) MOSFET transistors allows reaching an efficiency greater than 99%. The analytical results obtained have been experimentally validated by testing the inverter on an induction heating test bench.

A Review of Multilevel Inverter Topologies for Grid-Connected Sustainable Solar Photovoltaic Systems

Solar energy is one of the most suggested sustainable energy sources due to its availability in nature, developments in power electronics, and global environmental concerns. A solar photovoltaic system is one example of a grid-connected application using multilevel inverters (MLIs). In grid-connected PV systems, the inverter’s design must be carefully considered to improve efficiency. The switched capacitor (SC) MLI is an appealing inverter over its alternatives for a variety of applications due to its inductor-less or transformer-less operation, enhanced voltage output, improved voltage regulation inside the capacitor itself, low cost, reduced circuit components, small size, and less electromagnetic interference. The reduced component counts are required to enhance efficiency, to increase power density, and to minimize device stress. This review presents a thorough analysis of MLIs and a classification of the existing MLI topologies, along with their merits and demerits. It also provides a detailed survey of reduced switch count multilevel inverter (RSC-MLI) topologies, including their designs, typical features, limitations, and criteria for selection. This paper also covers the survey of SC-MLI topologies with a qualitative assessment to aid in the direction of future research. Finally, this review will help engineers and researchers by providing a detailed look at the total number of power semiconductor switches, DC sources, passive elements, total standing voltage, reliability analysis, applications, challenges, and recommendations.

Health Monitoring of Power Semiconductor Module Using Temperature Sensitive Electrical Parameter

Power semiconductor modules (PSMs) are critical components in power electronics applications such as motor drives, renewable energy systems, and electric vehicles. The reliable operation of these modules is crucial for the safe and efficient operation of these systems. One of the most common failure mechanisms in PSMs is due to overheating or repeated heating and cooling, which can result in thermal stress and component degradation. Therefore, monitoring the temperature of PSMs is essential for ensuring their health and preventing catastrophic failures. By monitoring temperature-sensitive electrical parameters (TSEPs), such as the on-state voltage drop, it is possible to detect changes in the temperature of the PSM in real-time. The change in voltage drop can be used as an early warning sign of a potential failure or degradation of the PSM. The advantage of this method is that it provides a non-invasive and real-time monitoring solution that can detect changes in the PSM's temperature distribution.

An Open-Circuit Fault Detection Method of PMSM Fed by Dual Inverter With High Robustness

Power semiconductor is one of the most fragile components in the drive system of electric vehicles. In order to diagnose the failure timely, this paper proposes a diagnosis method of the open-circuit fault for open-end winding permanent magnet synchronous motor (OEW-PMSM) fed by dual inverter with a single dc source. The OEW- PMSM can improve the speed range and tolerance capacity of driving systems. However, the open-circuit fault diagnosis methods for Y-connected PMSMs cannot judge the faulty switch because of the symmetry of the dual inverter structure. The first step of the proposed method is to detect the faulty switch combinations by the error of normalized average value and average value of the zero-sequence reference voltage. The next step is to judge the faulty switch from a certain fault combination. The experimental results show that the open-circuit fault can be diagnosed accurately.

Hardware Realization of an Innovative Disturbance Detection Algorithm for Control Strategy of Solid-State Transfer Switch

An accurate and fast Solid-State Transfer Switch (SSTS) has the potential to automate conventional utility network. Presently, It consumes most of the transfer time in detecting the condition for initiating the transfer process. Recent developments in the power semiconductor devices technology have reduced the switching time to the tune of nanoseconds. Hence, time consumed by the disturbance detection is significant in SSTS. IEEE Std. 1100-2005 and IEEE Std. 446-1995 requires fast load transfer for SSTS. Realization of an innovative machine learning technique is implemented on three AVR microcontrollers for each of three phases. The microcontroller executes segmentation of acquired signal and calculates derivative of each segment. From each pre-processed 10-sample segment, mean absolute deviation (MAD) and energy (E) features are extracted. On the basis of feature values, SVM classifier with the linear kernel detects disturbance. Logical OR gate generates transfer enable signal to initiate the transfer process. Results of case studies appreciate the ability of proposed hardware to detect common disturbances in power system under different operating conditions. The hardware provides a feasible solution for solid state transfer switch with required accuracy and speed.

Gate Voltage-Based Active Thermal Control of Power Semiconductor Devices

Gate Voltage-Based Active Thermal Control of Power Semiconductor Devices

Active Peltier Effect Heat Sink for Power Semiconductor Device Thermal Stability Enhancement

Active Peltier Effect Heat Sink for Power Semiconductor Device Thermal Stability Enhancement