dBm Of Power Research Articles

A wideband CMOS power amplifier with 23.3 dB S21, 10.6 dBm PSAT and 12.3 % PAE for 60 GHz WPAN and 77 GHz automobile radar systems

A wideband power amplifier (PA) for 60 and 77 GHz direct-conversion transceiver using standard 90 nm CMOS technology is reported. The PA comprises a cascode input stage with a wideband T-type input-matching network and inductive interconnection and load, followed by a common-source (CS) gain stage and a CS output stage. To increase the saturated output power (PSAT) and power-added efficiency (PAE), the output stage adopts a two-way power dividing and combining architecture. Instead of the area-consumed Wilkinson power divider and combiner, miniature low-loss transmission-line inductors are used at the input and output terminals of each of the output stages for wideband input and output impedance matching to 100 Ω. This in turn results in further PSAT and PAE enhancement. The PA consumes 92.2 mW and achieves maximum power gain (S21) of 23.3 dB at 56 GHz, and S21 of 21.7 and 14 dB, respectively, at 60 and 77 GHz. In addition, the PA achieves excellent saturated output power (PSAT) of 10.6 dBm and maximum power added efficiency (PAE) of 12.3 % at 60 GHz. At 77 GHz, the PA achieves excellent PSAT of 10.4 dBm and maximum PAE of 6 %. These results demonstrate the proposed wideband PA architecture is very promising for 60 GHz wireless personal local network and 77 GHz automobile radar systems.

1.25–3.125 Gb/s per user PON with RSOA as phase modulator for statistical wavelength ONU

We report a new scheme to support, cost efficiently, ultra-dense wavelength division multiplexing (UDWDM) for optical access networks. As validating experiment, we apply phase modulation of a reflective semiconductor optical amplifier (RSOA) at the ONU with a single DFB, and simplified coherent receiver at OLT for upstream. We extend the limited 3-dB modulation bandwidth of available uncooled To-can packaged RSOA (~400MHz) and operate it at 3.125Gb/s with the optimal performance for phase modulation using small and large signal measurement characteristics. The optimal condition is selected at input power of 0dBm, with 70mA bias condition. The sensitivities at 3.125Gb/s (at BER=10−3) for heterodyne and intradyne detection reach −34.3dBm and −38.8dBm, respectively.

Broadband high performance laterally diffused metal–oxide–semiconductor power amplifier for mobile two‐way radio applications

This paper highlights achievement of broadband high performance power amplifier (PA) line up for mobile two-way radio applications. In typical two-way radio applications the input radio-frequency signal to the first PA stage comes directly from the voltage controlled oscillator, with typically 3 dBm power. Owing to high output power requirement (∼80 W) of mobile radio applications, up to three PA device stages are normally cascaded (pre-driver, driver and final PA stage). The key point in the design of the PA line up concerns the final stage. Here, this paper introduces a design methodology based on parallel-combined impedance matching technique (from theoretical derivation) enables the designers to develop broadband PA with actual PA device impedance (implementation of new generation laterally diffused metal–oxide–semiconductor device). Experimental results demonstrated output power of ∼80 W and gain of 45 dB, while preserving efficiency of 55% over the bandwidth from 760 to 870 MHz. According to author's knowledge, this amplifier demonstrated highest efficiency with 13 V DC supply (operating at 80 W) in UHF broadband frequency with high gain operation (more than 45 dB) up to date.

Injection-locked frequency divider using single-injected dual-injection MOSFETs

A wide locking range and operation range push–push divide-by-4 injection-locked frequency divider (ILFD) is proposed in the paper and was implemented in the TSMC 0.18μm BiCMOS process. The divide-by-4 ILFD uses a cross-coupled voltage-controlled oscillator (VCO) with a parallel-tuned LC resonator for easy startup oscillation and single-ended injected dual-injection transistors. The common drain node of dual injection transistors is AC-tied to the output of a frequency doubler. At the drain-source bias of 0.8V, and at the incident power of 0dBm the operation range of the divide-by-4 is 3.23GHz, from the incident frequency 15.85 to 19.08GHz, the percentage is 18.49%. The locking range of the divide-by-4 is 1.4GHz, from the incident frequency from 17.08GHz to 19.08GHz, the percentage is 11.06%. The core power consumption is 6.53mW. The die area is 0.83×0.597mm2.

An Integrated CMOS Passive Self-Interference Mitigation Technique for FDD Radios

This paper presents an integrated passive self-interference mitigation (SIM) technique for FDD radios. A Four Port Canceller (FPC) serves a dual function as a receiver input matching network, and provides an auxiliary path from the transmitter (TX) to the receiver (RX) to perform leakage cancellation, with minimal penalty on the RX noise figure (NF), and power consumption. An example of this technique is applied to the design of a WCDMA front-end consisting of a low noise amplifier (LNA), the FPC, and an emulated power amplifier (PA) in a 40 nm, 6-metal-layer TSMC CMOS process. With proper tuning of the FPC and the use of an off-chip +30 dBm power amplifier, greater than 20 dB of TX leakage suppression is achieved over a cancellation bandwidth of 5 MHz.

Brillouin distributed temperature sensor employing phase modulation and optimization techniques

The process of signal-to-noise ratio (SNR) improvement and the suppression of stimulated Brillouin scattering (SBS) effects on a long-range distributed sensor are presented in this paper. We have proposed an improved performance Brillouin distributed temperature sensor using phase modulation and optimization techniques. Global evolutionary computing-based optimization techniques (genetic algorithm (GA), particle swarm optimization (PSO) and differential evolution algorithm (DE)) are applied for both fiber and receiver optimization. The combination of phase modulation and the global evolutionary computing technique improved the SBS threshold power of the proposed system to an extent of 5.95dBm. However, with receiver and fiber optimization, for an input power of 0dBm, the proposed system provides SNR improvement up to 3.5dB, for temperature sensing over a distance of 50km with temperature resolution of 1.44K and spatial resolution of 32m without using filter. However, for the equivalent sensing range, we have achieved a temperature resolution as 0.51K using the above optimized system with filter.

Cmos spdt switch for wlan applications

WLAN has become an essential part of our today's life. The advancement of CMOS technology let the researchers contribute low power, size and cost effective WLAN devices. This paper proposes a single pole double through transmit/receive (T/R) switch for WLAN applications in 0.13 μm CMOS technology. The proposed switch exhibit 1.36 dB insertion loss, 25.3 dB isolation and 24.3 dBm power handling capacity. Moreover, it only dissipates 786.7 nW power per cycle. The switch utilizes only transistor aspect ratio optimization and resistive body floating technique to achieve such desired performance. In this design the use of bulky inductor and capacitor is avoided to evade imposition of unwanted nonlinearities to the communication signal.

Double Brillouin frequency shifted L-band multi-wavelength Brillouin Raman fiber laser utilizing dual laser cavity

We experimentally demonstrated a multi-wavelength Brillouin Raman fiber laser with 20 GHz spacing utilizing a dual laser cavity that operated in the L-band wavelength region. In this laser configuration, 11 km long dispersion compensating fiber provided Brillouin gain medium. At Brillouin pump (BP) wavelength of 1580 nm, BP power of 7 dBm and Raman pump power of 1259 mW, 102 Brillouin stokes signals were produced over 14.3 nm of bandwidth. By adjusting appropriate BP wavelength within 1580–1600 nm a tuning range over 20 nm was obtained. In additional, average OSNR of 21.7, 17.8, 16.9, 15.5 and 16.9 dB are recorded for wavelength at 1580, 1585, 1590, 1595 and 1600 nm respectively.

High Power Latching RF MEMS Switches

Latching RF MEMS Switches of Single-Pole-Single-Throw (SPST), Single-Pole-Double-Throw (SPDT) and Single-Pole-Triple-Throw (SP3T) types are proposed. The switches are built of a 20 μm thick nickel layer covered with a plated 2 μm gold on the top and side walls of nickel layer eliminating any potential warping due to thermal mismatch. The switches are actuated using a high stroke latching thermal actuator that exhibits a 32 μm displacement with a dc power of 250 mW under ambient pressure at 25 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C (298 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> K) and 153 mW under vacuum at -193 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C (80 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> K). The measured velocity for the actuator is 2.3 μm/msec. The RF measurement of the SPST switch is done under ambient and vacuum and over a wide range of temperatures from 25 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C (298 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> K) to -193 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C (80 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> K). The switches survived a temperature cyclic test from 25 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C (298 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> K) to 85 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C (358 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> K) with a total variation of 0.2 dB in insertion loss. The switch demonstrates a worst IP3 of 60.14 dBm and high power handling capabilities that exceeds 30 Watt, only tested for an hour in 1 cycle. The RF performance of the SPST, SPDT and SP3T exhibits a worst insertion loss of 0.8 dB, 1.2 dB and 1.5 dB up to 40 GHz, 40 GHz and 18 GHz, respectively.

Wide‐band high‐efficiency Ku‐band power amplifier

A 37 dBm power amplifier (PA) is designed on a 0.25 µm optical T-gate pseudomorphic high electron mobility transistor (pHEMT) technology. The design of this two-stage PA along with a step-by-step design procedure is presented in this paper. This methodology can be used for design of PA in different technologies and frequencies. The PA delivers 5 W output power over the frequency band of 13–19 GHz. It shows average power-added efficiency of 37% and large signal gain of 15 dB in measurements which is consistent with simulation results. The output power and efficiency of the realised amplifier reach maximums of 37.6 dBm and 45%, respectively. Considering output power, bandwidth, chip area and efficiency, this PA exhibits competitive performance compared to the reported PAs.

Quantum key distribution for 10 Gb/s dense wavelength division multiplexing networks

We demonstrate quantum key distribution (QKD) with bidirectional 10 Gb/s classical data channels in a single fiber using dense wavelength division multiplexing. Record secure key rates of 2.38 Mbps and fiber distances up to 70 km are achieved. Data channels are simultaneously monitored for error-free operation. The robustness of QKD is further demonstrated with a secure key rate of 445 kbps over 25 km, obtained in the presence of data lasers launching conventional 0 dBm power. We discuss the fundamental limit for the QKD performance in the multiplexing environment.

A Q-BAND FREQUENCY SYNTHESIZER IN 0.13 μM SIGE BICMOS

In this paper, a 42GHz frequency synthesizer fabricated with 0.13m SiGe BiCMOS technology is presented, which consists of an integer-N fourth-order type-II phase locked loop (PLL) with a LC tank VCO and a frequency doubler. The core PLL has three-stage current mode logic (CML) and flve stage true single phase clock (TSPC) logic in the frequency divider. Meanwhile, a novel balanced common-base structure is used in the frequency doubler design to widen the bandwidth and improve the fundamental rejection. The doubler shows a 41% fractional 3dB bandwidths with a fundamental rejection better than 25.7dB. The synthesizer has a maximum output power of 0dBm with a DC power consumption of 60mW. The worst phase noise at 100kHz, 1MHz and 10MHz ofiset frequencies from the carrier is i71dBc/Hz, i83dBc/Hz and i102:4dBc/Hz, respectively.

Effectiveness of External Noise Jamming in Missile Borne Monopulse Radar Receivers

 Abstract—This paper describes the external noise jamming of monopulse radar receiver when White Gaussian Noise (WGN) and Phase Noise (PN) signals are injected into the receiver. Initially, it is assumed that the receiver is locked onto the desired radar echo signal frequency in the presence of external noise signal as the noise power is too less to break the frequency lock of the receiver. It is shown that the Gaussian noise power required for jamming the receiver depends upon how the power is interpreted. In this paper, the Gaussian noise power is interpreted in symbol rate bandwidth, sampling frequency bandwidth, in single-sided and double-sided power spectral density. In the case of phase noise jamming, the phase noise mask (dBc/Hz) required for break-lock in the receiver is studied. It is verified that phase noise power required for jamming the receiver is less when frequency offset from the radar echo signal is large. The simulation result shows that phase noise mask of -72 is required when the frequency offset from the echo signal is 10 MHz. The effectiveness of external noise jamming is carried out through computer simulation using AWR (Visual System Simulator) software. interference as in case of denial jamming. In principle, the optimal jamming signal has the characteristics of receiver noise; in practice this may be difficult to achieve (4). In this paper, noise jamming of missile borne monopulse radar receiver with external White Gaussian Noise (WGN) and Phase Noise (PN) signal is analyzed. For significant effectiveness of the noise jamming, WGN is chosen ideally because of maximum entropy, or uncertainty of any random waveform for a specific average power. For our simulation, a monopulse radar receiver with third order loop is designed with a typical loop bandwidth of 1 MHz. The receiver operates on unmodulated sinusoidal radar echo signal of 10 dbm power. The radar echo after down converted to an intermediate frequency of 30 MHz is injected into the receiver loop along with the WGN signal and the noise power required for break-lock in the receiver is reported. It is seen that the Gaussian noise power required for break-lock in the receiver depends upon how the power is interpreted. In this context, the noise power is interpreted in symbol rate bandwidth, sampling frequency bandwidth, and in single-sided and double-sided power spectral density which are discussed in detail in the subsequent section. In another case, phase noise is generated by passing WGN through an FIR filter. This is added to the phase of the radar echo signal to simulate the phase noise which is specified through phase noise mask consisting of frequency and dBc/Hz values and the phase noise mask required for break-lock in the receiver is presented. It is seen that phase noise power required for break-lock depends upon how the phase noise is simulated and the frequency offset from the radar echo signal.

A compact, 36 to 72 GHz 15.8 dBm power amplifier with 66.7% fractional bandwidth in 45 nm SOI CMOS

ABSTRACTA 36 to 72 GHz wideband power amplifier (PA) in 45‐nm silicon‐on‐insulator CMOS is presented. The PA adopts a two‐stage cascode topology, in which counterposed resonances in the matching networks enable a 3‐dB output power bandwidth of 36 GHz. This bandwidth represents a 66.7% fractional bandwidth—a 1.8X improvement over previously reported CMOS V‐band PAs. At 62 GHz, the PA achieves a peak output power of 15.8 dBm, a gain of 16.9 dB, and 9.4% power‐added efficiency using a 2.2‐V supply. The PA has the largest output power and smallest die area among reported wideband (BW &gt; 30%) millimeter‐wave PAs in CMOS. © 2014 Wiley Periodicals, Inc. Microwave Opt Technol Lett 56:166–169, 2014

Low threshold multiwavelength Brillouin–erbium fiber laser generation in conjunction with a photonic crystal fiber

We propose and demonstrate the most compact low threshold multiwavelength Brillouin–erbium fiber laser (MBEFL) incorporating a 100-m long photonic crystal fiber (PCF) as a Brillouin gain medium. This optimized configuration with a simple ring cavity makes it possible for the first time to achieve more than 22 Brillouin Stokes waves with a line spacing of 0.08 nm (∼10 GHz) and more than −20 dBm power in conjunction with a 100-m long PCF. Using a pre-amplified Brillouin power approach in a ring cavity realizes a low threshold multiwavelength laser with a Brillouin pump power of around 8 dBm at an injected 980 nm pump power of 125 mW. Anti-Stokes lines are also obtained due to four-wave mixing and bidirectional operation.

20 GHz spacing multi-wavelength generation of Brillouin-Raman fiber laser in a hybrid linear cavity

We demonstrate a tunable multi-wavelength Brillouin-Raman fiber laser with 20 GHz wavelength spacing. The setup is arranged in a linear cavity by employing 7.2 and 11 km dispersion compensating fibers (DCF) in addition to a 30 cm Bismuth-oxide erbium doped fiber. In this experiment, for the purpose of increasing the Stokes lines, it is necessary to optimize Raman pump power and Brillouin pump power together with its corresponding wavelengths. At the specific Brillouin pump wavelength, it is found that the longer length of 11 km DCF with optimized parameters results in larger number of Stokes combs and optical signal to noise ratios (OSNRs). In this case, a total of 195 Brillouin Stokes combs are produced across 28 nm bandwidth at Brillouin pump power of -2 dBm and Raman pump power of 1000 mW. In addition, all Brillouin Stokes signals exhibit an average OSNR of 26 dB.

A 1–6 GHz analog radio frequency power driver in 90 nm complementary metal‐oxide semiconductor technology for wireless applications

SummaryOne of the most challenging subsystems for integrated radio frequency (RF) complementary metal‐oxide semiconductor (CMOS) solutions is the power amplifier. A 1–6 GHz RF power driver (RFPD) in 90 nm CMOS technology is presented, which receives signals from on‐chip RF signal chain components at −12 dBm power levels and produces a 0 dBm signal to on‐chip or off‐chip 50 Ω loads. A unique unit cell design is developed for the RFPD to offset issues associated with very wide multi‐fingered transistors. The RF driver was fabricated as a stand‐alone sub‐circuit on a 90 nm CMOS die with other sub‐circuits. Experimental tests confirmed that the on‐chip RFPD operates up to 6 GHz and is able to drive 50 Ω loads to the desired 0 dBm power level. Spur free dynamic range exceeded 70 dB. The measured power gain was 11.6 dB at 3 GHz. The measured 1 dB compression point and input third‐order intercept point (IIP3) were −4.7 dBm and −0.5 dBm, respectively. Also, included are modeling, simulation, and measured results addressing issues associated with interfacing the die to a package with pinouts and the package to a printed circuit test fixture. The simulations were made through direct current (DC), alternating current (AC), and transient analysis with Cadence Analog Design Environment. The stability was also verified on the basis of phase margin simulations from extracted circuit net‐lists. Copyright © 2013 John Wiley &amp; Sons, Ltd.

A Reconfigurable FM-UWB Transceiver for Short-Range Wireless Communications

A 3.7-4.3 GHz frequency modulated ultra wideband (FM-UWB) transceiver with digitally reconfigurable subcarrier modulation index, UWB bandwidth and RF frequency band is fabricated in 0.18 μm CMOS. Considering short-range low-data-rate applications for wireless body area networks, RF front ends, consisting of an output amplifier with -14 dBm power level, an FM demodulator with -35 dBm sensitivity, and a preamplifier with 25 dB gain, 6 dB noise figure, are designed. The presented implementation including UWB bowtie antennas achieves a bit error rate (BER) of 10-6 at a data rate of 12.5 kb/s with a wireless communication distance of 60 cm and the power dissipation of 21 mW.

A lower power reconfigurable multi-band transceiver for short-range communication

A reconfigurable multi-mode multi-band transceiver for low power short-range wireless communication applications is presented. Its low intermediate frequency (IF) receiver with 3 MHz IF carrier frequency and the direct-conversion transmitter support reconfigurable signal bandwidths from 250 kHz to 2 MHz and support a highest data rate of 3 Mbps for MSK modulation. An integrated multi-band PLL frequency synthesizer is utilized to provide the quadrature LO signals from about 300 MHz to 1 GHz for the transceiver multi-band application. The transceiver has been implemented in a 0.18 μm CMOS process. The measurement results at the maximum gain mode show that the receiver achieves a noise figure (NF) of 4.9/5.5 dB and an input 3rd order intermodulation point (IIP3) of −19.6/−18.2 dBm in 400/900 MHz band. The transmitter working in 400/900 MHz band can deliver 10.2/7.3 dBm power to a 50 Ω load. The transceiver consumes 32.9/35.6 mW in receive mode and 47.4/50.1 mW in transmit mode in 400/900 MHz band, respectively.

Modeling and Reliability Analysis of TSVs for High Frequency Applications

This paper presents electrical modeling of thermo-mechanical delamination in TSV. Previously, several papers in electrical modeling of TSV have been published in open literature; however, these do not consider the thermal-mechanical delamination in TSV. Stress-induced thermo-mechanical delamination in TSV has been analyzed by considering the thermo-mechanical stress loading effects of high aspect ratio copper electroplated TSVs. Two-dimensional mechanical finite element models have been built to analyze the stress distribution in TSV structures. The mechanical models and energy release rate at the crack are then translated to electrical defect models to evaluate the functional electrical performance of TSVs with delaminations. Simulation was performed on 7 μm by 60 μm TSVs using an RF signal with −10 dBm power on a crack length of 0.2 um and width of 0.15 um. We observed output power of −11.8 dB at a frequency of 77 GHz. When the crack length was increased, the output power decreased to −11.2 dBm due to increased parasitics resulting in more attenuation of RF output. This reliability analysis enables us to evaluate the electrical performance of TSVs for high frequency applications.