A Q-BAND FREQUENCY SYNTHESIZER IN 0.13 μM SIGE BICMOS

Abstract

In this paper, a 42GHz frequency synthesizer fabricated with 0.13m SiGe BiCMOS technology is presented, which consists of an integer-N fourth-order type-II phase locked loop (PLL) with a LC tank VCO and a frequency doubler. The core PLL has three-stage current mode logic (CML) and flve stage true single phase clock (TSPC) logic in the frequency divider. Meanwhile, a novel balanced common-base structure is used in the frequency doubler design to widen the bandwidth and improve the fundamental rejection. The doubler shows a 41% fractional 3dB bandwidths with a fundamental rejection better than 25.7dB. The synthesizer has a maximum output power of 0dBm with a DC power consumption of 60mW. The worst phase noise at 100kHz, 1MHz and 10MHz ofiset frequencies from the carrier is i71dBc/Hz, i83dBc/Hz and i102:4dBc/Hz, respectively.