Power Module Applications Research Articles

Self-assembled layer as an effective way to block copper diffusion into epoxy

The reliability of copper/epoxy bonding is important for power semiconductors. It has been found that copper can diffuse into epoxy and accelerate epoxy decomposition at high temperatures, deteriorating reliability. We proposed a way to inhibit copper diffusion into epoxy by using self-assembled layers. Copper substrates with self-assembled layers on their surface were encapsulated with epoxy and placed at 200 °C for 1000 h. The diffusion of copper into epoxy was evaluated by XPS depth profiling, and the decomposition of epoxy was evaluated by ATR-FTIR. The results showed that self-assembled layers can effectively hinder copper diffusion into epoxy. The possible reason is that the existence of the self-assembled layer greatly reduces the formation of copper ions. Also, we found that the self-assembled layer survived the heating, implying its potential for practical power module applications.

Optimization of TLPS Bonding Process and Joint Property using Ni-Sn Paste for High Temperature Power Module Applications

Recently, as interest in eco-friendly vehicles such as electric and hybrid vehicles increases, the demand for power semiconductors, a key component, is also increasing. Power semiconductors convert, distribute, and control power and operate in harsh environments such as high temperature and high pressure. In order to ensure stable reliability in such harsh environments, research on a technology that can stably form joints even at high temperatures is essential. Transitional liquid phase (TLP) bonding was proposed as a high-temperature power semiconductor chip bonding technology, which has the advantage of forming an intermetallic compound (IMC) phase with a high melting point at the joint. However, it takes a long time to convert the joint into full IMC phase. Therefore, in this study, in order to shorten the process time, a paste was manufactured by mixing high-melting point Ni metal powder and low-melting point Sn metal power, and a joint was formed through a TLPS (Transition liquid phase sintering) bonding using the paste. Pastes of different compositions were prepared by adjusting the ratio of Ni and Sn powders. The chip and substrate were bonded through a thermocompression (TC) bonding process, and the highest shear strength was obtained at a bonding temperature of 250 ℃ for 10 min. Heat treatment was performed at 200 ℃ for up to 500 h to evaluate the high temperature long-term reliability of the joints. The Ni-Sn TLPS bonded joints remained reliable joints after a long-term aging test at a high temperature of 200 ℃.

Copper to resin adhesion characterization for power electronics application: Fracture toughness and cohesive zone analysis

The use of molding compound as encapsulant is nowadays increasing in semiconductor power module applications. The adhesion of package interfaces between copper components and molding compound is one of the key aspect for an improved durability. The presented activity proposes the fracture toughness characterization of copper–resin interface in a power semiconductor package due to different experimental tests and the cohesive zone method to describe interfacial fracture. Double Cantilever Beam (DCB) and Four Point Bending (FPB) tests have been executed on dedicated bi-material coupons. The scope of these trials has been to enhance two different propagation modes based on different ratio between mode-I (opening) and mode-II (sliding) according to a mixed-mode approach. Strain energy release rate (SERR) and mode-mixity have been estimated by a finite element analysis based on the virtual crack closure technique (VCCT) and the crack surface displacement method (CSD). The information about fracture toughness at two different mode mixity have been considered to predict the SERR for every arbitrary mode mixity. Finally, dedicated finite element models based on cohesive elements have been developed and calibrated considering the fracture toughness experimental values and the measured force–displacements behavior during the two considered tests. Dedicated physical analyses have been carried out to validate the proposed method.

Metallurgically and mechanically reliable microsilver-sintered joints for automotive power module applications

Metallurgically and mechanically reliable microsilver-sintered joints for automotive power module applications

Transient Liquid Phase Sinter Bonding with Tin-Nickel Micro-sized Powders for EV Power Module Applications

Transient Liquid Phase Sinter Bonding with Tin-Nickel Micro-sized Powders for EV Power Module Applications

An empirical model for thermal interface materials based on experimental characterizations under realistic conditions

Thermal interface materials (TIMs) contribute to a considerable part of thermal resistance from junction to ambient in power modules, which is an important design variable affecting the thermal loading and reliability performance. Nevertheless, the existing standard characterization methods for TIMs may not represent the realistic conditions in power module applications. Physical thermal models for TIMs are of high complexity, which is not always convenient enough to apply in engineering design. This paper proposes an empirical model for TIMs based on physical understandings and experimental characterizations under more realistic conditions. The proposed model includes two variables only, the initial thickness and screw torque. It retains the advantages in terms of accuracy and convenience in use. A realistic power electronic converter based experimental platform has been built and comprehensive experimental results have been conducted on a 1200 V/50 A IGBT module.

Characterization of Ultra-Thin Epoxy-Resin Based Dielectric Substrate for Flexible Power Electronics Applications

Abstract Available substrate materials for power module applications has been investigated for a long time. Though Direct Bonded Copper (DBC) substrates, nowadays, have been widely applied in power electronics applications, especially power modules, due to its superior performance in mechanical ruggedness, thermal conductivity, and isolation capability. Its cost and complicated requirements during fabrication processes are always concerns in industries. At the same time, flexible electronics has become a rapidly expanding area with commercial applications including displays, medical, automotive, sensors arrays, wearable electronics, etc. This paper will initiate an investigation on a dielectric material that has potential in high power wearable electronics applications. A recently developed ultra-thin Epoxy-Resin Based Dielectric (ERBD) substrate material which is suitable for power electronic applications, is introduced. The ERBD can be fabricated with thickness as low as 80μm, with more than 5kV DC isolation capability. Its thermal conductivity is 8W/mK, higher than similar product currently available in the market. ERBD is also able to be bonded with Cu plates on both sides. In this paper, the properties of ERBD are investigated. Scanning Electron Microscope (SEM) is applied to analyze the microstructure of ERBD, and its bonding interface with Cu plates. 3-omega and Transient Thermal Reflectance methods are employed to precisely measure the thermal conductivity. Dielectric constant and loss are measured at different frequency. Simulations are applied to correct the error from the fringing effect during the measurement. The leakage current of ERBD is also measured under different voltage and temperature with DC and AC condition. Reliability tests are conducted to examine the electrical isolation and shearing strength of ERBD. The suitability of ERBD for potential flexible power electronics application is discussed based on the results from investigation of properties of the dielectric.

Interfacial reactions and mechanical strength of Sn-3.0Ag-0.5Cu/Ni/Cu and Au-20Sn/Ni/Cu solder joints for power electronics applications

The mechanical strength of Sn-3.0Ag-0.5Cu (SAC305) and Au-20Sn solder joints and their interfacial reaction with a Ni-plated ceramic substrate were evaluated to assess their suitability for use as die attach materials in power module applications. The compatibility between the two solder alloys and the Ni substrate was assessed during isothermal long-term aging, while the mechanical strength of the two solder joints was measured by die shear testing. A higher intermetallic compound (IMC) growth rate and Ni consumption rate was observed in the SAC305 solder joint, with the formation of a thick IMC layer and weak interface resulting in brittle fracture. The Au-20Sn solder joint, on the other hand was found to exhibit superior high temperature interfacial stability and joint strength.

Investigation of the Direct Plating Copper (DPC) on Al2O3, BeO or AlN Ceramic Substrates for High Power Density Applications

Abstract In the high power module applications, the power increasing and the size shrinking becomes one of the major topics for the power module design. Due to both the power increasing and the size decreasing, the power density of the device will be much increased. Therefore, not only the thermal conductivity and stability of the substrate material but the long-term material reliability of the substrate have to be seriously considered. For these reasons, the ceramic PCB becomes one of the best solutions. The ceramic substrates now used are normally based on Ag-printed or direct bonding copper (DBC) technology. In the case of the Ag-printed ceramic substrate, the pattern resolution and metallization thickness are limited by the Ag-printed process. Also the combination strength of the silver and ceramic substrate by glass (which is normally mixed in the silver paste) is normally not good enough. A thermal dissipation barrier will then be formed between silver and ceramic substrate due to the poor thermal conductivity of the glass material. For the DBC ceramic substrate, DBC substrates are manufactured at 1065°C by the diffusion between ceramic and Cu/CuO layer. A thicker Cu layer thickness of normally more than 300 um is required in the thermal compressing bonding process. The Cu pattern resolution will then be limited by the thickness of the Cu layer. However, the about 5~10% of the voids exist randomly between ceramic and Cu layer is the other major issue. The resolution issues of the Ag-printed and DBC ceramic substrates make the limitation for the device density design (fine line/width and flip-chip device design become very difficult). The glass material in the Ag printed ceramic substrate and the 5~10% voids existence in DBC ceramic substrate may cause the reliability issue operating at a high power density applications. For high power density module applications, we introduce the DPC technology on the ceramic substrate. In DPC ceramic substrate system, the sputtered Ti is used as the combination material between Cu and ceramic substrate. And the first copper is then sputtered on the top of Ti layer as seed-layer for the following Cu electrode plating (second cupper layer). By the material and the sputtering process control, several ceramic substrate raw materials can be used, such as Al2O3, AlN, BeO, Si3N4 and so on. The Ti combined/buffer layer provides good adhesion strength and material stability. The second copper layer is plated by electrode casting plating to 3 to 5 oz. (100~150um) in thickness. The key technology of the metal trace plating is the material control of the sputter layers and the second copper layer stress release during plating. In the DPC system, the double layers design is available. The laser drilled via holes on the various ceramic substrates is introduced. The conducting of the front and back side is connected by the following plating process. The key technology of this process is the stability of the via-holes. We have to make sure the via-holes cleaning, impurity removing and material stability during high temperature laser drilled is well controlled. DPC ceramic substrates provide a better metal/ceramic interface uniformity and material reliability due to the stable Ti combination material and much less voids in the metal/ceramic interface. Also, the DPC ceramic substrates provide a gold pattern resolution of 50 um line space with tight tolerance of 20 um min. We believe the material characteristic make DPC a very suitable substrate material for high power module applications.

Experimental Investigation of Broadband Vaned Helix Traveling-Wave Tube

A broadband helical traveling-wave-tube (TWT) amplifier for microwave power module (MPM) applications is designed using high frequency structure simulation (HFSS) and LMsuite code. The LMsuite, which is a one-dimensional nonlinear code, was utilized to predict the nonlinear, large-signal performance of the helical TWT. Simulations predict that an output power of 22.6 W is produced when an input power of 63.1 mW is injected at 10 GHz, corresponding to a saturated gain of 25.5 dB. The saturated bandwidth is predicted to be 6–17 GHz. Experiments on a fabricated TWT show that an output power of 18.7 W is produced when an input power of 42.6 mW is injected at 10 GHz, corresponding to a saturated gain of 26.4 dB. The saturated bandwidth is measured to be 6–16 GHz. AM/PM distortion is up to 6°/dB at a drive level 6 dB below the saturation input power. The third-order intermodulation distortion (IMD) ratio is -19 dBc at a 10 dB backoff from the P1 dB point when two-tone signals of 12 and 12.005 GHz are injected at equal amplitude.

Integrated Flip-Chip Flex-Circuit Packaging for Power Electronics Applications

A novel flip-chip flex-circuit packaging platform is described that enables integration of multiple power dies and control circuitry with an advantageous form factor. A key attribute of this packaging platform is to extend the well-established flex-circuit and flip-chip soldering technologies in signal electronics to power electronics applications. The planar interconnection and flip-chip method facilitate multilayer packaging structure with reduced packaging dimensions and reduced packaging parasitics. A half-bridge test vehicle designed and fabricated for DC/AC inverter applications (42 V, 16 A) with an overall flex-circuit module footprint less than 30% that of a discrete device printed circuit board implementation has been modeled and demonstrated experimentally. Electrical results, confirmed with circuit simulation incorporating parasitic inductance electromagnetic modeling, have shown a turn-off voltage overshoot reduction of over 40% and a switching energy loss reduction of 24% with the flip-chip flex-circuit implementation. The power flex platform has a strong potential for integrated multichip power module applications that require minimized packaging size and parasitic inductance for high switching frequency and efficiency.