Degradation induced by the negative bias temperature instability (NBTI) can be attributed to three mutually uncoupled physical mechanisms, i.e., the generation of interface traps (ΔV IT), hole trapping in pre-existing gate oxide defects (ΔV HT), and the generation of gate oxide defects (ΔV OT). In this work, the characteristic of NBTI for p-type MOSFET fabricated by using a 28-nm high-k metal gate (HKMG) process is thoroughly studied. The experimental results show that the degradation is enhanced at a larger stress bias and higher temperature. The effects of the three underlying subcomponents are evaluated by using the comprehensive models. It is found that the generation of interface traps dominates the NBTI degradation during long-time NBTI stress. Moreover, the NBTI parameters of the power-law time exponent and temperature activation energy as well as the gate oxide field acceleration are extracted. The dependence of operating lifetime on stress bias and temperature is also discussed. It is observed that NBTI lifetime significantly decreases as the stress increases. Furthermore, the decrease of charges related to interface traps and hole detrapping in pre-existing gate oxide defects are used to explain the recovery mechanism after stress.
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