Silicon carbide (SiC) has received increasing attention in the field of high temperature and high power electronics. One of major concerns in the fabrication of SiC MOSFETs is a large density of electrically active defects in SiC and near the SiO2/SiC interface which deteriorate device performance and its reliability. So far, it has been reported that thermal oxidation of SiC causes residual C incorporation in SiO2 network near the SiO2/SiC interface as a result of incomplete out-diffusion of COx molecular units [1]. Such excess C including carbon clusters and Si/C dangling bonds in the region near the interface have often been discussed as a possible cause of the interface traps [2, 3]. In this work, depth analysis of thermally grown SiO2/4H-SiC structure has been conducted systematically by high resolution x-ray photoelectron spectroscopy (XPS) and total photoelectron yield spectroscopy (PYS) to gain a better understanding of the energy band diagram and the energy distributions of the electronic defects.After wet-chemical cleaning of n-type Si-face 4H-SiC(0001) surface, SiO2 layers were grown by wet oxidation at 1080 ºC. To investigate the energy band alignment, XPS measurements were performed utilizing monochromatized AlKα radiation. PYS analysis was also carried out in the photon energy range from 3.4 to 5.6 eV to evaluate the energy distribution of the filled defect states [4]. Figure 1 shows energy loss spectra of O1s photoelectrons taken for 3.4 and 21.8 nm-thick SiO2/4H-SiC. From the onset of the energy loss signals [5], the Eg value of SiO2 in the thickness range from 3.4 to 21.8 nm on 4H-SiC was determined to be 8.9 ± 0.1 eV, which is quite consistent with the Eg value of SiO2 on Si. On the other hands, O 1s energy loss signals for SiO2/4H-SiC show an increase in small loss signals at about 7 eV from the zero-loss energy position by x-ray irradiation over 8 hours (data not shown), which imply the defect generation. Valence band (VB) offset (ΔEV) between SiO2 and 4H-SiC was evaluated from VB spectra as shown in Fig. 2. Measured VB spectrum of 3.4 nm-thick SiO2/4H-SiC was deconvoluted into two components due to the SiO2 and 4H-SiC substrate by using the reference spectrum of 21.8 nm-thick SiO2/4H-SiC. ΔEV at SiO2/4H-SiC interface was evaluated to be ~2.75 eV. Based on the measured values of Eg of SiO2 and ΔEV, the energy band diagram of SiO2/4H-SiC is drawn as shown in Fig. 3 in consideration of the known values of Eg and electron affinity of 4H-SiC [5, 6]. Thus, the conduction band offset (ΔEC) between SiO2 and 4H-SiC was found to be 2.92 eV. In the PYS measurements, the photoelectron yields from the samples were measured as a function of photon energy in the range from 3.4 to 5.6 eV. In Fig. 4, the EC denotes the 4H-SiC conduction band bottom measured from the vacuum level. From the energy band diagram of SiO2/4H-SiC (Fig. 3), the valence electrons in SiO2 and 4H-SiC cannot be emitted out by the irradiation of photons in this energy region. Therefore, the observed yields from the samples were attributable to the emission from the filled defect states distributed in the SiO2 and at the SiO2/4H-SiC interface. Notice that the yield due to the defect states in the photon energy region around 4 eV from the vacuum level was increased with a decrease in the SiO2 thickness, which indicates the formation of the filled defects in the region near the SiO2/4H-SiC interface. To get a clear insight into the depth profiles of the defects, PYS measurements were conducted repeatedly at each step of SiO2 thinning by dipping in a dilute HF solution. PYS analysis of 21.8 nm-thick SiO2/4H-SiC structure also shows that filled defects located in the energy region near the conduction band bottom of 4H-SiC becomes its maximum as the remained SiO2 thickness is around 2-3 nm. Acknowledgements: This work was supported in part by Grant-in Aids for Young Scientists (A) No. 15H05520 from the Ministry of Education, Culture, Sports, Science and Technology, Japan and by JSPS Core-to-Core Program of International Collaborative Research Center on Atomically Controlled Processing for Ultralarge Scale Integration. References 1) V.V. Afanas’ev, et. al, Appl. Phys. Lett., 68 (1996) 2141. 2) J. L. Cantin, et. al., Phys. Rev. Lett., 92 (2004) 015502. 3) S. Wang, et. al., Phys. Rev. Lett., 98 (2007) 026101. 4) S. Miyazaki, et. al., Microelec. Eng., 48 (1999) 63. 5) L. Patrick, et. al., Phys. Rev., 137 (1965) A1515. 6) J. Robertson, J. Vac. Sci. Technol. A, 31 (2013) 050821. Figure 1
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