Power Amplifier Prototype Research Articles

A V-Band Wideband Power Amplifier with High Gain in a 130 nm SiGe BiCMOS Process.

This paper introduces a high-gain wideband power amplifier (PA) designed for V-band applications, operating across 52 to 65 GHz. The proposed PA design employs a combination of techniques, including pole-gain distribution, base-capacitive peaking, and the parallel configuration of multiple small-sized transistors. These strategies enable significant bandwidth extension while maintaining high gain, substantial output power, and a compact footprint. A two-stage PA using the combination technique was developed and fabricated in a 130 nm SiGe BiCMOS process. The PA prototype achieved a peak gain of 27.3 dB at 64 GHz, with a 3 dB bandwidth exceeding 13 GHz and a fractional bandwidth greater than 22.2%. It delivered a maximum saturated output power of 19.7 dBm and an output 1 dB compression point of 18 dBm. Moreover, the PA chip occupied a total silicon area of 0.57 mm2, including all testing pads with a compact core size of 0.198 mm2.

Dual-mode dual-band symmetrical Doherty power amplifier employing reciprocal gate bias for high-efficiency range enhancement

This article presents an in-depth exploration of the circuit architecture and design approach for broadening the high-efficiency range of dual-mode symmetrical Doherty power amplifiers (DPAs). To enhance performance across a broader spectrum, a modified dual-mode load modulation network (LMN) is introduced, leveraging the reciprocal gate bias configuration to support an expanded high-efficiency range exceeding 6 dB across two distinct operational bands. To corroborate the efficacy of our proposed dual-mode symmetrical DPA architecture, we designed and constructed a prototype power amplifier (PA) utilizing commercially available GaN transistors. The implemented PA demonstrates exceptional performance, achieving two distinct Doherty operation bands, specifically 1.85–2.0 GHz in Mode I and 1.5–1.55 GHz in Mode II. Remarkably, the high-efficiency range is extended to 8 dB in both bands. Furthermore, the drain efficiency achieves levels of 48.5%–51.8% in Mode I and 47.7%–50.4% in Mode II at 8 dB back-off, with a saturated output power exceeding 43 dBm.

A Terahertz GaN solid‐state power amplifier on radial combining technique

AbstractTerahertz (THz) bands are considered to have various anticipated applications. Output power is an important factor determining the operating distance of THz systems, but it is very challenging to achieve high output power under current solid‐state terahertz circuit technology. The paper first presents a four‐way G‐band radial combiner, which features high passive efficiency of 88% and compact size. Moreover, based on this radial combiner and in‐house fabricated gallium nitride chips, a solid‐state power amplifier prototype is further demonstrated. Measured results show that, the average saturated output power is 21.7 dBm across the 180–240 GHz band with a typical output power of 23.2 dBm at 189 GHz.

Design and Optimization of a Highly Linear Power Amplifier with Novel Active Bias Circuit in InGaP/GaAs HBT MMIC Technology

This paper introduces a highly linear power amplifier (PA) that utilizes a 2-μm InGaP/GaAs hetero-junction bipolar transistor (HBT) process. As communication systems evolve in complexity, the demands for the linearity and static power consumption of HBT power amplifiers are becoming more stringent. Typically, there exists a trade-off relationship between linearity and static power consumption in the design process. Hence, this paper proposes a novel active bias circuit for HBT power amplifiers, along with its layout design. The proposed active bias circuit consists of a differential pair and a current mirror structure, designed to enhance PA linearity while maintaining low quiescent current. Additionally, a novel layout structure is implemented to achieve thermal coupling between the RF transistors and the active bias, further improving PA linearity. As a result of the implementation of the proposed active bias and layout structure, the PA demonstrates high linearity in both amplitude modulation to phase modulation (AM/PM) and amplitude modulation to amplitude modulation (AM/AM) performance, while simultaneously maintaining a low quiescent current. The three-stage PA prototype achieves notable performance metrics, including a peak gain of 32.6 dB at 5.6 GHz, gain flatness of ±0.5 dB from 5.15 GHz to 5.85 GHz, and P1dB of 32.1 dBm at a quiescent emitter current of 180 mA.

Design Procedure for a High-Efficiency Class-E/F3 Power Amplifier

The switch voltage stress in a Class-E power amplifier (PA) is larger than that in any other switching PAs. A series resonant filter is added across the switch to filter out the third harmonic of the switch voltage and reduce the switch voltage stress. The new circuit is usually called a Class-E/F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> PA. The output power, the efficiency, and the component values of a Class-E/F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> PA can be <bold xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sensiti</b> ve to the design of the harmonic filter. In this article, we perform a sensitivity analysis on Class-E/F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> PA and provide guideline to design a Class-E/F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> PA which is robust against variations in the harmonic filter components. We also provide new design equations to calculate the component values. To validate the proposed design guidelines and equations, a prototype circuit was designed and implemented. At <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> = 4.5 V, the measured output power, the efficiency, and the switching frequency of the prototype PA were 0.96 W, 94.2%, and 800 kHz, respectively.

High-Efficiency GaN-Based Power Amplifiers for Envelope Nonlinearities’ Mitigation in VHF Wideband Polar-Mode Transmitters

Space-based communications at the very high frequency (VHF) band for air traffic management is a new technology application under development that requires energy-efficient architectures to mitigate the power limitations of satellite platforms. The usage of high-efficiency radiofrequency (RF) transmitters can help reduce the power consumption, but nonlinearities concerning the amplified signal in wide fractional bandwidth systems are a problem to solve. This paper proposes a high-efficiency (RF) power amplifier (PA) for satellite communications at the VHF band that aims to reduce the envelope distortion inherent to wide fractional bandwidth multicarrier polar-mode transmitters. Its design is based on a solution called hybrid-coupled switching voltage PA in combination with gallium nitride (GaN) high electron mobility transistor (HEMT) technology. The developed VHF PA prototype delivers up to 95 W from a 28 V power supply, with a drain efficiency about 80% within the 118 MHz to 138 MHz operating band. To test its linearity performance, operating in a polar-mode configuration, a GaN-based wideband envelope amplifier (EA) has been developed to modulate the RF PA supply port. This EA improves its power efficiency by combining it with a slow envelope power supply (SEPS). Some measurements have been taken for a 100 W peak envelope power (PEP) and 10 MHz (maximum carrier spacing) four-tone digitally-modulated test signal, where any distortion product is attenuated 46 dB below the average power of the amplified signal without applying any digital predistortion (DPD) technique.

Cavitation Detection in a Tonpilz-Type Transducer for Active SONAR Transmission System

The active sound navigation and ranging (SONAR) transmission system emits acoustic pulses underwater using a wave generator, a SONAR power amplifier (SPA), and a projector. The acoustic pulse travel in the direction of the target and return as an echo to a hydrophone to learn the range or speed of the object. Often the same device is used as a hydrophone and a projector; in this context, it is known as a transducer. In order to obtain a maximum range of detection in the SONAR, it is desirable to generate the maximum amount of acoustic power until the point in which the echo can be detectable in an atmosphere with non-wished noise. Therefore, a high value of source level (SL) is required that depends largely on the value of electrical power applied to the transducer (Pe). However, when trying to obtain the maximum range of detection in the SONAR system there are the following three peculiar limitations that affect performance: The cavitation, the reverberation, and the effect of interaction in the near field. In this paper, an experimental measurement methodology is presented to detect the cavitation effects in a tonpilz-type transducer for an active SONAR transmission system using a transducer as a projector and a calibrated hydrophone in a hydroacoustic tank by measuring the parameters of total harmonic distortion of the fundamental waveform (THD-F) of the generated acoustic pulse, transmitting voltage response (TVR) to characterize the system and sound pressure level (SPL) that indicates the intensity of sound at a given distance. Whereas the reverberation and the interaction effect in the near field are objects of other study cases. A 570.21 W and THD-F &lt; 5% switched-mode power amplifier (SMPA) prototype was developed to excite the electroacoustic transducer employing a full-bridge inverter (FBI) topology and a digital controller using a field-programmable gate array (FPGA) for unipolar sine pulse width modulation (SPWM) to generate a continuous wave (CW) acoustic pulse at a frequency 11.6 kHz. The results obtained show that from the level of Pe=196.05 W with the transducer at 1 m of depth, the value of THD-F increases significantly while the behavior of the TVR and SPL parameters is affected since it is not as expected and is attributed when cavitation occurs.

A Millimeter-Wave Three-Way Doherty Power Amplifier for 5G NR OFDM

This article presents a millimeter-wave (mmWave) three-way Doherty output network and its silicon implementation at 38 GHz for 5G new radio (NR) orthogonal frequency-division multiplexing (OFDM). The proposed network synthesis methodology can realize impedance levels that are close to the ideal three-way Doherty operation, reduce the impedance transformation ratio at back-off, and directly absorb the device’s parasitic capacitance. Its design procedure and tradeoffs are discussed in detail. A 38-GHz power amplifier (PA) prototype is implemented in the GlobalFoundries 45-nm CMOS SOI process, achieving 13.7%/11.0% power-added efficiency (PAE) at the 9.5-/11.5-dB back-off, which is among the highest compared with recently reported silicon PAs operating at 35 GHz and above. Tested under 1-and 2-component carrier (CC) 5G NR FR2 64-QAM OFDM signals in the Band n260, the PA demonstrates state-of-the-art average output power (11.3 dBm) and average efficiency (14.7%) with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 25-dB error vector magnitude (EVM). The design robustness and reliability are further demonstrated through the testing of multiple samples and PA lifetime.

A 124-to-152-GHz Power Amplifier Exploiting Chebyshev-Type Two-Section Wideband and Low-Loss Power-Combining Technique in 28-nm CMOS

This article presents a high-power wideband power amplifier (PA) with a four-way power-combining technique for <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$D$</tex-math> </inline-formula> -band high-resolution radar. The power combiner is based on a two-section Chebyshev impedance converter to achieve a large bandwidth (BW) and is realized with slow wave coplanar waveguides (S-CPWs) to reduce the insertion loss and chip area. Therefore, our developed technique can provide broadband and low-loss power-combining scheme in a very compact size. A high-power PA with four-way combining has been fabricated in a 28-nm CMOS bulk technology. The unit PA uses low- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$k$</tex-math> </inline-formula> transformer-based coupled-resonator networks to realize wideband matching. The measured results of the PA prototype demonstrate the peak gain of 22.6 dB, the saturated output power of 16.2 dBm, and the peak power added efficiency of 8.6% at 135 GHz with a 3-dB BW of 28 GHz from 124 to 152 GHz. Meanwhile, the total area of this PA die is merely 0.66 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> 0.73 mm.

A Wideband Balanced Amplifier Using Edge-Coupled Quadrature Couplers in 0.13-μm SiGe HBT Technology

In this work, a wideband millimeter-wave (mm-wave) power amplifier (PA) is reported. To provide excellent input/output impedance matching across broadband, sufficient output power and high power-added efficiency (PAE), a balanced amplifier (BA)-based architecture is used in designing this PA. In particular, an edge-coupled quadrature coupler is designed as its RF-power-division/combination block, and its performance in terms of magnitude/phase balance error is minimized throughout a relatively wide bandwidth. A PA prototype is fabricated in 0.13- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> SiGe HBT technology and tested. Under a 1.6-V power supply, the variation of small-signal gain is less than 3 dB within 20-40 GHz, which is equivalent to more than 66% fractional 3-dB bandwidth. Within this frequency range, at least 15.8 dBm saturated output power could be delivered with the peak PAE higher than 16.8%. The designed PA supports a single-carrier 200-MHz 64-quadrature amplitude modulation (QAM) with higher than 12.8-dBm average output power, while still maintaining an error vector magnitude (EVM) below −25 dB at 30 GHz. The size of the designed compact-size PA, including all pads, is only 0.7 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times1.3$ </tex-math></inline-formula> mm.

Design of a Compact GaN Power Amplifier With High Efficiency and Beyond Decade Bandwidth

This letter presents a power amplifier (PA) design and network synthesis approach to achieve wideband and efficient performance with a very compact circuit size. A design method is presented in detail to convert a canonical filter-based high-order matching network to the proposed matching configuration with transistor parasitic and packaged elements absorption, and a compact passive network footprint. As a proof of concept, a prototype GaN HEMT PA is implemented. Starting from a fourth-order output network filter, the inductances and capacitance of the filter elements are re-organized to model, and thus absorb the output parasitics of the transistor, leading to a compact footprint with only four transmission lines. The measured results show that the prototype PA achieves an output power of 41.9–44.3 dBm and a 55%–74% drain efficiency, over a record-high decade bandwidth (0.35–3.55 GHz).

Mitigation of Load Mismatch Effects Using an Orthogonal Load Modulated Balanced Amplifier

This article presents an orthogonal load-modulated balanced amplifier designed to mitigate the effects of the load mismatch on the power-added efficiency and output power of the amplifier. This is achieved by electronically adjusting the ratio between the two input signals of the power amplifier (PA) (in phase and amplitude) and the reactive termination at the output nominally isolated port. The mode of operation of the PA is described using a theoretical analysis that highlights the role of the different tuning parameters and is confirmed by simulations using a simplified transistor model. The design and characterization under load mismatch of a prototype PA, working in the 1.6–3.2 GHz band are described and the experimental results compared to those of an analogous balanced PA, where it is shown that the orthogonal balanced amplifier is able to increase substantially the mismatch region on which a given target performance is achieved.

Design of 70% PAE Class‐F 1.2–1.4 GHz 10 WGaNpower amplifierMMIC

AbstractThis letter presents a novel design of a Class‐F monolithic microwave integrated circuit (MMIC) power amplifier (PA) operating at L‐band with a power‐added‐efficiency (PAE) better than 70%. The MMIC PA is designed via load/source‐pull techniques to locate the optimal impedances at fundamental and harmonic frequencies on not only output but also input terminations. Moreover, rather than quarter wavelength stubs used in conventional designs, several parallel/series LC resonators are utilized to behave open/short at certain harmonics and to reform the drain waveform, yielding highly efficient performance of the PA MMIC. A prototype PA MMIC validating the proposed method is designed, fabricated and measured, which implemented on a 0.25 μm gallium nitride high electron mobility transistor technology. The measurement results of the PA under a drain voltage of 28 V at 1 ms pulse width with 30% duty cycle demonstrated a PAE better than 70% over 1.2–1.4 GHz with an output power greater than 40 dBm (10 W). The chip size is 2.5 mm × 3.5 mm (8.75 mm2).

Dual-Band Class J Power Amplifier at 2.45 and 5.8 GHz for UAVs Communications

A hybrid dual-band power amplifier (PA) prototype working at two Industrial, Scientific and Medical (ISM) bands, 2.4-2.5 GHz and 5.725-5.875 GHz, was designed for Unmanned Aerial Vehicles (UAVs) communication applications in Spain. Initially, two single-band PA prototypes centered at each band were designed to evaluate the single-band achievable RF performance. In all the PAs, the Gallium Nitride (GaN) Qorvo HEMT TGF2977-SM was used, as well as microstrip transmission lines technology. To achieve wideband, good linearity and efficiency, the PAs were designed in class J. The measured results for the dual-band PA prototype at the 2dB compression point at the lower and higher bands, respectively, are 14.8 dB and 11.2 dB of Transducer Power Gain (GT ), 35.7 dBm and 34.8 dBm of RF output power (Pout) and 59.2% and 43.5% of Drain Efficiency (η). At 3dB compression the respective lower and higher bands results are 37.9 dBm and 37 dBm of Pout and 73.9% and 55% of η.

A Broadband Fully Integrated Power Amplifier Using Waveform Shaping Multi-Resonance Harmonic Matching Network

In this article, we propose a broadband fully integrated power amplifier (PA) using a waveform shaping harmonic matching network. A comprehensive theory is developed for the proposed multi-resonance harmonic matching network to derive design criteria for achieving wide bandwidth, low insertion loss, and optimum load impedances in the second- and third-harmonic frequency bands. Furthermore, it is shown that this network can be realized using a lower total inductance compared to a standard bandpass network which is an important feature in reducing chip area and fabrication cost. A fully integrated PA prototype is implemented using a 250-nm GaN-on-SiC process with 28-V supply. The PA provides 33.9&#x2013;36.1dBm output power (at 2&#x2013;3dB gain compression), 42&#x2013;51&#x0025; drain efficiency (DE), 38&#x2013;48&#x0025; power-added efficiency (PAE), and 10&#x2013;12.2dB power gain, across 4.0&#x2013;6.0GHz. The output-power 1-dB bandwidth is 3.6&#x2013;5.6GHz (44.5&#x0025;). For a 64-QAM signal with 8dB peak-to-average power ratio (PAPR) at 5.0GHz, the PA can provide 30.2dBm average output power and 32&#x0025; average PAE with RMS error vector magnitude (EVM) of &#x2212;34.0/&#x2212;32.4/&#x2212;28.4dB (2.0/2.4/3.8&#x0025;) for 50/100/200MHz modulation bandwidth, without using digital predistortion (DPD). The maximum average output power and average PAE, under the linearity constraint EVM &#x003C;&#x2212;28dB, are respectively 32.1/32.0/30.2dBm and 39/38/32&#x0025;, for modulation bandwidth of 50/100/200 MHz.

A Broadband Linear Ultra-Compact mm-Wave Power Amplifier With Distributed-Balun Output Network: Analysis and Design

This article presents a broadband power amplifier (PA) with a distributed-balun output network that provides the PA optimum load impedance over a wide bandwidth. The proposed output network comprises two coupled-line sections and absorbs the device output capacitance. It employs a scalable coupled-line modeling approach that captures both the magnetic (inductive) and electric (capacitive) couplings between windings with fewer parameters and supports a rapid design process. Closed-form design solutions, design space limitations, bandwidth limits, and design tradeoffs are derived and analyzed comprehensively. Its extension to differential output and common-mode response is also discussed in detail. As a proof of concept, a prototype PA is implemented for multiband fifth-generation (5G) applications in 45-nm SOI CMOS. With no biasing retuning or network reconfiguration, the PA consistently achieves >19.1 dBm P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sat</sub> , >37.3% peak power-added efficiency (PAE), 17.8-19.6 dBm P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</sub> , and 36.6%-44.3% PAE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P1dB</sub> over 24-40 GHz, verifying the truly wideband large-signal matching. The PA demonstrates 5G new radio (NR) frequency range 2 (FR2) modulation signals over 24-42 GHz, covering n257/n258/n260 5G bands. For 5G NR FR2 800-MHz 2-CC 64-QAM signals (11.78-dB PAPR), the PA achieves 11.3-dBm/16.6% average P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">out</sub> /PAE with -25.1-dB rms EVM at 28-GHz and 10.2-dBm/13.6% average P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">out</sub> /PAE with -25.1-dB rms EVM at 37 GHz.

Design of dual‐mode high efficiency tri‐band power amplifier using input and output harmonic control technology

In this article, a design method for a tri-band power amplifier (PA) with dynamic drain bias voltage is presented. Continuous operation modes are used to expand the impedance design space. In the input and output matching networks, harmonic control circuits are set up to improve efficiency. The load harmonic impedances are obtained by continuous theory. Bias network and harmonic short circuit are used in the input matching network to control harmonics and obtain stop-band. Dynamic drain bias enables the PA to adapt to different emission environments. With input and output harmonic control technology, a 0.9, 1.5, and 2.1 GHz GaN PA is designed to achieve high efficiency in different modes. The measured efficiencies of the fabricated PA at all three bands are more than 58.6%. At 1.5 GHz, when driven with a 20 MHz LTE signal with a 7 dB peak-to-average power ratio, by applying digital pre-distortion, the PA prototype maintains an adjacent channel power ratio of better than −48.7 dBc.

Design of bandwidth‐enhanced power amplifier based on class‐EF modes

AbstractThis article describes a methodology for designing broadband high‐efficiency GaN HEMT power amplifier (PA) which is suitable for base stations and modern wireless communication based on the Class‐EF mode. To achieve both efficiency enhancement and bandwidth extension for the PA, the load‐pull technique is employed to acquire the optimum impedance regions of the second harmonic. Especially, considering the influences of the harmonic control network on the accuracy of obtaining the fundamental impedance, the load‐pull technique is performed to obtain the optimal fundamental impedance again after the harmonic control circuit is determined. In addition, the theory of multiple frequencies matching is also employed to manipulate six desired fundamental frequency points concurrently. Based on the proposed theory, the Class‐EF PA prototype is designed and fabricated. The measurement results exhibits a drain efficiency (DE) of 60%–75% in the range of 2.1–3.6 GHz while having an output power of 38–40.5 dBm and gain of larger than 8 dB.

Efficient Interpolation Method for Wireless Communications and Signal Processing Applications

Interpolation involves the process of estimating values at positions in between the adjacent samples, which has very fundamental and applied implications in signal processing and communication systems. In this work, a new method of cubic spline interpolation (CSI) is proposed and derived mathematically from the input samples respecting the time-domain boundary conditions, and the corresponding piecewise polynomials are optimized in the frequency domain to achieve good spectral properties. A comparative analysis of several prior arts, including arbitrary frequency response polynomial (AFRP) and basis spline (B-spline) is also presented, giving a clear overview of the advantages associated with the proposed technique in terms of implementation complexity, latency, and in-band and out-of-band spectral performance. The measurement results with three different radio frequency (RF) power amplifier (PA) prototypes using an input stimulus comprised of different instantaneous bandwidth (iBW) carrier aggregated 5G new radio (NR) waveform are demonstrated to highlight the improved performance in the context of digital predistortion (DPD) correction. Finally, the architecture of the proposed method is illustrated, which is suitable for real-time high-speed digital implementation.

A Ku-Band CMOS Power Amplifier With Series-Shunt LC Notch Filter for Satellite Communications

This article presents a Ku-band power amplifier with a series-shunt LC notch filter in 65-nm CMOS. The notch filter is integrated into the inter-stage matching network to attenuate the receiver-band noise, thereby reducing transmitter-to-receiver interference. A comprehensive analysis of the series and the shunt notch filters, as well as the position to apply the notch filter is discussed. Besides, a systematic method of optimizing passive devices in the notch filter is proposed to further improve network Q and minimize the influence on the power amplifier. Fabricated in 65-nm CMOS technology, the power amplifier prototype delivers a measured gain of 21.9 dB with 3-dB bandwidth from 13.7 GHz to 16.7 GHz at the nominal state. At 14.2 GHz, it can offer a saturated output power of 14.5 dBm with peak power added efficiency of 24.1%. The notch frequency is adjustable from 10.3 to 11.9 GHz to offer the best attenuation at the receiver band. From 10 to 12 GHz, a maximal attenuation of 30 dB is achieved. The design occupies a core area of 0.35×0.85 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .