Positive Threshold Voltage Shift Research Articles

Investigation and active suppression of self-heating induced degradation in amorphous InGaZnO thin film transistors**Project supported by the National Key R&D Program of China (Grant No. 2016YFB0400100), the National Natural Science Foundation of China (Grant No. 91850112), the Natural Science Foundation of Jiangsu Province, China (Grant No. BK20161401), the Priority Academic Program Development of Jiangsu Higher Education Institutions, China, the Science

Self-heating effect in amorphous InGaZnO thin-film transistors remains a critical issue that degrades device performance and stability, hindering their wider applications. In this work, pulsed current–voltage analysis has been applied to explore the physics origin of self-heating induced degradation, where Joule heat is shortly accumulated by drain current and dissipated in repeated time cycles as a function of gate bias. Enhanced positive threshold voltage shift is observed at reduced heat dissipation time, higher drain current, and increased gate width. A physical picture of Joule heating assisted charge trapping process has been proposed and then verified with pulsed negative gate bias stressing scheme, which could evidently counteract the self-heating effect through the electric-field assisted detrapping process. As a result, this pulsed gate bias scheme with negative quiescent voltage could be used as a possible way to actively suppress self-heating related device degradation.

Direct Patterning of p-Type-Doped Few-layer WSe2 Nanoelectronic Devices by Oxidation Scanning Probe Lithography.

Direct, robust, and high-resolution patterning methods are needed to downscale the lateral size of two-dimensional materials to observe new properties and optimize the overall processing of these materials. In this work, we report a fabrication process where the initial microchannel of a few-layer WSe2 field-effect transistor is treated by oxygen plasma to form a self-limited oxide layer on top of the flake. This thin oxide layer has a double role here. First, it induces the so-called p-doping effect in the device. Second, it enables the fabrication of oxide nanoribbons with controlled width and depth by oxidation scanning probe lithography (o-SPL). After the removal of the oxides by deionized H2O etching, a nanoribbon-based field-effect transistor is produced. Oxidation SPL is a direct writing technique that minimizes the use of resists and lithographic steps. We have applied this process to fabricate a 5 nm thick WSe2 field-effect transistor, where the channel consists in an array of 5 parallel 350 nm half-pitch nanoribbons. The electrical measurements show that the device presents an improved conduction level compared to the starting thin-layer transistor and a positive threshold voltage shift associated to the p-doping treatment. The method enables to pattern devices with sub-50 nm feature sizes. We have patterned an array of 10 oxide nanowires with 36 nm half-pitch by oxidation SPL.

Performance improvements of tungsten and zinc doped indium oxide thin film transistor by fluorine based double plasma treatment with a high-K gate dielectric

The electrical characteristics and XPS analysis for the amorphous tungsten and zinc doped indium oxide thin film transistor, which was performed with single or double different fluorine based remote plasma treatment, were investigated in this study. A high mobility TFT device with the tungsten doped channel was fabricated in the previous study, but there was an inevitable negative shift for the threshold voltage, which will be a limit for the application of systemic circuit design. Therefore, a double fluorine based remote plasma treatment process is proposed for the high electronegativity of fluorine element and its similar radius as oxygen, which can be used to terminate the donor-like oxygen vacancy. It may induce a positive shift of threshold voltage, while carrier concentration and field effect mobility might be maintained. As a result, the sample with CF4/N2 + O2 plasma treatment exhibits a higher on/off current ratio of ~4.73 × 106, a lower sub-threshold swing value of 0.070 V/decade, and a lower interfacial trap density value of 5.21 × 1011 eV−1 cm−2 than other samples, while there is even a desirable positive shift of threshold voltage and acceptable field effect mobility of 31.2 cm2/Vs. This research proposes an effective approach to improve the reliability characteristic and adjust the inevitable negative shift of threshold voltage without sacrificing the carrier mobility of device.

Investigation on the degradation indicators of short-circuit tests in 1.2 kV SiC MOSFET power modules

This paper provides a comprehensive investigation on both static characteristics and short-circuit performance of 1.2 kV SiC MOSFET power modules with 2nd generation planar technology. The experimental approach is based on the static characteristics measurements and the short-circuit tests with gradual increase of pulse time duration. If any variation of the static characteristics appears, the time duration of next short-circuit tests would keep the same with the last pulse duration (approach 1) or increase continuously (approach 2). The results of the short-circuit waveforms show a gate degradation which is further confirmed with the measurement of the gate leakage current. Additionally, other degradation indicators, including positive shift of threshold voltage, drain leakage current and on-state resistance increase are evidenced and discussed in this paper. These can be used for early prediction of the degradation and failure in the short-circuit conditions.

Hole-Induced Threshold Voltage Shift Under Reverse-Bias Stress in E-Mode GaN MIS-FET

Under reverse-bias stress (i.e., OFF-state stress with ${V} _{\text {GS}} ) with high drain voltage, ultraviolet (UV) illumination and larger negative gate bias are found to accelerate the positive shift in threshold voltage ( ${V}_{\text {TH}}$ ) of enhancement-mode GaN MIS-FETs with fully recessed gate. These results suggest a hole-induced degradation mechanism. In the absence of UV illumination, holes could be generated by impact ionization in the high electric-field region, which is initiated by electrons injected from the source through the buffer layer. With a larger negative gate bias, more holes will flow to the gate side and pass through the silicon nitride (SiN x ) gate dielectric, as SiN x does not present any energy barrier to holes. The enhanced hole transport through the dielectric under large negative gate bias could accelerate new defects generation and therefore result in the larger positive threshold voltage shifts.

Effects of Various Passivation Layers on Electrical Properties of Multilayer MoS₂ Transistors.

So far many of research on transition metal dichalcogenides (TMDCs) are based on a bottomgate device structure due to difficulty with depositing a dielectric film on top of TMDs channel layer. In this work, we study different effects of various passivation layers on electrical properties of multilayer MoS2 transistors: spin-coated CYTOP, SU-8, and thermal evaporated MoOX. The SU-8 passivation layer alters device performance least significantly, and MoOX induces positive threshold voltage shift of ~8.0 V due to charge depletion at the interface, and the device with CYTOP layer exhibits decreased field-effect mobility by ~50% due to electric dipole field effect of C-F bonds in the end groups. Our results imply that electrical properties of the multilayer MoS2 transistors can be modulated using a passivation layer, and therefore a proper passivation layer should be considered for MoS2 device structures.

Positive threshold voltage shift in AlGaN/GaN HEMTs with p-type NiO gate synthesized by magnetron reactive sputtering

In the present study, the threshold voltage turning of AlGaN/GaN heterostructure field-effect transistor (HFETs) by NiO gate electrode was evaluated. Firstly, NiO films were sputtered on sapphire substrates for material characterization. The composition, crystalline structure, electrical properties and optical properties of the as-grown films were all influenced by the substrate temperatures during magnetron sputtering. All NiO samples were indexed as (1 1 1) oriented face-centered cubic, while the sample synthesized at a substrate temperature of 30 °C showed the smallest (highest) resistivity (hole concentration). Then, this procedure was adopted in further studies using NiO as the gate electrode of AlGaN/GaN HFETs. Compared with the Ni/Au-gated device, the band structure adjustment introduced by the p-NiO gate was found to shift the threshold voltage positively and also cause a smaller drain current. With a band gap of 3.6 eV for the NiO film, the valence and conduction band offsets between NiO and AlGaN are estimated to be 1.6 eV and 1.4 eV, which may cause the positive threshold voltage shift.

Preliminary characterization of the response of an organic field effect transistor to ionizing radiation

Organic thin film transistors (OTFT) were investigated as a novel radiation detector. The OTFTs were fabricated on a flexible PET substrate with a PMMA dielectric layer and a pentacene semiconductor. OTFTs were irradiated up to 400 Gy using kilovoltage (100 and 180 kVp) and megavoltage (6 and 18 MV) photon beams. One OTFT was irradiated to 1000 Gy using 6 MV to observe the longevity of the device. Irradiating the devices caused a positive threshold voltage shift in each device. The magnitude of the threshold voltage shift per unit dose decreased with accumulated dose until it stabilized after approximately 200 Gy. The sensitivity ranged from 2 to 10 mV/Gy at low accumulated dose and decreased to 0.5–1.5 mV/Gy after 200 Gy of accumulated dose across the various OTFTs. After 400 Gy all of the devices were still functional with a loss in mobility of about 15, 14, 12 and 9% for beam qualities of 100 kV, 180 kV, 6 MV, and 18 MV, respectively. After 1000 Gy using 6 MV the OTFT was still functional with a sensitivity of 0.8 ± 0.1 mV/Gy after 300 Gy. This study showed that an OTFT on a flexible substrate shows a measureable response to photon irradiation of various qualities.

Characteristics and threshold voltage model of GaN-based FinFET with recessed gate**Project supported by the National Key Research and Development Program of China (Grant No. 2016YFB0400 300) and the National Natural Science Foundation of China (Grant Nos. 61574110, 61574112, and 61474091).

In this work, AlGaN/GaN FinFETs with different fin widths have been successfully fabricated, and the recessed-gate FinFETs are fabricated for comparison. The recessed-gate FinFETs exhibit higher transconductance value and positive shift of threshold voltage. Moreover, with the fin width of the recessed-gate FinFETs increasing, the variations of both threshold voltage and the transconductance increase. Next, transfer characteristics of the recessed-gate FinFETs with different fin widths and recessed-gate depths are simulated by Silvaco software. The relationship between the threshold voltage and the AlGaN layer thickness has been investigated. The simulation results indicate that the slope of threshold voltage variation reduces with the fin width decreasing. Finally, a simplified threshold voltage model for recessed-gate FinFET is established, which agrees with both the experimental results and simulation results.

Solution-processed stacked TiO2 and Al2O3 dielectric layers for high mobility thin film transistor

In this paper, a TiO2/Al2O3/TiO2/Al2O3/TiO2 (TATAT) stacked structure was developed as a gate dielectric for amorphous ZnSnO (ZTO) thin-film transistor (TFT) applications. The TATAT insulator has a relative permittivity and leakage current density of 11 and 4.44 × 10-7 A/cm2 at 1 MV/cm, respectively. As compared with the AlTiO (ATO) compound dielectric, the ZTO TFT device with a TATAT stacked dielectric exhibited a lower threshold voltage of 0.56 V, a higher Ion/Ioff current ratio of 1.2x 10-8, a larger field-effect mobility of 86.6 cm2/Vs, and a smaller subthreshold swing of 0.2 V/decade. Furthermore, the positive shift of threshold voltage is less than 0.15 V under positive bias stress. The results suggest that stack TATAT films is a promising gate dielectric for solution-processed TFT devices with high mobility and stability.

Threshold Voltage Adjustment in Hybrid-Microstructural ITO-Stabilized ZnO TFTs via Gate Electrode Engineering

When metallic Al was replaced by conductive ITO as the gate electrode (GE) material, the positive threshold voltage ( ${V} _{\textsf {th}}$ ) shift of top-gated metal oxide (MO) thin-film transistors (TFTs) was found to be much larger than the work function (WF) difference of the GEs. Using secondary ion mass spectrometry and X-ray photoelectron spectroscopy techniques, it was noted that the permeability of GE materials for hydrogen diffusion out of and oxygen diffusion into the active layers during post-annealing could also affect ${V} _{\textsf {th}}$ significantly. The hybrid-phase microstructural ITO-stabilized ZnO TFTs with ITO top GEs exhibited relatively good electrical characteristics with a typical ${V} _{\textsf {th}}$ of 0.5 V and an on-off ratio of over 1010 in enhancement operation mode, and robust reliability against gate-bias stress. This letter initiated a new perspective to adjust ${V} _{\textsf {th}}$ of top-gated MO TFTs via GE engineering.

High-Performance Normally-OFF GaN MIS-HEMTs Using Hybrid Ferroelectric Charge Trap Gate Stack (FEG-HEMT) for Power Device Applications

A GaN metal-insulator-semiconductor-high electron mobility transistor (HEMT) using hybrid ferroelectric charge trap gate stack (FEG-HEMT) is demonstrated for normally-OFF operation. The ferroelectric (FE) polarization increases the number of trapped charges in the HfON charge trapping layer, leading to high positive threshold voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> ) shift for the normally-OFF device. Besides, under the positive bias temperature instability (PBTI) test, the internal electric field induced by FE polarization causes smoother slope of the conduction band in FE gate stack, resulting in better V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> stability. With the proposed hybrid FE charge trap gate stack, the device exhibits a high V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> of +2.71 V at I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Dh</sub> = 1μA/mm, a high maximum current density of 820 mA/mm and low on-resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ) of 11.1 Ω · mm. The FE device also shows good V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> -temperature stability compared to the non-FE device results. Besides, a high current device with 40 A is also fabricated in this letter to demonstrate the feasibility of the proposed FEG-HEMT device for high power device application.

Threshold Voltage Instability in p-GaN Gate AlGaN/GaN HFETs

We investigate the impact of the gate contact on the threshold voltage stability in p-GaN gate AlGaN/GaN heterojunction field-effect transistors with double pulse measurements on the p-GaN gate devices and device simulations. We find that, under gate stress, in the case of high-leakage Schottky contact, a negative threshold voltage shift results from hole accumulation in the p-GaN region. Conversely, in the case of low-leakage Schottky contact, hole depletion in the p-GaN region gives rise to a positive threshold voltage shift. More generally, we show that an imbalance between the hole tunneling current through the Schottky barrier and the thermionic current across the AlGaN barrier results in a variation of the total charge stored in the p-GaN region, which in turn is responsible for the observed threshold voltage shift. Finally, we present a simplified equivalent circuit model for the p-GaN gate module.

Scanning photocurrent microscopy of electrons and holes in the pigment semiconductor epindolidione

Abstract Photocurrent microscopy is used to characterize the kinetics of electrons and holes in organic field-effect transistors (FETs) with the hydrogen-bonded pigment epindolidione as active layer. The method relies on electrons and holes, generated on local illumination, which are provided after exciton splitting, to probe charge trapping. In the dark, hole conduction is observed for negative gate voltage while no electron conduction is observed for positive gate voltage. However, under illumination, a fast displacement current with 60 μs onset time and 1 ms exponential decay occurs for positive gate voltage, which can be explained by exciton splitting underneath the semitransparent top contact followed by subsequent electron trapping and hole extraction. Afterward, trapped electrons hop via further trap states within the film to the insulator into interface traps (13 ms exponential decay) which induce a positive threshold voltage shift in the FET transfer curves for hole transport. Photocurrent microscopy confirms that the displacement current occurs only for illumination under and near the semitransparent source/drain contacts, which act here as metal-insulator-semiconductor (MIS) diodes. For negative gate voltage instead, the photocurrent comprises an enhanced hole current in the FET channel between the contacts. In the channel region, the detrapping of holes at the interface with the insulator (3 ms time constant) enhances the transistor current at low frequencies 10 kHz. Thus, we show here that photocurrent microscopy allows to identify the kinetics of electrons and holes in traps close to the contacts and in the FET channel of pigment transistors.

Low-temperature characteristics of normally-off AlGaN/GaN-on-Si gate-recessed MOSHFETs

We investigated the low-temperature operation of normally-off AlGaN/GaN heterostructure field-effect-transistors (HFETs) with gate-recessed metal-oxidesemiconductor (MOS) structure and normally-on Schottky-gate high-electron-mobility-transistors (HEMTs). Device characteristics measured from 100 to 300 K exhibited the distinct temperature-dependence between two types of devices. While the increase of on-current was observed from normally-on AlGaN/GaN Schottky-gate HEMTs due to the enhanced mobility in the two-dimensional electron gas (2-DEG) channel, normally-off AlGaN/GaN gate-recessed MOSHFETs demonstrated distinctive characteristics at 100 K including the decrease of on-current and the positive shift of threshold voltage (Vth). The temperature-dependence observed in gate-recessed MOSHFETs is attributed to the different characteristics of the recessed channel from the 2-DEG channel, in which the sheet carrier density (nsh) and mobility (μ) were reduced as the temperature approaches the cryogenic regime.

AlGaN/GaN High Electron Mobility Transistors with a p-GaN Backgate Structure

GaN based materials are widely used for power devices. AlGaN/GaN heterostructure is able to form high mobility 2DEG channel by its spontaneous and piezoelectric polarization at the AlGaN/GaN interface. Therefore, AlGaN/GaN HEMT is a promising candidate for next generation power device because of its high breakdown voltage, high current density and low on-state resistance (Ron). For efficient power switching applications, the E-mode operation with positive threshold voltage and low leakage current are required. Many efforts have been devoted to make AlGaN/GaN HEMT to achieve E-mode operation, such as gate recess, F-ion implements and p-GaN gate structures. In this study, a p-GaN backgate layer is applied to AlGaN/GaN HEMTs. Additional control ability under the channel layer is observed by applying bias at the p-GaN layer. The device can be turned off easily due to the p-GaN layer under channel layer, which depletes carriers in channel under suitable bias. Simulation and measurement results show the shift of threshold voltage toward positive for possible E-mode operation when backgate bias is negative. The simulation of AlGaN/GaN HEMT with a p-GaN backgate layer was performed with Silvaco TCAD tools including device structures, band diagrams, electron concentrations and ID-VG characteristic. A 30 nm p-GaN backgate layer was implemented under the 30-nm GaN channel with p-type doping of 2 ´ 1017 cm-3. The AlGaN/GaN HEMT epitaxial wafers on low-resistivity Si (111) substrates were grown by MOCVD. Device fabrication started with p-GaN activation in nitrogen atmosphere at 700°C for 15 minutes. Mesa isolation was etched by ICP down to the buffer. The ohmic contact was made by the deposition of Ti/Al/Ni/Au (25/125/45/55 nm) and annealing at 875°C in a nitrogen atmosphere for 40 s. The contact to p-GaN layer was etched by ICP. Backgate metal was made by deposition of Ni/Au (20/20 nm) and annealing at 500°C in an oxygen atmosphere for 5 minutes. Ni/Ti/Al/Ti/Au (30/25/250/25/200 nm) metals were used to form front gate (FG). All the devices under test are with a gate-source distance of 4 μm, a gate length of 2 μm, and a gate-drain distance of 10 μm. The p-GaN backagte layer with bias is able to adjust the fermi levels in the quantum well thus the 2DEG concentration. Therefore, the threshold voltage shifts to positive values while applying negative backgate bias. Electrons are localized in the GaN channel layer when negative backgate bias was applied. This result is to justify the reduction of leakage current because leakage path through buffer layer is confined. From the simulated transfer characteristics of AlGaN/GaN HEMT with a p-GaN backgate under different backgate bias (VBG ). It is clearly to observe that the positive shift of threshold voltage (VTH) is due to the negative VBG . The simulated results showed the positive shift of VTH which was 5 V from VBG of 0 V to -14 V. Therefore, it possible to operate HEMT in either D-mode or E-mode operation by adjusting VBG . The measurement results showed the positive shift of VTH which was 0.55 V from VBG of 0 V to -14 V, with associated off-state leakage current reduction of 73.1%. However the shift of VTH is not as significant as in the simulation, the major reason is due to the bad p-GaN contact. The impact of p-GaN backgate structure in this study on the DC characteristics of AlGaN/GaN HEMTs was investigated. AlGaN/GaN HEMTs with a p-GaN backgate shows an additional control capability in 2DEG channel. Therefore, threshold voltage is adjustable and leakage current is improved by backgate bias. This extra gate control under channel layer is useful for circuit flexibility to achieve both D-mode and E-mode operations in the power device circuit design.

AlGaN/GaN High Electron Mobility Transistors with a p-GaN Backgate Structure

This study discusses the impact of a p-GaN backgate structure on the DC characteristics of AlGaN/GaN HEMTs. AlGaN/GaN HEMTs with a p-GaN backgate layer showed reduction of leakage current and positive shift of threshold voltage while applying negative backgate bias. The shift of threshold voltage was 0.55 V, and reduction of off-state leakage current was 73.1% while backgate bias was -14 V. The on/off current ratio was in the range of 107 with backgate bias. It is possible to operate an AlGaN/GaN HEMT in both D- and E-modes with suitable epitaxial layer design using a p-GaN backgate structure.

Spontaneous Interfacial Dipole Orientation Effect of Acetic Acid Solubilized PFN.

Poly[(9,9-dioctyl-2,7-fluorene)- alt-(9,9-bis(3'-( N, N-dimethylamino)propyl)-2,7-fluorene)] (PFN) is a very important interfacial modifier in organic photovoltaic and organic light-emitting diodes to improve device performance, where their molecular dipole has been regarded to play a key role. In this work, we have reported a spontaneous interfacial dipole orientation effect in acetic acid dissolved PFN, which is strongly related to the interfacial dipole and the corresponding device performance. In direct spin-coating, the interfacial dipole is 1.08 Debye with interfacial contact angle 84.8°, whereas after self-assembly of 10 min, the interfacial dipole is balanced at 4.21 Debye, with the interfacial contact angle decreasing to 76.8°. Without strong interaction with the substrate, the energy of upward amine groups is much lower than that of downward ones in theoretical simulation, which would be the driving force of this spontaneous process. The preferred conformations of PFN molecules on hydroxylated substrates have over 99% amine groups outward, and the theoretical average dipole calculated from the weight of these conformations is 4.48 Debye, which is close to the experimental result and indicates a high ratio of upward amine groups in self-assembled films. This effect obviously changes the device performance, such as an obvious positive threshold voltage shift in transistors and a distinct increase of the short-circuit current/open-circuit voltage in organic solar cells. This effect provides a deeper understanding of the PFN interlayer mechanism and has potential application in optoelectronic devices.

Al2O3 Insertion Layer for Improved PEALD SiO2/(Al)GaN Interfaces

The development of high‐quality gate dielectric/III‐N semiconductor interfaces is indispensable to achieve high performance GaN‐based high electron mobility transistors (HEMTs). In this work, we present improved interfaces between SiO2 and GaN (or AlGaN) with Al2O3 insertion layer deposited by plasma‐enhanced atomic layer deposition (PEALD). Interface state density (Dit) and border trap density (Nbt) were characterized using UV‐assisted C–V measurement on metal‐oxide‐semiconductor capacitors (MOSCAPs). SiO2 with Al2O3 insertion layer exhibited integrated Dit of 1.93 × 1011 cm−2, one order of magnitude lower than that without Al2O3 insertion layer. Nbt of SiO2 with Al2O3 insertion layer is nearly twice of that without Al2O3 insertion layer. Stressed C–V measurement further confirmed improved interface with Al2O3 insertion layer. To investigate the performance of MOS‐HEMT using SiO2 with Al2O3 insertion layer as a gate dielectric, pulsed IDS–VGS measurements were performed. MOS‐HEMT exhibited positive threshold voltage shift, which is attributed to electron trapping in interface states and border traps.

High performance p-type chlorinated-benzothiadiazole-based polymer electrolyte gated organic field-effect transistors

Abstract We report the evaluation of charge transport parameters of four p-type dichlorinated-2,1,3-benzothiadiazole (2ClBT) based conjugated polymers end-capped with different electron-donor units (thiophene (T), thieno[3,2-b]thiophene (TT), 2,2′-bithiophene (DT), and (E)-2-(2-(thiophen-2-yl)vinyl)thiophene (TVT)) in electrolyte gated organic field-effect transistors operating at a driving voltage of −2 V. Remarkable hole mobility improvement of 0.13–0.56 cm2V−1s−1 were achieved in 2ClBTs based polymers, with P2ClBT-DT recording the highest mobility of 0.56 cm2V−1s−1 and current on/off ratio ∼107. Interestingly, a positive threshold voltage shift (ΔVTh) was observed in the transfer characteristics from the linear to saturation regime of all the 2ClBTs based polymer electrolyte gated OFET devices of L = 10 μm, contrary to devices with conventional poly(methyl methacrylate) gate dielectric, which showed a negative ΔVTh shift. Among the 2ClBTs based polymers, P2ClBT-TVT devices showed the lowest mobility and ΔVTh shift, which is attributed to severe ion diffusion in the polymer semiconducting layer owing to the vinyl group backbone susceptible to electrochemical doping. Our results emphasize essential selection consideration of the monomeric moieties, molecular ordering, π-π stacking and backbone planarity of conjugated polymers for electrolyte based organic devices.