Portable Fashion Research Articles

Numerical eigen-spectrum slicing, accurate orthogonal eigen-basis, and mixed-precision eigenvalue refinement using OpenMP data-dependent tasks and accelerator offload

Performing a variety of numerical computations efficiently and, at the same time, in a portable fashion requires both an overarching design followed by a number of implementation strategies. All of these are exemplified below as we present transitioning the PLASMA numerical library from relying on dependence-driven large tasks to achieving utilization of fine grain tasking and offload to hardware accelerators while keeping its core dependence sets: OpenMP source code pragmas and runtime for most system-level functionality and basic low-level numerical kernels provided directly by hardware vendors or open source projects with vendor contributions. We also present new algorithmic methods and their efficient parallel implementations including fine grained tasking for eigen-spectrum slicing and offload for mixed-precision eigenvalue refinement. We provide performance, scaling, and numerical results showing sizable gains over the available solutions from either the open source and vendor-provided packages.

Microfluidic-based colorimetric nucleic acid detection of pathogens

In this review, we highlight the most recent advances in the nucleic acid detection of viruses, bacteria, fungi, and protozoa in a portable fashion using colorimetric-based microfluidic devices.

Autotuning Techniques for Performance-Portable Point Set Registration in 3D

We present an autotuning approach applied to exhaustive performance engineering of the EM-ICP algorithm for the point set registration problem with a known reference. We were able to achieve progressively higher performance levels through a variety of code transformations and an automated procedure of generating a large number of implementation variants. Furthermore, we managed to exploit code patterns that are not common when only attempting manual optimization but which yielded in our tests better performance for the chosen registration algorithm. Finally, we also show how we maintained high levels of the performance rate in a portable fashion across a wide range of hardware platforms including multicore, manycore coprocessors, and accelerators. Each of these hardware classes is much different from the others and, consequently, cannot reliably be mastered by a single developer in a short time required to deliver a close-to-optimal implementation. We assert in our concluding remarks that our methodology as well as the presented tools provide a valid automation system for software optimization tasks on modern HPC hardware.

The EACVI Echo Handbook

Editors: Patrizio Lancellotti and Bernard Cosyns Publisher: Oxford University Press Publication date: 19 January 2016 Paperback: 588 pages, with more than 635 figures and charts ISBN: 978–0–19–871362–3 ![Graphic][1] The EACVI Echo Handbook is a publication of the European Association of Cardiovascular Imaging (EACVI), edited by Patrizio Lancellotti and Bernard Cosyns, with the support of 35 renowned contributors in the field of echocardiography and cardiovascular imaging. According to the authors, the book intends to present in a rapid and portable fashion, all information necessary to perform echocardiography and formulate diagnosis in complex clinical settings involving echocardiography. This targets ‘in-training’ or senior imagers and clinicians at the patient’s bedside, as well as sonographers. This ambitious goal is served by the books format, presentation, content, organization, and presentation. … [1]: /embed/inline-graphic-1.gif

Physician satisfaction with the vascular lab is highly dependent on after hour’s availability

Physicians and mid-level providers often order Vascular Laboratory (VL) testing because the studies performed are noninvasive, relatively in expensive, can help direct clinical decision making and can easily be performed both in the lab and in a portable fashion. This offers a versatility that other imaging modalities cannot always provide. Hospitals rely on accreditation agencies (Intersocietal Accreditation Commission, IAC) to set standards which emphasize technical proficiency and quality measures. However, to gauge general satisfaction with the facility, services and medical care they either perform patient satisfaction surveys in various departments themselves or hire consultants. Although hospitals also assess physician satisfaction with various functions within the hospital, physician satisfaction with specifically VL services has not been previously reported.

Overcoming barriers to transferring systems engineering practices into the rail sector

AbstractThere is increasing interest within the rail sector in applying the concepts of systems engineering. This paper presents arguments that the balance of concerns differs between a typical project in the rail sector and one in the domains in which systems engineering was developed and that this difference, together with a lack of agreement on the scope of systems engineering and differences in tradition between systems engineering and the established rail disciplines, raise barriers to the effective and efficient importation of systems engineering ideas into the rail sector. It is suggested that the system engineering community can lower these barriers by strengthening published systems engineering guidance in certain areas, being prepared to express themselves in plain language and packaging their practices in a more portable fashion, while the rail community can help by being prepared to adapt the systems engineering approach to meet their needs better and introducing new practices in a measured and systematic fashion. The benefits to both communities are identified and found to justify the investment required to take these steps. © 2011 Wiley Periodicals, Inc. Syst Eng

Portable virtual cycle accounting for large-scale distributed cycle sharing systems

CPU cycle sharing among distributed heterogeneous computers is the key function in large-scale volunteer computing and desktop grid applications. One important problem in large-scale distributed cycle sharing system is how to account for the amount of computation work performed by a CPU cycle provider, in a uniform and portable fashion across heterogeneous hardware and operating system platforms. Such an accounting mechanism is especially desirable when CPU resources are traded and a lack of uniform workload accounting will hinder the enforcement of market-driven CPU pricing/trading policies in distributed cycle sharing systems. Java Virtual Machine (JVM) has proved to be a good match for distributed cycle sharing because of its abilities to run applications on a wide variety of platforms without modification (portability) and to host untrusted applications (safety). In this paper, we present the design, implementation, and evaluation of an efficient, application-transparent virtual cycle accounting scheme integrated into JVM. Our scheme achieves portable workload accounting across heterogeneous computing platforms by accounting for JVM virtual instructions instead of real processor cycles. Different from the existing JVM CPU accounting mechanisms that involve bytecode rewriting, our scheme is transparent to applications and does not require visible changes to application and library code interfaces which would break applications that use Reflection API. Moreover, our scheme is efficient via the use of processor registers for accounting. Our experimental results demonstrate both high accounting accuracy and low runtime overhead of virtual cycle accounting.

Parallel mixing of photolithographically defined nanoliter volumes using elastomeric microvalve arrays

Portable microfluidic systems provide simple and effective solutions for low-cost point-of-care diagnostics and high-throughput biomedical assays. Robust flow control and precise fluidic volumes are two critical requirements for these applications. We have developed a monolithic polydimethylsiloxane (PDMS) microdevice that allows for storing and mixing subnanoliter volumes of aqueous solutions at various mixing ratios. Filling and mixing is controlled via two integrated PDMS microvalve arrays. The volumes of the microchambers are entirely defined by photolithography, hence volumes from picoliter to nanoliter can be fabricated with high precision. Because the microvalves do not require an energy input to stay closed, fluid can be stored in a highly portable fashion for several days. We have confirmed the mixing precision and predictability using fluorescence microscopy. We also demonstrate the application of the device for calibrating fluorescent calcium indicators. Due to the biocompatibility of PDMS, the device will have broad applications in miniaturized diagnostic assays as well as basic biological studies.

Internal coordinates for molecular dynamics and minimization in structure determination and refinement.

We present a software module which allows one to efficiently perform molecular dynamics and local minimization calculations in internal coordinates when incorporated into a molecular dynamics package. We have implemented a reference interface to the NIH version of the X-PLOR structure refinement package and we show that the module provides superior torsion-angle dynamics functionality relative to the native X-PLOR implementation. The module has been designed in a portable fashion so that interfacing it with other packages should be relatively easy. Other features of the module include the ability to define rather general internal coordinates, an accurate integration algorithm which can automatically adjust the integration step size, and a modular design, which facilitates extending and enhancing the module.

Bulk synchronous parallel: practical experience with a model for parallel computing

Valiant proposed the Bulk Synchronous Parallel (BSP) model as a possible model for parallel computing. He refers to BSP as a “bridging” model, being applicable to both system and algorithm design. The model allows hardware and software design to proceed independently but ensures compatibility between parallel computers and parallel programs. This paper explores the practical use of BSP, focusing on the portability and predictability it offers, without incurring any significant loss in performance. A BSP algorithm for sorting proposed by Gerbessiotis and Valiant is implemented in a portable fashion on three different parallel computers, specifically an Intel iPSC/860, a Transtech Parastation and an Alex AVX Series 2. The program uses a standard library of communication functions designed and implemented for each machine to support the BSP model. The measured performance of the program is compared to the BSP predictions and to other sorting results on similar machines to provide evidence for the utility of the BSP model.

A compiler approach to scalable concurrent-program design

We describe a compilation system for the concurrent programming language Program Composition Notation (PCN). This notation provides a single-assignment programming model that permits concurrent-programming concerns such as decomposition, communication, synchronization, mapping, granularity, and load balancing to be addressed separately in a design. PCN is also extensible with programmer-defined operators , allowing common abstractions to be encapsulated and reused in different contexts. The compilation system incorporates a concurrent-transformation system that allows abstractions to be defined through concurrent source-to-source transformations; these convert programmer-defined operators into a core notation. Run-time techniques allow the core notation to be compiled into a simple concurrent abstract machine which can be implemented in a portable fashion using a run-time library. The abstract machine provides a uniform treatment of single-assignment and mutable data structures, allowing data sharing between concurrent and sequential program segments and permitting integration of sequential C and Fortran code into concurrent programs. This compilation system forms part of a program development toolkit that operates on a wide variety of networked workstations, multicomputers, and shared-memory multiprocessors. The toolkit has been used both to develop substantial applications and to teach introductory concurrent-programming classes, including a freshman course at Caltech.

Compiling machine-independent parallel programs

Initial evidence is presented that explicitly parallel, machine-independent programs can automatically be translated into parallel machine code that is competitive in performance with hand-written code.The programming language used is Modula-2*, an extension of Modula-2, which incorporates both data and control parallelism in a portable fashion. An optimizing compiler targeting MIMD, SIMD, and SISD machines translates Modula-2* into machine-dependent C code.The performance of the resulting code is compared to that of equivalent, carefully hand-coded and tuned prograins. On a MasPar MP-1 (SIMD machine with up to 16k processors) the Modula-2* programs typically achieve 80% of the performance of the hand-coded parallel versions. When targeting sequential processors, the Modula-2* programs reach 90% of the performance of hand-coded sequential C. (There are no MIMD results yet.)The effects of two major optimization techniques, synchronization point elimination and data/process alignment are also quantified.