This paper concerns a PLL design operating at 2.45 GHz and a method for checking frequency and phase errors over time. During the design process, the design method had a natural frequency (ωn) of 33,800 rad/s and a damping ratio (ζ) of 0.53 according to a generally known method of designing a Type-II PLL. Owing to production, when the PLL of VCO(voltage controlled oscillator) was added, phase noise decreased by 22 dB and 58 dB at 10 kHz and 150 kHz offset, respectively. In the experimental stage of the characteristics, the result of calculating the interval between the peak points of the initial frequency error in the circuit designed using MATLAB program was 100 μs, and a similar result was obtained when the measurement was taken using an oscilloscope. It was assumed that the highest point of the output frequency was 2.5 GHz through the change of the tuning voltage measured using the oscilloscope, and it was verified by using mixer that a maximum output frequency was 2.504 GHz. Additionally, for the compensation of the phase error at the comparison frequency, we obtained values of 12.7° and 8.93° using an oscilloscope and a PSpice, respectively, after fixing the frequency. The error between the two measurements was 29.7 %, and it was determined to be due to approximation in the integration process and the fluctuation of the tuning voltage.