To improve the phase noise of a ring voltage-controlled oscillator (VCO), we describe two 1/ f-noise reduction techniques, which are a switched bias circuit (SBC) and a current source (CS) operating in the triode region. The ring VCO utilizing the 1/ f-noise reduction techniques was fabricated by 0.18-µm complementary metal–oxide–semiconductor (CMOS) technology, and it achieved 1 GHz oscillation, -68 dBc/Hz at a 100 kHz offset, and 710 µW power dissipation using a 1 V power supply. The proposed SBC and the CS operating in the triode region reduced the phase noise of the ring VCO by 3 and 7 dB, respectively. A phase-locked loop (PLL) implemented by the proposed ring VCO achieved 1 GHz oscillation, a -171 dBc/Hz figure of merit (FOM), and 1.2 mW power dissipation at a supply voltage of 1 V.