Phase-locked Loop System Research Articles

Finite-time sliding mode power control of grid-connected three-phase photovoltaic array

A new direct power control formulation for the voltage source converter (VSC) in a grid-connected photovoltaic (PV) array is discussed in this paper. Instead of controlling the direct- and quadrature-axis currents of the VSC through the use of a phase-locked loop system (PLL), the instantaneous real- and reactive-power components are used as control variables. This approach, therefore, does not take into account the unmodelled dynamics of the PLL resulting in a robust control of the active, reactive powers while maintaining the photovoltaic (PV) array voltage at a constant value. Further, the stability of the grid-connected PV array is enhanced by designing a Lyapunov’s function-based finite-time non-linear reactive power and dc-link voltage controller, which essentially uses the terminal sliding mode approach. To prove the robustness of the proposed approach, several system disturbances like changes in solar insolation and active and reactive power references, islanding conditions, converter parametric changes, and faults on the converter and inverter buses are considered. In all these cases, the new controller is found to enhance overall system stability in comparison to the inferior performance by the proportional-integral controller

Bimodal magnetic force microscopy with capacitive tip-sample distance control

A single-passage, bimodal magnetic force microscopy technique optimized for scanning samples with arbitrary topography is discussed. A double phase-locked loop system is used to mechanically excite a high quality factor cantilever under vacuum conditions on its first mode and via an oscillatory tip-sample potential on its second mode. The obtained second mode oscillation amplitude is then used as a proxy for the tip-sample distance, and for the control thereof. With appropriate z-feedback parameters, two data sets reflecting the magnetic tip-sample interaction and the sample topography are simultaneously obtained.

Design of Low Power, High Gain PLL using CS-VCO on 180nm Technology

This paper investigates the design and performance of the PLL (Phase Locked Loop). The proposed PLL designed with PFD (Phase Frequency Detector), CP (Charge Pump), first order Low Pass Filter and CS-VCO (Current Starved-Voltage Control Oscillator), in this paper the designed PFD used for proposed PLL is free from dead zone. The VCO used for the designed PLL shows larger tuning range and high gain as compares to previous work, i.e. tuning range (167MHz – 1.711GHz) and VCO gain (2.21GHz/V or 13.875*10 radians/s*V). In the proposed work, the designed PLL has higher pull-in range 950MHz (50MHz – 1GHz) with maximum jitter 9.8ps. Power dissipation for proposed PLL system is low, i.e. 277.2 μW with maximum pull-in time is 265ns at 1GHz. The proposed PLL circuit is implemented on CADENCE UMC0.18um process technology file with supply voltage 1.8V. All simulations are done using cadence spectre simulator.

English

This paper describes a design of phase locked loop system with low power and minimum jitter. PLLs with high speed, low noise and wide bandwidth with fast acquistion time are preferred. A PFD with low dead zone, charge pump with passive low pass filter and a low noise, wide tuning VCO are integrated in the PLL system. A Telescopic OTA based VCO with wide tuning range of 450MHz to 1.9GHz and power consumption of 0.30mW is designed.. The PFD modeled is using 15 transistor and conventional charge pump with second order loop filter is used. Integrating this VCO in a PLL system offers low jitter and wide bandwidth. The results prove that maximum pull-in time is 150ns and the power consumed by this PLL system is 606uW at 1.5GHz.Measured jitter is 30ps in this PLL.

Femtosecond fibre laser stabilisation to an optical frequency standard using a KTP electro-optic crystal

A miniature intracavity KTP-based electro-optic phase modulator has been developed which can be used for effective stabilisation of an optical frequency comb of a femtosecond erbium-doped fibre laser to an optical frequency standard. The use of such an electro-optic modulator (EOM) has made it possible to extend the working frequency band of a phase-locked loop system for laser stabilisation to several hundred kilohertz. We demonstrate that the KTP-based EOM is sufficiently sensitive even at a small optical length, which allows it to be readily integrated into cavities of femtosecond fibre lasers with high mode frequency spacings (over ).

Enhancing the Frequency Adaptability of Periodic Current Controllers with a Fixed Sampling Rate for Grid-Connected Power Converters

Grid-connected power converters should employ advanced current controllers, e.g., proportional resonant (PR) and repetitive controllers (RC), in order to produce high-quality feed-in currents that are required to be synchronized with the grid voltage. The synchronization is actually to detect the instantaneous grid information (e.g., frequency and phase of the grid voltage) for the current control, which is commonly performed by a phase-locked loop (PLL) system. Hence, harmonics and deviations in the estimated frequency by the PLL could lead to current tracking performance degradation, especially for the periodic signal controllers (e.g., PR and RC) with a fixed sampling rate. In this paper, the impacts of frequency deviations induced by the PLL and/or the grid disturbances on the selected current controllers are investigated by analyzing the frequency adaptability of these current controllers. Subsequently, strategies to enhance the frequency adaptability of the current controllers are proposed for the power converters to produce high-quality feed-in currents even in the presence of grid frequency deviations. Specifically, by feeding back the PLL estimated frequency to update the center frequencies of the resonant controllers and by approximating the fractional delay using a Lagrange interpolating polynomial for the RC, respectively, the frequency-variation-immunity of these periodic current controllers with a fixed sampling rate is improved. Experiments on a single-phase grid-connected system are presented, which have verified the discussions and the effectiveness of the frequency adaptive current controllers.

Raman coupling in atomic Bose-Einstein condensed with phase-locked laser system

We present a simple, versatile and reliable phase-locked laser system. The system consists of an external cavity diode laser, Ti: Sapphire laser, fast detector, phase frequency detector (PFD) and loop filters. The beat signal of the laser is detected with a detector. From the PFD, we can obtain an error signal. The loop filter converts the output of the PFD into a control voltage and thus drives piezoelectric ceramic transducer (PZT) and current of diode laser. After locking, the bandwidth of the beat signal is reduced form MHz to Hz. So the line-width of the diode laser is almost close to that of Ti: Sapphire laser. The locking range is from sub-MHz to 10 GHz. So it is used for the ground hyperfine state transition of 87Rb. Through the use of the phase-locked loop system, we can drive the transition of 87Rb atoms between two ground hyperfine states F=2 and 1. The system is used to demonstrate Raman transition between two states through changing the detuning of the beat signal. From this, we can obtain Rabi frequency = 10 kHz. So, this system can be used to induce an effective vector gauge potential for 87Rb Bose-Einstein condensed and realize the spin-orbit coupling.

Ring voltage controlled oscillator for high-speed PLL systems

A circuit of a ring voltage controlled oscillator (VCO), which is to be used in high-speed phase-locked loop (PLL) systems integrated into programmable logic integrated circuits, is proposed. The maximum operating frequency of a VCO in 180 nm CMOS is shown by simulation to be able to reach 2 GHz in all operating conditions with the phase noise being −99 dB/Hz and detuning frequency being 1 MHz.

A 65nm CMOS low-power MedRadio-band integer-N cascaded phase-locked loop for implantable medical systems.

This paper presents a low-power MedRadio-band integer-N phase-locked Loop (PLL) system which is composed of two charge-pump PLLs cascade connected. The PLL provides the operation clock and local carrier signals for an implantable medical electronic system. In addition, to avoid the off-chip crystal oscillator, the 13.56 MHz Industrial, Scientific and Medical (ISM) band signal from the wireless power transmission system is adopted as the input reference signal for the PLL. Ring-based voltage controlled oscillators (VCOs) with current control units are adopted to reduce chip area and power dissipation. The proposed cascaded PLL system is designed and implemented in TSMC 65-nm CMOS technology. The measured jitter for 216.96 MHz signal is 12.23 ps and the phase noise is -65.9 dBc/Hz at 100 kHz frequency offset under 402.926 MHz carrier frequency. The measured power dissipations are 66 μW in the first PLL and 195 μW in the whole system under 1-V supply voltage. The chip area is 0.1088 mm(2) and no off-chip component is required which is suitable for the integration of the implantable medical electronic system.

Coloured Noise Analysis of a Phase-Locked Loop System: Beyond Itô and Stratonovich Stochastic Calculi

The phase-locked loop (PLL) system is an appealing electronic circuit that synchronizes oscillator output signal with the reference signal. In theoretical studies, it is revealed that the PLL system fails to achieve the locking condition in the presence of small noise influences. For this reason, it is reasonable to accomplish noise analysis of the PLL system. In this paper, we accomplish the PLL noise analysis in coloured noise framework that is more general as well as confirms the real noise statistics in contrast to the white noise. The extended phase space and stochastic differential rules for the random state vector satisfying vector stochastic differential equation are exploited to accomplish the PLL coloured noise analysis. It is worthwhile to mention that the three concepts, non-linearity, stochasticity, multi-dimensionality, received attentions in applied mathematics literature. However, applications of these three mathematical concepts to engineering problems are relatively very scarce. More precisely, this paper accounts for non-linearity, non-Markovian stochasticity as well as multi-dimensionality in the noise analysis of the PLL dynamics. Since the non-linearity, multi-dimensionality are ubiquitous in real physical systems as well as stochasticity will set future research directions in applied mathematics, systems and control, this paper will have lasting influence on future stochastic problems.

A phase-locked loop with background self-calibration for phase error reduction

The proposed phase-locked loop system constructs with the current-mismatch adjusting circuit reduces the static phase error. The proposed current-mismatch adjusting circuit uses a time amplifier circuit to enlarge the phase error between the Up and Dn pulses. The digital code from the current mismatch adjusting circuit calibrates the charge current in the charge pump. The circuit is fabricated in a 0.35 μm CMOS process with 3.3 V supply voltage. The measured static phase error without and with current-mismatch adjusting circuit is 65.41 and 3.44ps, respectively.

Non-contact bimodal magnetic force microscopy

A bimodal magnetic force microscopy technique optimized for lateral resolution and sensitivity for small magnetic stray fields is discussed. A double phase-locked loop (PLL) system is used to drive a high-quality factor cantilever under vacuum conditions on its first mode and simultaneously on its second mode. The higher-stiffness second mode is used to map the topography. The magnetic force is measured with the higher-sensitivity first oscillation mode.

A Digitally Assisted Amplitude Calibration Technique for Phase-Locked Loop Systems

A digitally assisted amplitude calibration technique suitable for wideband phase-locked loops (PLLs) is presented in this paper. By operating the voltage-controlled oscillator in the current-limited region with a tunable bias scheme, an amplitude control mechanism is incorporated in the PLL system for performance optimization. Due to the use of a sequential search algorithm for amplitude calibration, the risk of locking failure is alleviated while maintaining a reasonable settling time. Using a 65-nm CMOS process, a 5-GHz wideband PLL with the proposed amplitude calibration is fabricated for a demonstration. Within the phase-locked frequency range from 4.6 to 6 GHz, the experimental results indicate output power variations of less than 2 dB as the calibration function is activated. Operating at an output frequency of 5 GHz, the measured output power and phase noise at 1-MHz offset frequency are -3.63 dBm and -105.8 dBc/Hz, respectively.

IMPROVED PERFORMANCE PHASE DETECTOR FOR MULTIPLICATIVE SECOND-ORDER PLL SYSTEMS USING DEFORMED ALGEBRA

Phase-locked loops (PLL) is a phase and/or frequency tracking system, widely used in communication and control systems. The sinusoidal multiplicative type PLL still remains a recurrent model, due the fact that its derivation is originated from the maximum likelihood approach. In this note, it is showed as a generalized product, called q-product, which can be used to implement the phase detector and improve some important parameters of the PLL system, as the block linearity and pull-in characteristics. Numerical examples are presented in order to illustrate the proposal.

Demonstration of an ultrahigh-sensitivity atom-interferometry absolute gravimeter

We present an ultrahigh-sensitivity gravimeter based on an ${}^{87}$Rb atom interferometer using stimulated Raman transitions. Compared with our previous work, a two-dimensional magneto-optical trap is added in the new gravimeter to increase the atom number and improve the detection signal-to-noise ratio, and a better optical phase-locked loop system is used to reduce the phase noise of Raman beams. Benefiting from these efforts and the excellent performance of the active vibration isolator, a short-term sensitivity of about 4.2 $\ensuremath{\mu}\text{Gal}/\sqrt{\text{Hz}}$ ($1\phantom{\rule{4pt}{0ex}}\ensuremath{\mu}\mathrm{Gal}=1\ifmmode\times\else\texttimes\fi{}{10}^{\ensuremath{-}8}$ $\text{m}/{\text{s}}^{2}$) is reached, which improves the sensitivity by a factor of 2 compared with the former best reported value. By a modulation experiment, we further indicate that the residual vibration noise contribution is about 1.2 $\ensuremath{\mu}\text{Gal}/\sqrt{\text{Hz}}$, which implies a possible improvement over the present absolute gravity measurement level by about one order of magnitude. Moreover, we demonstrate a calibration experiment to directly evaluate the sub-$\ensuremath{\mu}$Gal resolution of our gravimeter.

Neuron-like dynamics of a phase-locked loop

Dynamics of two coupled phase-controlled generators based on phase-locked loop systems with a high frequency filter in the control loop was studied. It was found that beating modes are synchronized in the systems and shown that different synchronization states form an overlapping structure in parameters space of the coupled systems. Usage of the phase-locked loop as a neuron-like element is proposed.

Fourier-Based PLL Applied for Selective Harmonic Estimation in Electric Power Systems

In this paper, the Fourier-based PLL (Phase-locked Loop) is introduced with a new structure, capable of selective harmonic detection in single and three-phase systems. The application of the FB-PLL to harmonic detection is discussed and a new model applicable to three-phase systems is introduced. An analysis of the convergence of the FB-PLL based on a linear model is presented. Simulation and experimental results are included for performance analysis and to support the theoretical development. The decomposition of an input signal in its harmonic components using the Fourier theory is based on previous knowledge of the signal fundamental frequency, which cannot be easily implemented with input signals with varying frequencies or subjected to phase-angle jumps. In this scenario, the main contribution of this paper is the association of a phase-locked loop system, with a harmonic decomposition and reconstruction method, based on the well-established Fourier theory, to allow for the tracking of the fundamental component and desired harmonics from distorted input signals with a varying frequency, amplitude and phase-angle. The application of the proposed technique in three-phase systems is supported by results obtained under unbalanced and voltage sag conditions.

An Overview of Charge Pump for Phase Lock Loop System for High Frequency Application.

Phase lock loop is fundamental buliding block of modern communication system. Phase lock loop are typically used to provide local oscillator function in radio reciver or transmitter. The design methodology and test result of charge pump structure for phase lock loop application are presented. The structure is composed to two charge/ discharge block. This paper provides study of various charge pump and discuss the technology that is used to design charge pump.

A novel approach for phase locked loop modelling using MATLAB

This research aims at the special needs of phase locked loops (PLLs) for a typical application with FACTS devices. An adaptive PLL system comprising of three independent control units i.e. frequency, phase angle and voltage magnitude has been proposed. The output angle is used to generate the synchronised pulses for thyristors in FACTS devices which control the operation of these devices. The proposed controller reduces the phase and frequency error efficiently. The stability of the system is also increased even transient disturbances occurred in the system. In this paper, the design of proposed adaptive PLL is suggested using MATLAB, Simulink as a simulation tool. The total harmonics distortion are calculated in case a fault occurs in the system and compared with that of the system without any fault. The simulation results are simulated using MATLAB block-set and noticeable improvements are discussed.

Spur-Reduction Frequency Synthesizer Exploiting Randomly Selected PFD

This brief presents a low-spur phase-locked loop (PLL) system for wireless applications. The low-spur frequency synthesizer randomizes the periodic ripples on the control voltage of the voltage-controlled oscillator to reduce the reference spur at the output of the PLL. A novel random clock generator is presented to perform the random selection of the phase frequency detector control for the charge pump in locked state. The proposed frequency synthesizer was fabricated in a TSMC 0.18-μm CMOS process. The proposed PLL achieved phase noise of -93 dBc/Hz with a 600-kHz offset frequency and reference spurs below -72 dBc.