Real-time Operating System Research Articles

A topological framework for real-time 3D weather radar data processing

ABSTRACT Real-time 3D weather radar data processing makes it possible to efficiently simulate meteorological processes in digital Earth and support the assessment of meteorological disasters. The current real-time meteorological operation system can only deal with radar data within 2D space as a flat map and lacks supporting 3D characteristics. Thus, valuable 3D information imbedded in radar data cannot be completely presented to meteorological experts. Due to the large amount of data and high complexity of radar data 3D operation, regular methods are not competent for supporting real-time 3D radar data processing and representation. This study aims to perform radar data 3D operations with high efficiency and instant speed to provide real-time 3D support for the meteorological field. In this paper, a topological framework composed of basic inner topological objects is proposed along with the quadtree structure and LOD architecture, based on which 3D operations on radar data can be conducted in a split second and 3D information can be presented in real time. As the applications of the proposed topological framework, two widely used 3D algorithms in the meteorological field are also implemented in this paper. Finally, a case study verifies the applicability and validity of the proposed topological framework.

Gait Phase Classification for a Lower Limb Exoskeleton System Based on a Graph Convolutional Network Model

This article presents a graph convolutional network model (GCNM) for gait phase classification to control a lower limb exoskeleton. The GCNM can recognize four leg phases between the foot and ground, including heel strike, foot flat, heel off, and swing. The proposed model can solve the gait phase classification problem from non-Euclidean domain based on a graph mechanism for exoskeletons. Real-time performance of the gait data acquisition system was then verified on a lower limb exoskeleton. The system quantifies the time delay with an optoelectronic system, VICON BONITA 10. Comparison works with some existing state-of-the-art methods from the Euclidean domain, i.e., long short-term memory (LSTM) and deep convolutional neural network (DCNN), were also provided. Experimental works show that the proposed model has a significantly higher prediction accuracy and better robustness in gait phase classification for different people in level, uphill, and downhill environments. Moreover, the label rate is under <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${\rm {10}}{\rm {\% }}$</tex-math></inline-formula> , compared to LSTM and DCNN, which are usually at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${\rm {70}}$</tex-math></inline-formula> – <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${\rm {80}}{\rm {\% }}$</tex-math></inline-formula> . Finally, the GCNM's maximum accuracy of gait phase classification is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${\rm {97}}{\rm {.43\% }}$</tex-math></inline-formula> ; thus, the effectiveness of the proposed model is verified.

Parallelised Multithreaded Applications on a 4-core Field Programmable Gate Array (FPGA) Architecture

Abstract:The challenges in real-time multithreading, particularly in the efficiency of multithreaded applications running concurrently on multiple cores, have evolved significantly due to the increase in IoT, cloud and edge computing applications. The continuous increase in cores depth adds further research issues related to the efficiency of such multicore systems and their applications. Therefore, further research is still required.Background:Multicore systems can achieve higher performance running in parallel multiple multithreaded applications. However, efficient parallelisation of multiple threads among many cores is not an easy task. Field Programmable Gate Arrays (FPGAs) is a preferred technology for the rapid design and experimentation with such architectures, based primarily on softcore processors.Objective:The purpose of this research is to investigate the efficiency of running in parallel and concurrently multithreaded applications on a 4-core FPGA multicore architecture.Methods:The design of a 4-core FPGA architecture is implemented with Nios II/f soft processors on a Cyclone IV series chip, having real-time Linux operating system (OS) support. A multithreaded application with specific compute-intensive tasks is developed in C, and is used to obtain measurements in specific efficiency metrics under different core configurations.Results:The reliability of the proposed 4-core FPGA architecture is validated against 4-core and 2- core development platforms, respectively, on Raspberry Pi4 and BeagleBone AI single board computers. The results have been analysed and evaluated upon performance metrics, including execution time, response time, speedup, and cores usage. The experimental tests demonstrate the validity and efficiency of the approach to using FPGA for experimentations with multithreaded applications.Conclusion:The obtained results show that the proposed FPGA architecture stands well both in terms of timing and efficiency metrics. Execution times are about 50% lower, and the average speedup at 21% is fairly close to that of 33% for the Raspberry Pi4, and higher than BeagleBone AI (10%). The proposed measurements approach and evaluation methodology could benefit the design and development of real-time systems utilizing operating systems with real-time support in emerging areas, such as embedded devices in real-time control.

S-CAM: An Untethered Insertable Laparoscopic Surgical Camera Robot with Non-Contact Actuation

Fully insertable robotic imaging devices represent a promising future of minimally invasive laparoscopic vision. Emerging research efforts in this field have resulted in several proof-of-concept prototypes. One common drawback of these designs derives from their clumsy tethering wires which not only cause operational interference but also reduce camera mobility. In this paper, a tetherless insertable surgical camera (s-CAM) robot with non-contact transabdominal actuation is presented for single-incision laparoscopic vision. Wireless video transmission and control communication using onboard power help eliminate cumbersome tethering wires. Furthermore, magnetic based camera actuation gets rid of intrinsic physical constraints of mechanical driving mechanisms, thereby improving camera mobility and reducing operational interference. In addition, a custom Bluetooth low energy (BLE) application profile and a real-time operating system (RTOS) based multitask programming framework are also proposed to facilitate embedded software design for insertable medical devices. Initial ex vivo test results of the s-CAM design have demonstrated technical feasibility of a tetherless insertable laparoscopic camera. Effective imaging is confirmed at as low as 500 lx illumination. Wireless laparoscopic vision is accessible within a distance of more than 10 m. Transabdominal BLE communication is stable at over −52 dBm and shows its potential for wireless control of insertable medical devices. RTOS based sfotware event response is bounded within 1 ms while the CPU usage is at 3∼5%. The device is able to work for 50 min with its onboard power. For the mobility, the robot can translate against the interior abdominal wall to reach full abdomen quadrants, tilt between −180 and +180, and pan in the range of 0∼360. The s-CAM has brought robotic laparoscopic imaging one step further toward less invasiveness and more dexterity.

Development of main functional modules for MVB and its application in rail transit

Abstract In this work, multi-function vehicle bus (MVB) controller-based Field Programmable Gate Array (FPGA) and MVB manager based on the real-time multitasking operating system were explored and developed. The function of the MVB controller data link layer was realised by using FPGA. The embedded real-time multitasking operating system uCOS-II was applied to the development of MVB manager’s processing data, device state management, message data and bus management function. The network consistency test was performed to validate data communication of MVB link layer control protocol and the management function of MVB manager; the equipment was shown to be compatible with each other and met the requirements of IEC61375-1.

Characterization of Sampled Value Streams in Non Real-Time Calibration Systems

The digital transformation of electrical substations relies on the communication protocols introduced in the IEC Std 61850. In particular, the Sampled Value data format is expected to be employed in an ever-increasing number of measurement applications and devices. In this context, National Metrological Institutes are required to develop calibration infrastructures capable of dealing with synchronous analog and digital input and output channels. In this paper, we characterize the performance of the METAS calibrator in terms of transmission latency and publishing rate stability. In particular, we discuss the feasibility of meeting the stringent requirements of meterological applications even in a non real-time operating system. To this end, an enhanced software library and measurement procedure are introduced. The proposed results confirm the quasi-deterministic behavior of the calibrator and proves its refined precision and stability with respect to commercial devices.

Design of Embedded Ai Engine Based on the Microkernel Operating System

At present, the application of the embedded microkernel operating system in military and civil fields has begun to take shape, but it has not yet formed a unified method and standard. Due to its high performance, low frequency, and high reliability, dual-core embedded processors are getting the attention of many chip manufacturers. Compatibility has been favored by many telecom equipment manufacturers and embedded high-end application integrators, but the dual-core embedded processor needs a new real-time operating system to support it, so that it can give full play to the high performance of the dual-core. It paves the way for the application of its processor in the embedded field, but the design of embedded AI engine is not transparent to it; so, it needs the support of operating system. The user code is used to be in the operating system processor environment; so, it can be used on dual core processor first. In the real-time operating system that supports dual-core processors, the part that needs to be modified is mainly concentrated in the kernel part; so, the core design is the key point to support dual-core processors. This article is to seize this key point to carry out in-depth research. The difference and influence of hardware architecture between dual-core processor and single-core processor are the primary content of the study. Through the research of the dual-core processor architecture, the general abstraction of the dual-core processor architecture is obtained, which is the starting point of the follow-up research. This paper mainly studies the design of embedded AI engine based on the microkernel operating system, extracts the security requirements of the operating system, designs and implements the operating system from the perspective of formal verification, and considers the verification problem under the background of RTOS development, so as to avoid using too many complex data structures and algorithms in the system design and reduce the difficulty of experimental verification. In this paper, we use the spatiotemporal data model, data sharing security in the cloud environment, symmetric encryption scheme, and Paillier homomorphic encryption method to study the design of embedded AI engine based on the microkernel operating system. According to the idea of microkernel architecture, the kernel is divided into four main modules: task processing, semaphore, message queue, interrupt, and exception processing, and the lock mechanism to prevent reentrancy in software is analyzed separately. Three core function modules, initialization, process grinding, and interrupt processing, are extracted from the microkernel operating system to form the formal verification area of the operating system. At the same time, the system syntax and semantics of related rights are separated, and the main rationalization rules are described. The results show that the core of the microkernel operating system in five states adopts the microkernel architecture in the dual core environment. The microkernel architecture is a compact system kernel with good adjustability. Based on the analysis of the microkernel operating system, the internal structure of each module in the kernel is summarized, and the modules are modified according to the machine characteristics of the dual core processor; it corresponds to adding modules to meet the characteristics of dual core architecture. Kernel design is a systematic theoretical research process. This paper only uncovers the tip of the iceberg of real-time operating system kernel design on dual-core embedded processors. It is necessary to understand the kernel more deeply and master the kernel in the future work and study.

Configurable Test System for RTOS of BAGET Family

The article describes a test system designed for verification of the real-time operating system BAGET Family for embedded systems, developed and used at the Scientific Research Institute for System Analysis of the Russian Academy of Sciences (SRISA RAS). This Unix-like operating system is based on the POSIX and ARINC-653 pro­gramming standards. Of course, there is specialized software for automating testing of Unix-like operating systems, for example, Avocado, LAVA, Linux Test Project, Linux Distribution Checker, Open POSIX Test Suite, UnixBench, etc. But the use of such ready-made software systems is not always convenient since they either contain only highly specialized test suites, support only specific hardware, or do not contain a flexible configuration system. Therefore, In SRISA RAS, its own original test system was developed. The task was to create a convenient testing tool for both software testers and programmers. Many years of experience in utilizing the test system has shown the effectiveness of its use to improve the quality of software products, reduction of time spent on testing and analysis of results, maximum automation of software testing process, speed up the process of developing new software versions, as well as simplify the process of debugging, finding and fixing errors by software developers.

Performance optimization of fuel cell hybrid power robot based on power demand prediction and model evaluation

In order to improve the stability, real-time performance and economy of the proton exchange membrane fuel cell (PEMFC) hybrid welding robot system, the system energy optimization was studied by comprehensive performance evaluation and random forest prediction method. On the basis of rule partition, the optimal control strategy was designed based on entropy weight method and cloud model comprehensive performance evaluation method; The random forest prediction method was put into the energy management system, and the model parameters with the least mean square error were determined by particle swarm optimization, and the load power of the robot is predicted. Finally, the evaluation results are applied to the predicted power to further optimize and improve the performance of the hybrid power welding robot system. The experimental results show that the stability of fuel cell power output based on the optimization strategy in this paper is improved by 11.26%, and the hydrogen consumption is reduced by 3.24%. The experimental results show that the energy optimization strategy can not only ensure the high precision and real-time performance of the welding robot system, but also improve the stability and energy economy of the hybrid welding robot system, and reduce the energy consumption.

A parallel implementation on a multi-core architecture of a dynamic programming algorithm applied in cognitive radio ad hoc networks

Spectral resources allocation is a major problem in cognitive radio ad hoc networks and currently most of the research papers use meta-heuristics to solve it. On the other side, the term parallelism refers to techniques to make programs faster by performing several computations in parallel. Parallelism would be very interesting to increase the performance of real-time systems, especially for the cognitive radio ad hoc networks that interest us in this work. In this paper, we present a parallel implementation on a multi-core architecture of dynamic programming algorithm applied in cognitive radio ad hoc networks. Our simulations approve the desired results, showing significant gain in terms of execution time. The main objective is to allow a cognitive engine to use an exact method and to have better results compared to the use of meta-heuristics.

Queuing Ports for Mesh Based Many-Core Processors

This paper presents the implementation of Queuing Ports, a blocking communication protocol developed for manycore architectures that perform a synchronized communication between cores without the need of polling. This implementation has been performed on M2OS-mc, a Real- Time Operating System (RTOS) that has already been tested in the Epiphany processor. The extension presented is based on the ARINC-653's Queuing Port communication primitive and gives an alternative to the implementation based in the ARINC-653's Sampling Port communication primitive previously developed.1

Design and Experimental Research of Portable Extracorporeal Circulation Pipeline Performance Testing System

Aiming at the current situation of performance testing of hemodialysis extracorporeal circulation tubing, which has slow efficiency, inaccurate measurement, and inconvenient testing, a portable detection system for testing the performance of hemodialysis extracorporeal circulation tubing is designed. The system mainly includes a hardware system and a software system. The hardware system uses STM32F407 single-chip microcomputer as the core to design the driving control of the roller pump; the software system uses the C++ real-time operating system, and the flow detection data is transmitted to the upper computer through RS485 communication and displayed. Experimental showed that the system detects the accuracy and the stability of the flow rate. It has the characteristics of stability and high precision. The relative error of the experimental measurement is within the range of ±10%. The weight of the whole machine is 2 kg, which improves the efficiency by 50% compared with the traditional detection method.

LHC physics dataset for unsupervised New Physics detection at 40\u2009MHz

In the particle detectors at the Large Hadron Collider, hundreds of millions of proton-proton collisions are produced every second. If one could store the whole data stream produced in these collisions, tens of terabytes of data would be written to disk every second. The general-purpose experiments ATLAS and CMS reduce this overwhelming data volume to a sustainable level, by deciding in real-time whether each collision event should be kept for further analysis or be discarded. We introduce a dataset of proton collision events that emulates a typical data stream collected by such a real-time processing system, pre-filtered by requiring the presence of at least one electron or muon. This dataset could be used to develop novel event selection strategies and assess their sensitivity to new phenomena. In particular, we intend to stimulate a community-based effort towards the design of novel algorithms for performing unsupervised new physics detection, customized to fit the bandwidth, latency and computational resource constraints of the real-time event selection system of a typical particle detector.

Evaluation system of college physical education teaching reform based on wireless sensor network

The traditional evaluation system of physical education reform in colleges and universities is usually designed with I/O module. This evaluation system is not real-time and it is difficult to meet the requirements of many evaluation indexes. In order to solve the problem of weak anti-interference and real-time performance of the evaluation system, this paper designs the evaluation system of College Physical Education Reform Based on wireless sensor network from two aspects of hardware design and software design. The hardware part mainly designs the evaluation interface, evaluation circuit, processor and display; The software part analyzes the principle of software evaluation, develops a new evaluation system and a new software evaluation process, and completes the work through three steps: communication information collection, communication information evaluation processing and information display. Compared with the traditional system, the experimental results show that the system can complete the accurate evaluation in a short time, and can quickly transmit the evaluation results to the LCD, which has strong real-time performance, effectively solves the problem of long delay in the traditional system, ensures the evaluation effect, and improves the quality of teaching reform.

Parallel Optimisation and Implementation of a Real-Time Back Projection (BP) Algorithm for SAR Based on FPGA.

This study conducts an in-depth evaluation of imaging algorithms and software and hardware architectures to meet the capability requirements of real-time image acquisition systems, such as spaceborne and airborne synthetic aperture radar (SAR) systems. By analysing the principles and models of SAR imaging, this research creatively puts forward the fully parallel processing architecture for the back projection (BP) algorithm based on Field-Programmable Gate Array (FPGA). The processing time consumption has significant advantages compared with existing methods. This article describes the BP imaging algorithm, which stands out with its high processing accuracy and two-dimensional decoupling of distance and azimuth, and analyses the algorithmic flow, operation, and storage requirements. The algorithm is divided into five core operations: range pulse compression, upsampling, oblique distance calculation, data reading, and phase accumulation. The architecture and optimisation of the algorithm are presented, and the optimisation methods are described in detail from the perspective of algorithm flow, fixed-point operation, parallel processing, and distributed storage. Next, the maximum resource utilisation rate of the hardware platform in this study is found to be more than 80%, the system power consumption is 21.073 W, and the processing time efficiency is better than designs with other FPGA, DSP, GPU, and CPU. Finally, the correctness of the processing results is verified using actual data. The experimental results showed that 1.1 s were required to generate an image with a size of 900 × 900 pixels at a 200 MHz clock rate. This technology can solve the multi-mode, multi-resolution, and multi-geometry signal processing problems in an integrated manner, thus laying a foundation for the development of a new, high-performance, SAR system for real-time imaging processing.

A Library for fMRI Real-Time Processing Systems in Python (RTPSpy) With Comprehensive Online Noise Reduction, Fast and Accurate Anatomical Image Processing, and Online Processing Simulation.

Real-time fMRI (rtfMRI) has enormous potential for both mechanistic brain imaging studies or treatment-oriented neuromodulation. However, the adaption of rtfMRI has been limited due to technical difficulties in implementing an efficient computational framework. Here, we introduce a python library for real-time fMRI (rtfMRI) data processing systems, Real-Time Processing System in python (RTPSpy), to provide building blocks for a custom rtfMRI application with extensive and advanced functionalities. RTPSpy is a library package including (1) a fast, comprehensive, and flexible online fMRI image processing modules comparable to offline denoising, (2) utilities for fast and accurate anatomical image processing to define an anatomical target region, (3) a simulation system of online fMRI processing to optimize a pipeline and target signal calculation, (4) simple interface to an external application for feedback presentation, and (5) a boilerplate graphical user interface (GUI) integrating operations with RTPSpy library. The fast and accurate anatomical image processing utility wraps external tools, including FastSurfer, ANTs, and AFNI, to make tissue segmentation and region of interest masks. We confirmed that the quality of the output masks was comparable with FreeSurfer, and the anatomical image processing could complete in a few minutes. The modular nature of RTPSpy provides the ability to use it for a simulation analysis to optimize a processing pipeline and target signal calculation. We present a sample script for building a real-time processing pipeline and running a simulation using RTPSpy. The library also offers a simple signal exchange mechanism with an external application using a TCP/IP socket. While the main components of the RTPSpy are the library modules, we also provide a GUI class for easy access to the RTPSpy functions. The boilerplate GUI application provided with the package allows users to develop a customized rtfMRI application with minimum scripting labor. The limitations of the package as it relates to environment-specific implementations are discussed. These library components can be customized and can be used in parts. Taken together, RTPSpy is an efficient and adaptable option for developing rtfMRI applications.Code available at: https://github.com/mamisaki/RTPSpy

Steel Plate Defect Recognition of Deep Neural Network Recognition Based on Space-Time Constraints

In order to improve the effect of real-time defect recognition in steel plate online production, this paper studies the method of steel plate defect recognition based on the deep neural network algorithm based on space-time constraints. Moreover, this paper improves the space-time constraint algorithm, optimizes the encryption structure of the traditional ABE scheme, and obtains a neural network feature recognition method based on space-time constraints. In order to process the massive image data stream generated instantaneously and ensure the real-time performance, accuracy, and stability of the detection system, this paper constructs a distributed parallel computing system structure based on the client/server (CC/S) model to obtain an intelligent recognition system. Through experimental research, it can be seen that the deep neural network recognition system based on space-time constraints proposed in this paper has a good effect in the recognition of steel plate defects.

A Distributed Real-Time Transcoding CDN System Design and Performance Simulation Study.

Content Delivery Network (CDN) technology is one of the core technologies for performance optimization of mobile WEB applications, but it often encounters bottlenecks in video storage. In this paper, based on studying the basic technical model of distributed real-time transcoding CDN, we propose an overall technical architecture of a distributed real-time transcoding CDN system, present the business process of distributed real-time transcoding CDN resource negotiation in the model, design a resource storage policy model and algorithm, including the hot storage ratio resource storage value evaluation method and storage resource allocation algorithm. Through simulation experiments, we verify the technical efficiency of the distributed real-time transcoding CDN system by simulation experiments.

Methods for Constructing Control Systems for Hardware and Software Complexes on the Basis of an Adaptive Real-Time Operating System

Methods for Constructing Control Systems for Hardware and Software Complexes on the Basis of an Adaptive Real-Time Operating System

METHOD OF GEOMETRIC INTERPRETATION OF FACIAL EXPRESSIONS FOR EMOTIONS RECOGNITION

Emotional expressions serve a crucial role in interpersonal communication between people while improving social life. In particular, information security systems for visual surveillance that aim to recognize human emotional facial states are highly relevant today. Facial expressions are among the most effective and straightforward means of nonverbal interaction in systems with a human-machine interface. Despite significant scientific and engineering advances in emotion recognition, there are still several challenges in improving the performance of real-time human-machine systems that might work more effectively. In this work, a method of facial geometric feature representation is proposed to improve the operation of security systems. The method is designed to automatically reflect the facial expressions of human emotions in the form of quantitative characteristics of geometric shapes. It uses software-generated landmarks for constructing specific geometric characteristics of the face, which serve as input for the method. Our method consists in forming seven geometric shapes based on predefined landmarks, with the subsequent quantitative expression of these shapes. It was established within the method that the movement of the landmarks when changing facial expressions directly changed the value of each geometric shape. The method outputs the quantitative features of seven shapes, later used to classify emotional facial states. Finally, our method was validated using hyperplane classification. The results of computational experiments confirmed the effectiveness of the proposed method for identifying changes in a person’s emotional state by facial expressions. In addition, the use of simple mathematical calculations in our method has significantly reduced the computational complexity against analogs.