Peak Reflow Temperature Research Articles

Addressing Challenges in Dual Sided SiP Thermal Budget

System-in-Package (SiP) has been adopted as the mainstream advanced packaging technology in many consumer applications including 5G smartphones, tablets, wireless earbuds, smart wearables, etc. Heterogeneous integration, smaller form factor, better electrical performance, lower cost of assembly and faster time to market are the key differentiators of SiP as compared to conventional packaging techniques. In applications such as 5G mobile RF Front-End (RFFE) and Antenna-in-package (AiP) modules, dual sided SiP is the popular approach which brings even higher level of integration and smaller form factor. However thermal warpage control is a significant challenge during two times of solder reflow processes for the front and back sides of the package, especially if one side is with underfill and mold materials which have significant CTE mismatch to the substrate and dies, causing delamination failures and yield losses. This study examines the novel solution of reducing thermal budget with the use of a low temperature solder paste material based on SnBiAg alloy in ultra-fine pitch Type 6 solder powders. It allows a minimal peak reflow temperature of only 170 °C that effectively reduces warpage of dual sided SiP substrates. Solder alloy and paste properties and solder joint microstructures are examined in detail for tests including fine-pitch printing and component soldering, thermal aging test on different substrate finishes, thermal cycling test and mechanical drop test for reliability performance.

Properties of Mixing SAC Solder Alloys with Bismuth-Containing Solder Alloys for a Low Reflow Temperature Process

The subject of extensive research has been the establishing of lower temperature soldering of electronic assemblies that are similar to the once common yet still preferred eutectic Tin-Lead (SnPb) soldering processes that are below 217˚C. This research measured and compared the mixing mechanisms of paste and ball dissolution. Mixed soldered assemblies will have different dissolution results that are dependent on the peak reflow temperature. The hypothesis for this experiment was to determine the relationship of various times above the melting point of low temperature solders containing Bismuth. The results measured are from solder joints of both SAC305 and Bismuth containing solders formed at lower process temperatures compared to the standard high temperatures which peak at 230˚C-260˚C. The Bismuth containing solders evaluated start with the highest to lowest weight percentage of Bismuth, the eutectic 58Bismuth/42Tin (58Bi/42Sn), 57Bi/42Sn/1Ag and a propriety alloy that has a lower Bismuth content along with various micro alloys, defined as 40-58Bi/Sn/X (X representing proprietary micro alloys or doping). The assembly was with an 18mil 96.5Tin/3.0Silver/0.5Copper (SAC305) solder ball mixed with each solder paste. These solder alloys were exposed to three different peak temperatures 180˚C, 195˚C, 205˚C. Another reflow profile attribute of focus was times above 138˚C - the melting point of the eutectic Sn58Bi alloy, this term used throughout the study is referred to Time Above Melting (TAM). The ball and paste assembly used the times above melting of 120sec and 240sec to represent process extremes and verify their significance on improving mixing level results. The average mixing % levels were recorded and compared for each solder joint combination to test the theory that the solder paste solidifies during the time above melting (TAM) within the reflow oven. [1] This experiment effectively demonstrates that the reflow profile parameter for time above melting has limited effectiveness in additionally mixing the paste with the BGA solder ball. Optimization of mixing percentages will need to be achieved by optimizing the paste and ball volumes.

A Novel Lead-Free Low-Temperature Solder Paste for Wafer-Level Package Application

An In-containing low-temperature solder paste (DFLT) has been developed and successfully used in mobile phone board-stacking application. It is now being tried for main-board application, targeting at using lower-temperature reflow profiles but delivering at least the comparable reliability to the mainstream SAC305. The customized drop-shock packages and the daisy-chained WLP256 assemblies were reflowed under a variety of reflow profiles, in which peak temperatures ranged from 200o C up to 240o C. SAC305 has been used as the control leg reflowed under a traditional 240o C peak temperature lead-free reflow profile. The joint morphology changed with the reflow profiles. Under the 200o C peak reflow, hybrid joints were formed in which the mixing zone, dominated by DFLT, was present at the PCB side while the SAC305 ball at the chip side maintained the original morphology. Increasing the reflow peak temperature led to the fully-merged SAC305 ball with DFLT and, finally the formation of the homogeneous joint. Based on the reflow profile, DFLT has shown the drop-shock performance (g-force>6000g) comparable to or substantially better than SAC305, in which 220o C peak reflow allows DFLT having the drop-shock performance more than 90% better than SAC305. Temperature cycling test (TCT) has been done with the profile of -40 to 125o C and 20 minutes dwelling time. Similar to drop-shock, depending on the reflow profiles DFLT has the TCT performance outperforming SAC305. Reflow under a peak temperature of 210o C results in best TCT performance among all profiles. Although the reflow profiles impacts the performance ranking, the failure modes remain the similar for all the assemblies in drop-shock and TCT, respectively.

Enhanced voiding in Cu-Sn micro joints

The sporadic formation of Kirkendall voids in 300–500 μm thick solder joints on electroplated Cu pads has been shown to be related to the quality of the Cu and systematic studies eventually led to approaches for testing and preventing it. However, recent results suggested that the propensity for voiding is much higher in micro-joints with thicknesses below 25–30 μm. The present work confirms the higher voiding tendency at scales typical of 2.5/3D assemblies and reveals important differences in systematic trends between micro- and larger joints. The voiding still increases as the intermetallic layers grow over time after the reflow but, unlike for larger joints, the voiding level corresponding to a given Cu3Sn thickness is very sensitive to both the peak reflow temperature and the subsequent thermal history. Another important difference is that the voiding is strongly enhanced by multiple reflows making it a particular concern in 3D assembly.

Strength and Isothermal Fatigue Resistance of SnBi/SnAgCu Joints Reflowed at Low Temperatures

Abstract Soldered micro-electronics assemblies may have to survive a variety of mechanical loads in repeated drops, cyclic bending, or vibration. A very large body of work has addressed the isothermal fatigue performance of SnAgCu solder joints. This work offers a general assessment of the achievable performance of so-called hybrid solder joints formed by soldering with eutectic SnBi or SnBiAg to SnAgCu bumps on area array components. This allows for soldering at much lower temperatures than with SnAgCu alone, but the deformation and damage properties of the resulting structures depend strongly on details of the design and process. A peak reflow temperature of 175 °C was shown to be sufficient to ensure that the life of the joints remains limited by fatigue of the unmixed SnAgCu near the component. However, a higher effective stiffness of the mixed region near the substrate means that the life will be lower by 45%.

Strategies for inducing heredity of β-Sn texture in micro solder joints during multi-reflow process

The strategies for inducing heredity of β-Sn texture and thus controlling β-Sn orientation in micro solder joints during multi-reflow process were investigated. The temperature gradient (TG) induced gene clusters that carried the information similar to the solid-state crystals and conical cavities that provided preferred nucleation sites at one side of the joints were identified as the keys for generating heredity effect. There was non-heredity effect in Cu/Sn/Cu joints whether the joints were reflowed under TG or not for the first time due to the absence of gene clusters and in Cu/Sn-3.0Ag-0.5Cu(SAC305)/Cu joints during isothermal multi-reflow due to the absence of deep and narrow conical cavities. However, the Cu/SAC305/Cu joints that had orientated β-Sn grains after the first reflow under TG exhibited remarkable heredity effect during the subsequent second and third reflow. The critical peak reflow temperature was confirmed to be 255 °C over which the heredity effect disappeared. A general guidance of the strategies for inducing heredity effect in Cu/SAC305/Cu joints during multi-reflow process was demonstrated focusing on reflow temperature, times, duration, cooling rate and TG. The novel reflow method is believed to be beneficial to improve the reliability and anisotropy of micro solder joints containing few β-Sn grains.

Ball Grid Array Interconnection Properties of Solderable Polymer–Solder Composites With Low-Melting-Point Alloy Fillers

In this work, a novel ball grid array (BGA) interconnection process has been developed using solderable polymer–solder composites (SPCs) with low-melting-point alloy (LMPA) fillers to enhance the processability of the conventional capillary underfill technique and to overcome the limitations of the no-flow underfill technique. To confirm the feasibility of the proposed technique, a BGA interconnection test was performed using four types of SPCs with a different LMPA concentration (from 0 to 5 vol %). After the BGA interconnection process, the interconnection characteristics, such as morphology of conduction path and electrical properties of the BGA assemblies, were inspected and compared. The results indicated that BGA assemblies using SPC without LMPA fillers showed weak conduction path formation, including open circuit (solder bump loss) or short circuit formation because of the expansion of air voids within the interconnection area due to the relatively high reflow peak temperature. Meanwhile, assemblies using SPC with 3 vol % LMPAs showed stable metallurgical interconnection formation and electrical resistance due to the relatively low-reflow peak temperature and favorable selective wetting behavior of molten LMPAs for the solder bumps and Cu metallizations.

Voiding Control at Preform Soldering

Abstract Assembly of components with large pads such as high brightness LEDs or high power dies often is soldered with preform, mainly due to a lower voiding and lower flux fume generated when compared with solder paste, and also because of its better thermal and electrical conductivity compared with Ag epoxy. This is particularly true when the joints are to be formed within a cavity. Although lower than solder paste, the voiding in the solder joint is still a concern for high reliability and high performance devices. In this study, voiding at high power die attach reflow soldering using preform was simulated with the use of Cu coupons to mimic both die and substrate. The voiding behavior was studied by varying solder alloy type, flux quantity coated on preform, oxidation extent of Cu coupon, reflow peak temperature, and weight applied on the top of simulated die. For SAC305, with increasing weight, the bondline thickness (BLT) maintained constant initially due to solder surface tension, then reduced rapidly at weight higher than 50 g. The voiding area % increased with decreasing BLT first, then levelled off at lower BLT, although the voiding volume decreased with decreasing BLT due to constrained lamellar solder flow. Voiding was the highest for SAC305, followed by 57Bi42Sn1Ag, with 63Sn37Pb being the lowest, and increased with increasing oxidation of Cu coupon. With increasing flux quantity, voiding increased for SAC305 and 63Sn37Pb, but decreased for 57Bi42Sn1Ag, mainly due to the different temperature range at reflow. Voiding increased with increasing reflow temperature up to 170°C due to increasing vaporization, decreased with further increase in reflow temperature up to 210°C due to increasing flux activity, and increased again at temperature beyond 210°C due to rapid flux outgassing.

Backward Compatibility Solder Joint Formation at High Peak Reflow Temperature for Aerospace Applications

This study investigates the backward compatibility solder joint formed at high peak reflow temperature in aerospace industries. The backward compatibility solder joint is made up of lead-free ball grid array mounted on printed circuit board using tin–lead solders at a maximum reflow temperature ranging from 241.9 to 242.45 °C. The reflow process was conducted under a nitrogen atmosphere in a full convection reflow oven for 80.12–81.27 s. The scanning electron microscopy cross section of the solder ball depicts fairly uniform composition and phase distribution of the Pb-free plastic ball grid array and the tin–lead solder paste across all joints. Nanoindentation tests showed better mechanical properties with higher elastic modulus at 68.64 GPa and acceptable hardness value at 0.26 GPa as compared to those of Sn–Pb and Pb-free solder balls. Intermetallic compound formation at both joints seen in the scanning electron microscopy shows a scallop shape and randomly directed growth because of the uniformly distributed Pb-rich phase on the solder ball. The average intermetallic compound thickness measured by scanning electron microscopy equipped with energy-dispersive X-ray analysis was 3.633 μm, which was less than the specified thickness of 12 μm from the laboratory request.

Model for Inverse Determination of Process and Material Parameters for Control of Package-on-Package Warpage

Package-on-package (PoP) assemblies may experience warpage during package fabrication and later during surface mount assembly. Excessive warpage may result in loss of coplanarity, open connections, misshaped joints, and reduction in package board-level reliability under environmental stresses of thermal cycling, shock, and vibration. Previous researchers have shown that warpage may be influenced by a number of design and process factors including underfill properties, mold properties, package geometry, package architecture, board configuration, underfill and mold dispense and cure parameters, and package location in the molding panel. A comprehensive inverse model incorporating a full set of design and process parameters and their effect on PoP and PoP assembly warpage is presently beyond the state of the art. In this paper, data have been gathered on multiple PoP assemblies under a variety of assembly parameters. The packages have been speckle coated. The warpage of the PoP assemblies have been measured using a glass-top reflow oven using multiple cameras. Warpage measurements have been taken at various temperatures of the reflow profile between room temperature and the peak reflow temperature. Finite-element models have been created, and the PoP warpage predictions have been correlated with the experimental data. The experimental data set has been augmented with the simulation data to evaluate configurations and parameter variations, which were not available in the experimental data set. Statistical models have been developed to capture the effect of single and multiple parameter variations using principal component regression and ridge regression. The best subset variables obtained from stepwise methods have been used for model development. The developed models have been validated with the experimental data using a single factor design of the experimental study and are found to accurately capture material and geometry effects on part warpage. The results show that the proposed approach has the potential of predicting both single and coupled factor effects on warpage.

Effect of reflow temperature on the mechanical drop performance of Sn-Bi solder joint

The effect of reflow peak temperatures from 160°C to 180°C on the mechanical drop performance of Sn-58Bi solder joint was studied. The mechanical drop performance was evaluated through the three point dynamic bending test in which the strain of PCB was step increased until the failure of daisy chain circuit was detected with 50 kHz sampling rate. The wetting behaviour of Sn-58Bi on Cu was investigated by wetting balance tests at various pot temperatures from 150°C to 190°C. The dynamic bending behaviour of solder joint decreased significantly with the decrease of temperatures from 170°C to 160°C. Microstructural observation and ball shear test results revealed that the decrease of joint area on Cu pad affected the deterioration of mechanical drop performance. From wetting balance tests at various pot temperatures, it was considered that the abrupt change in wetting activation energy at temperatures between 165°C and 170°C was responsible for the wetting behaviour on Cu pad and resultantly the mechanical drop performance of Sn-58Bi solder. It was also considered that the change of wetting activation energy was caused from the change of interface reaction mechanism which was due to the change in IMC formation behaviour with reflow peak temperature.

Relationship between morphologies and orientations of Cu6Sn5 grains in Sn3.0Ag0.5Cu solder joints on different Cu pads

The morphologies and orientations of Cu6Sn5 intermetallic compounds in the Sn3.0Ag0.5Cu solder joints both on polycrystalline and single crystal Cu pads under different peak reflow temperatures and times above liquids were investigated. The relationship between Cu6Sn5 grain orientations and morphologies was clarified. At the interface of Sn3.0Ag0.5Cu/polycrystalline Cu pad, scalloped Cu6Sn5 intermetallic compounds formed at 250°C and roof shape Cu6Sn5 formed at 300°C. Both scalloped Cu6Sn5 and roof shape Cu6Sn5 had a preferred orientation of {0001} plane being parallel to polycrystalline Cu pad surface. Besides, the percentage of large angle grain boundaries increased as the peak reflow temperature rose. At the interface of Sn3.0Ag0.5Cu/(111) single crystal Cu pad, the Cu6Sn5 intermetallic compounds were mainly scallop-type at 250°C and were prism type at 300°C. The prismatic Cu6Sn5 grains grew along the three preferred directions with the inter-angles of 60° on (111) single crystal Cu pad while along two perpendicular directions on (100) single crystal Cu pad. The orientation relationship between Cu6Sn5 grains and the single crystal Cu pads was investigated by electron backscatter diffraction technology. In addition, two types of hollowed Cu6Sn5 intermetallic compounds were found inside the joints of polycrystalline Cu pads. The long hexagonal Cu6Sn5 strips were observed in the joints reflowing at 250°C while the hollowed Cu6Sn5 strips with the ‘▪’ shape cross-sections appeared at 300°C, which was attributed to the different grain growth rates of different Cu6Sn5 crystal faces.

Failure analysis method to study solder wicking phenomena in modern microelectronic devices

Many plastic encapsulated multi chip module (MCM) devices are prone to delamination due to lack of adherence between the materials that compose the package. The problem can get worse if there is a moisture sensitivity level (MSL) violation. When there is a poor adherence between ceramic passive components like capacitors or resistors and plastic molding compound delamination can occur on top of the components and a path for solder to flow is created. When a delaminated MCM device is submitted to lead free solder reflow above 250 °C peak temperature, the solder contained inside the package can flow through any void or empty space inside the package. This could affect the performance and reliability of the system. Package level reliability tests can be performed to assure that good adherence of the materials that compose the device package exists. A solder heat resistance (SHR) test is commonly performed to validate that a specific device package can withstand the worst moisture–solder reflow scenarios during the final assembly process. In this work experiments were carried out in order to replicate the solder wicking failure mechanism. Two groups of MCM, 77 devices were subjected to SHR test using moisture sensitivity level MSL2A and MSL3 conditions and a 250 °C peak reflow temperature. The electrical failures that occurred after the experiment were analyzed according to a specific failure analysis method in order to detect the failure mechanism. Special attention was paid on leakage current and continuity failures since these are the main failure modes associated with solder wicking on ceramic passive components assembled in MCM devices.

Origin and evolution of voids in electroless Ni during soldering reaction

The interfacial voids in Ni2SnP were studied by high-resolution transmission electron microscopy. These voids were found to be responsible for many types of failure in electronic solder joints, but so far, detailed investigation of these voids has been pursued in a only few studies because of the need for advanced analytical techniques. The interaction of Sn3Ag0.5Cu with electroless Ni/immersion Au was investigated in this study. The microstructures during reflow were quenched to understand the evolution of these voids. Different peak reflow temperatures were adopted to analyze the change in the void density. Then, the effect of the number of reflow cycles on the void density was investigated. Two types of interfacial voids were found: one in the Ni3P region and the other in the Ni2SnP region. The voids in Ni2SnP were connected to each other to form a void line. The void density increased with the number of reflow cycles, but not with the peak reflow temperature. These results confirmed that the voids in Ni2SnP were more fragile and responsible for most of the interfacial cracks. Void nucleation and coalescence were modeled on the basis of the Johnson–Mehl–Avrami–Kolmogorov theory. The experimental data agreed well with the model data. The mechanism of the void nucleation and coalescence was then discussed.

Low-Temperature Solid-State Silver Bonding of Silicon Chips to Alumina Substrates

Pure silver (Ag) is used as a bonding medium to bond silicon (Si) chips to alumina substrates. The bonding process is performed at 260°C, which is a typical peak reflow temperature of Sn3.5Ag solders used in electronic industries. A static pressure of 1000 psi (6.9 MPa) is applied. This is a solid-state bonding process without any molten phase involved. The Ag foil sandwiched between the Si chip and the alumina substrate is ductile enough to deform and mate with the gold (Au) layers coated, respectively, on the Si chip and on the alumina substrate. Ag and Au atoms on both sides of the bonding interfaces are brought within atomic distance, and bonding is thus achieved. The ductile Ag joints can accommodate significant mismatch in coefficient of thermal expansion between Si and alumina. Scanning electron microscopy evaluations show that nearly perfect joints are achieved and no voids are observed. A standard shear test is performed to assess the bonding strength. The shear strength measured far exceeds the requirement specified in MIL-STD-883G standard.

Solid State Bonding of Silver Foils to Metalized Alumina Substrates at 260°C

Silver (Ag) foils are bonded to alumina substrates by a low temperature solid state bonding process. The alumina substrate is premetalized with 40 nm titanium tungsten (TiW) and 2.54 μm gold (Au). The bonding temperature is just 260 °C, compatible with the peak reflow temperature of lead-free (Pb-free) solders used in electronic industries. The Ag foil is quite soft and ductile. It can deform to mate with the Au surface on alumina. Thus, only 1000 psi of static pressure is needed to bring Ag atoms and Au atoms within atomic distance on the interface. Ag has superior physical properties. It has the highest electrical and thermal conductivities among the metals. Scanning electron microscope (SEM) images show that the Ag foil is well bonded to the Au layer on alumina. A standard shear test is performed to determine the shear strength of the bonding. The shear strength of five samples tested far exceeds the strength requirement of MIL-STD-883 G standard.

High-lead flip chip bump cracking on the thin organic substrate in a module package

Flip chip bump cracking was observed after Si die attach reflow on the organic substrate of a module package. High-lead bump and eutectic SnPb cladding were used on Si die and the substrate sides, respectively. The reflow peak temperature was 260 °C for compatibility with passive components attach using lead-free solder. Flip chip bump cracking occurred at high-lead solder close to the die side. The cracking was eliminated by lowering the reflow peak temperature down to 225 °C. Main cause of the cracking at 260 °C reflow was attributed to the extensive Sn diffusion into high lead bump. This decreased the melting point of the high-lead solder around the die side, which in turn worsened the adhesion between solder and die due to the coexistence of solid and liquid. Diffusion length estimation showed both of the liquid- and solid-state diffusions of Sn. Crack gap in the solder bump was consistent with thermal expansion mismatch between Si die and organic substrate. The bump cracking was mitigated by use of 225 °C reflow, limiting Sn diffusion and providing a good integrity of high lead bumps on die side.

The evolution of organic solderability preservatives (OSP) from a temporary protectant to a leadership position in surface finishing chemistry

PurposeThe purpose of this paper is to present an overview of the evolution of organic solderability preservatives (OSP) technology from a temporary anti‐tarnish to an approved process for the lead‐free assembly of high‐reliability printed circuit boards (PCBs).Design/methodology/approachAs this is an informational paper, the main approach was to compare and contrast various types of OSP molecules and their fitness for use.FindingsThe active ingredient of an OSP is one of the most important ingredients that can help to improve the heat resistance, which becomes much more important in conjunction with lead‐free solder. The latest OSP shows excellent stability, even at more than the peak reflow temperatures used with lead‐free solders. The success of any OSP process is highly correlated to process control and maintenance and OSP formulations are not created equal. The thickness of the film is only one difference. However, the key differentiators for OSP coatings are the overall ability of the organic film to resist oxygen penetration and humidity; and withstand the higher temperatures of lead‐free assembly. The author suggests that original equipment manufacturer (OEMs), contract manufacturers and PCB fabricators perform testing and qualification of OSPs using industry‐accepted reliability and solderability testing methods.Research limitations/implicationsThis work represents the author's extensive experience with OSP technology, as well as the results of a collective collaboration with Shikoku Chemical Corporation. The findings represent reliability and solderability testing carried out in various manufacturing sites including cooperation with certain OEMs that are users of circuits fabricated with OSP technology.Originality/valueThis paper details how critical advances in OSP technology have enabled improvements in solderability and reliability over earlier commercial generations and have further enhanced the solderability of lead‐free assemblies.

Highly Reliable Copper-Based Conductive Adhesives Using an Amine Curing Agent for in Situ Oxidation/Corrosion Prevention

One critical obstacle to preparing highly reliable isotropically conductive adhesives (ICAs) filled with Ag-coated Cu flakes is the oxidation and corrosion of Ag-coated Cu fillers, which cause the degradation of electrical properties of the ICAs at elevated temperatures and relative humidity (RH) during long-term reliability tests. Various organic compounds could be used for corrosion prevention of the exposed Cu surface of Ag-coated Cu fillers, however, with poor thermal stability at elevated temperatures. In this paper, we report a novel approach for the preparation of highly reliable, highly conductive, and low-cost ICAs filled with Ag-coated Cu flakes by using an amine curing agent for in situ oxidation/corrosion prevention. The coordination of the amine curing agent to the exposed Cu of Ag-coated Cu flakes prevents the oxidation of the exposed Cu during the ICA curing at 150°C. After curing, the formed ample secondary and tertiary amine groups could further protect the exposed Cu surface from oxidation/corrosion effectively in harsh environments. In comparison with an anhydride-cured ICA (resistivity: ~1.3 × 10-3 Ω-cm), an amine-cured ICA exhibits a much lower bulk resistivity (~2 × 10-4 Ω-cm). This resistivity is comparable to that of commercially available Ag filled ICAs. Moreover, the amine-cured ICA shows very stable bulk resistivity during 85°C/85 % RH aging for more than 1000 h and triple reflow tests with a peak reflow temperature at 255°C. We discuss the reasons why the amine-cured ICA provides lower bulk resistivity and better reliability than the anhydride-cured ICA. The novel approach of in situ Cu oxidation/corrosion prevention paves the way towards highly reliable, highly conductive, and low cost ICAs for electronic packaging applications.

An Innovative High Thermal Conductive Solderable Adhesive

With increasing LED development and production, thermal issues are becoming more and more important for LED devices, particularly true for high power LED and also for other high power devices. In order to dissipate the heat from the device efficiently, Au80Sn20 alloy is being used in the industry now. However there are a few drawbacks for Au80Sn20 process: (1) higher soldering temperature, usually higher than 320 °C; (2) low process yield; (3) too expensive. In order to overcome the shortcomings of Au80Sn20 process, YINCAE Advanced Materials, LLC has invented a new solderable adhesive – TM 230. Solderable adhesives are epoxy based silver adhesives. During the die attach reflow process, the solder material on silver can solder silver together, and die with pad together. After soldering, epoxy can encapsulate the soldered interface, so that the thermal conductivity can be as high as 58 W/mk. In comparison to Au80Sn20 reflow process, the solderable adhesive has the following advantages: (1) low process temperature – reflow peak temperature of 230 °C; (2) high process yield – mass reflow process instead of thermal compression bonding process; (3) low cost ownership. In this paper we are going to present the die attach process of solderable adhesive and the reliability test. After 1000 h lighting of LED, it has been found that there is almost no decay in the light intensity by using solderable adhesive – TM 230.