Nowadays, multiple-error occurrence because of multiple transient faults is highly probable in digital circuits especially used in outer space environments. Therefore, concerning such applications, the processing systems performing operations such as addition and multiplication are of great importance and should be redesigned, properly. In this paper, some multiple-error resilient carry look-ahead adders are proposed more efficient than the existing designs. In this manner, at first, two new customized fault-tolerant voters are proposed and analyzed to be used for multiple-error correction/detection in the carry look-ahead adders utilizing a distributed partial triple modular redundancy along with a parity prediction scheme. Then, the new voters are exploited and incorporated into two types of grouped carry look-ahead adder architectures to obtain different designs with a compromise between the area overhead and reliability. Simulation results show that, as well as a complete single error correction/detection, the proposed voters lead to 8–15% area overhead reduction in different carry look-ahead adders while increasing multiple-error correction probability up to 17% and 26% utilizing the first and second proposed voters, respectively, compared to the best existing design. Furthermore, the total multiple error correction/detection probability is improved in different adder architectures in many cases.