Parallel Processing Units Research Articles

Review of smoothed particle hydrodynamics: towards converged Lagrangian flow modelling.

This paper presents a review of the progress of smoothed particle hydrodynamics (SPH) towards high-order converged simulations. As a mesh-free Lagrangian method suitable for complex flows with interfaces and multiple phases, SPH has developed considerably in the past decade. While original applications were in astrophysics, early engineering applications showed the versatility and robustness of the method without emphasis on accuracy and convergence. The early method was of weakly compressible form resulting in noisy pressures due to spurious pressure waves. This was effectively removed in the incompressible (divergence-free) form which followed; since then the weakly compressible form has been advanced, reducing pressure noise. Now numerical convergence studies are standard. While the method is computationally demanding on conventional processors, it is well suited to parallel processing on massively parallel computing and graphics processing units. Applications are diverse and encompass wave-structure interaction, geophysical flows due to landslides, nuclear sludge flows, welding, gearbox flows and many others. In the state of the art, convergence is typically between the first- and second-order theoretical limits. Recent advances are improving convergence to fourth order (and higher) and these will also be outlined. This can be necessary to resolve multi-scale aspects of turbulent flow.

Systolic architecture for adaptive block FIR filter for throughput using distributed arithmetic

In this paper, the design of distributed arithmetic (DA) finite impulse response (FIR) filter using block least mean square algorithm (BLMS) based on systolic array architecture with parallel data processing units is presented. A high level of parallelism is observed in the proposed work, improving the efficiency of variable coefficient FIR structure. The parallel look-up tables (LUT) in combination with the shift accumulator emulate multiply and accumulate operations. In order to reduce the number of clock cycles, B parallel LUTs are used, where B is the coefficient size. The block processing in BLMS Adaptive FIR Filter of block length L gives L times high throughput. This structure accepts block of input samples and generates block of output in each clock cycle. It requires less number of registers for computing filter output response and weight increment vector as memory reuse concept is used for implementing registers. This structure doesn’t require multiplexer. The designed DA based FIR filter is implemented on FPGA. The implementation results shows that the manuscript presents a high speed and low power architecture. The proposed structure provides 17.3 times less power and 9.5 times increase in throughput when compared to existing designs.

An efficient graphic processing unit parallel optimal point searching approach on complex product response surface

Response surface-based simulation optimization method is widely used in the design of complex products for its low-cost in optimization target valuation. However, when design variables increase, it often takes considerable time for high-dimensional response surface to search the optimal point, which falls easily into the local optimum due to the large search space.To solve these problems, a GPU (Graphic Processing Unit) parallel optimization based on branch and bound is proposed in this paper, of which the main algorithm flow can be described as the following steps: the optimization space is branched to subsets and mapped to different GPU threads; the Chebyshev response surface is constructed within the threads; the compact convex hull of the subsets are obtained through the interval operation, and the optimization space is reduced on a large scale by pruning; all subsets that may contain optimal design points are efficiently obtained by repeating spatial subdivision and demarcation; finally, all the reserved subsets are mapped to different GPU threads, and all global optimization design points are obtained through sequential quadratic programming and comparative analysis.

GVF: GPU-Based Vector Fitting for Modeling of Multiport Tabulated Data Networks

Modeling of multiport data characterizing high-speed modules, such as packages, vias, and complex multiconductor interconnects is becoming increasingly important in signal and power integrity applications. Vector fitting (VF) algorithm has been widely used by designers for macromodeling and system identification from such multiport tabulated data. Since VF and strategies based on it require many iterations to arrive at an optimal number of converged poles, it is highly desired to reduce the computational cost of each VF iteration. This article advances the applicability of VF to exploit the emerging massively parallel graphical processing units (GPUs) by developing necessary parallelization strategies and investigates their performance while using different GPU libraries. For large problem sizes (an increasing number of poles and ports), numerical results demonstrate that the proposed method while using MAGMA libraries provides significant speedup compared with existing multi-CPU-based parallel VF techniques.

Optimized Pipelined Fast Fourier Transform Using Split and Merge Parallel Processing Units for OFDM

This paper presents a new optimized design to implement Fast Fourier Transform in orthogonal frequency division multiplexing for real valued signals. The proposed method is a new pipelined design, it is the combination of serial as well as parallel split and merge processing butterfly units. The proposed design initially has a single processing unit, in second stage, processing unit splits into two parallel processing units, and thereafter from stage three onwards, merges into a single processing until the last stage. The proposed design is optimized to reduce the latency as well as the hardware complexity for real inputs and complex inputs, as real valued signals itself reduce half of the computations, redundant data paths are eliminated effectively by this design. The parallel processing unit speeds up the processing at the initial stage, whereas single processing units reduce the hardware complexity. This design is a solution for ambiguity between Latency and hardware. The proposed design is very effective for real valued signals. The proposed design is implemented in Radix-22 model, in which multipliers are required for every two stages. The proposed design reduces Latency parameter more than 50% with a small cost of adders and multipliers, also power consumption for higher order FFT’s is low.

Convolutional Neural Network Technology in Endoscopic Imaging: Artificial Intelligence for Endoscopy.

Recently, significant improvements have been made in artificial intelligence. The artificial neural network was introduced in the 1950s. However, because of the low computing power and insufficient datasets available at that time, artificial neural networks suffered from overfitting and vanishing gradient problems for training deep networks. This concept has become more promising owing to the enhanced big data processing capability, improvement in computing power with parallel processing units, and new algorithms for deep neural networks, which are becoming increasingly successful and attracting interest in many domains, including computer vision, speech recognition, and natural language processing. Recent studies in this technology augur well for medical and healthcare applications, especially in endoscopic imaging. This paper provides perspectives on the history, development, applications, and challenges of deep-learning technology.

Analysis of Schedule and Layout Tuning for Sparse Matrices With Compound Entries on GPUs

AbstractLarge sparse matrices with compound entries, i.e. complex and quaternionic matrices as well as matrices with dense blocks, are a core component of many algorithms in geometry processing, physically based animation and other areas of computer graphics. We generalize several matrix layouts and apply joint schedule and layout autotuning to improve the performance of the sparse matrix‐vector product on massively parallel graphics processing units. Compared to schedule tuning without layout tuning, we achieve speedups of up to 5.5 × . In comparison to cuSPARSE, we achieve speedups of up to 4.7 × .

GronOR: Massively parallel and GPU-accelerated non-orthogonal configuration interaction for large molecular systems.

GronOR is a program package for non-orthogonal configuration interaction calculations for an electronic wave function built in terms of anti-symmetrized products of multi-configuration molecular fragment wave functions. The two-electron integrals that have to be processed may be expressed in terms of atomic orbitals or in terms of an orbital basis determined from the molecular orbitals of the fragments. The code has been specifically designed for execution on distributed memory massively parallel and Graphics Processing Unit (GPU)-accelerated computer architectures, using an MPI+OpenACC/OpenMP programming approach. The task-based execution model used in the implementation allows for linear scaling with the number of nodes on the largest pre-exascale architectures available, provides hardware fault resiliency, and enables effective execution on systems with distinct central processing unit-only and GPU-accelerated partitions. The code interfaces with existing multi-configuration electronic structure codes that provide optimized molecular fragment orbitals, configuration interaction coefficients, and the required integrals. Algorithm and implementation details, parallel and accelerated performance benchmarks, and an analysis of the sensitivity of the accuracy of results and computational performance to thresholds used in the calculations are presented.

General power-law temporal scaling for unequal-size microbubble coalescence.

We systematically study the effects of liquid viscosity, liquid density, and surface tension on global microbubble coalescence using lattice Boltzmann simulation. The liquid-gas system is characterized by Ohnesorge number Oh≡η_{h}/sqrt[ρ_{h}σr_{F}] with η_{h},ρ_{h},σ, and r_{F} being viscosity and density of liquid, surface tension, and the radius of the larger parent bubble, respectively. This study focuses on the microbubble coalescence without oscillation in an Oh range between 0.5 and 1.0. The global coalescence time is defined as the time period from initially two parent bubbles touching to finally one child bubble when its half-vertical axis reaches above 99% of the bubble radius. Comprehensive graphics processing unit parallelization, convergence check, and validation are carried out to ensure the physical accuracy and computational efficiency. From 138 simulations of 23 cases, we derive and validate a general power-law temporal scaling T^{*}=A_{0}γ^{-n}, that correlates the normalized global coalescence time (T^{*}) with size inequality (γ) of initial parent bubbles. We found that the prefactor A_{0} is linear to Oh in the full considered Oh range, whereas the power index n is linear to Oh when Oh<0.66 and remains constant when Oh>0.66. The physical insights of the coalescence behavior are explored. Such a general temporal scaling of global microbubble coalescence on size inequality may provide useful guidance for the design, development, and optimization of microfluidic systems for various applications.

IberWQ: A GPU Accelerated Tool for 2D Water Quality Modeling in Rivers and Estuaries

Numerical models are useful tools to analyze water quality by computing the concentration of physical, chemical and biological parameters. The present work introduces a two-dimensional depth-averaged model that computes the most relevant and frequent parameters used to evaluate water quality. High performance computing (HPC) techniques based on graphic processing unit (GPU) parallelization have been applied to improve the efficiency of the package, providing speed-ups of two orders of magnitude in a standard PC. Several test cases were analyzed to show the capabilities and efficiency of the model to evaluate the environmental status of rivers and non-stratified estuaries. IberWQ will be freely available through the package Iber.

Three-Dimensional Cooperative Positioning in Vehicular Ad-hoc Networks

In this paper, a three-dimensional universal cooperative localizer (3D UCL) is proposed for vehicular ad-hoc networks (VANETs) in 3D space under varied types of ranging measurements including time-of-arrival (TOA), received signal strength (RSS), angle-of-arrival (AOA), and Doppler frequency. Its core idea is to exploit generalized approximate message passing (GAMP) to resolve the 3D cooperative positioning problem after converting it as a generalized linear mixing problem. Unfortunately, the positioning performance of 3D UCL is severely degraded by the inaccurate ranging measurements from the non-line-of-sight (NLOS) links. Therefore, a 3D geographical information enhanced UCL (3D GIE-UCL) is developed by combining 3D UCL with a NLOS identification mechanism assisted by geographical information. Finally, 3D UCL is accelerated by graphics processing unit (GPU) parallelization, particle reduction and message censoring. 3D GIE-UCL is accelerated by particle reduction and anchor upgrading. Simulation results validate state-of-the-art positioning performances and cooperative gains of both 3D UCL and 3D GIE-UCL after comparing them with existing cooperative localizers. 3D GIE-UCL approaches to its performance upper bound provided by its correspondence with oracle link-type information. 3D UCL and GIE-UCL show 241× and 3.3× speedup after adopting the acceleration techniques, respectively.

Acceleration of three-dimensional Tokamak magnetohydrodynamical code with graphics processing unit and OpenACC heterogeneous parallel programming

ABSTRACTIn this paper, the OpenACC heterogeneous parallel programming model is successfully applied to modification and acceleration of the three-dimensional Tokamak magnetohydrodynamical code (CLT). Through combination of OpenACC and MPI technologies, CLT is further parallelised by using multiple-GPUs. Significant speedup ratios are achieved on NVIDIA TITAN Xp and TITAN V GPUs, respectively, with very few modifications of CLT. Furthermore, the validity of the double precision calculations on the above-mentioned two graphics cards has also been strictly verified with m/n = 2/1 resistive tearing mode instability in Tokamak.

Application of graphics processing unit parallel computing in pattern recognition for vibration events based on a phase-sensitive optical time domain reflectometer.

The technology of pattern recognition for vibration events based on the phase-sensitive optical time domain reflectometer (Φ-OTDR) has been significantly improved, thanks to plenty of valuable research in recent years. However, it remains challenging to develop an efficient algorithm for it with computing resources that are simpler to achieve at lower cost. To the best of our knowledge, this paper, for the first time, analyzes the superiority of using graphics processing unit (GPU) parallel computing to improve time-consuming performance in pattern recognition for vibration events based on Φ-OTDR. And the pattern-recognition algorithm, including spectral subtraction and artificial neural networks, is implemented by CPU and GPU, respectively. Then, the time consumption of the CPU-based method and the time consumption of the GPU-based method are, respectively, recorded and compared. As a result of our experiments, we concluded that using GPU parallel computing can develop an efficient algorithm with a computing resource that is simpler to achieve at a lower cost.

Ray-based modeling and imaging in viscoelastic media using graphics processing units

In seismic data processing, the amplitude loss caused by attenuation should be taken into account. The basis for this is provided by a 3D attenuation model described by the quality factor [Formula: see text], which is used in viscoelastic modeling and imaging. We have accomplished viscoelastic modeling and imaging using ray theory and the ray-Born approximation. This makes it possible to take [Formula: see text] into account using complex-valued and frequency-dependent traveltimes. We have developed a unified parallel implementation for modeling and imaging in the frequency domain and carried out the numerical integration on a graphics processing unit. A central part of the implementation is an efficient technique for computing large integrals. We applied the integration method to the 3D SEG/EAGE overthrust model to generate synthetic seismograms and imaging results. The attenuation effects are accurately modeled in the seismograms and compensated for in the imaging algorithm. The results indicate a significant improvement in computational efficiency compared to a parallel central processing unit baseline.

Effect of magnetic ordering on the spinodal decomposition of the Fe-Cr system: A GPU-accelerated phase-field study

This study aims to investigate the effect of magnetic ordering on spinodal decomposition behavior in the Fe-Cr system using graphics processing unit(GPU) parallelization. We modify the CALPHAD-type free energy to remove its critical behavior near the paramagnetic-ferromagnetic transition. We solve the Cahn-Hilliard equation using a semi-implicit Fourier spectral method, parallelizing the code to run on a GPU via compute unified device architecture and OpenMP. We find that the GPU parallelization gives better performance than that of OpenMP when using fast Fourier transforms to solve the Cahn-Hilliard equation. We conduct nine sets of simulations to examine the effect of magnetic ordering, and we found that it alters the interfacial energy between Cr-rich and Cr-depleted phases, equilibrium concentrations, and energy barrier for phase transformations. We apply a phase-field method to examine in detail how these changes affect the microstructural evolution, quantitatively evaluating the microstructures obtained in terms of the precipitate number density, average phase area, and phase boundary density along certain auxiliary lines to analyze the effects of magnetic ordering.

Systolic-based pyramidal neuron accelerator blocks for convolutional neural network

The dramatic evolution in the Deep Learning (DL) algorithms required to alter the silicon architecture fabric of the conventional parallel processing units to increase the efficiency of accelerationg the enormous feature data while achieving reasonable low power consumption levels, especially for the Convolutional Neural Networks (CNN). In this paper, three proposed Pyramidal Neuron Accelerator Architecture (PNAA) units have been designed and optimized for accelerating the convolutional layer of the Convolutional Neural Networks (CNN). The three proposed PNAA units are suggested to replace the conventional generic embedded Digital Signal Processing (DSP) blocks in the silicon architecture fabric of the FPGA chips, that are responsible for the dot-operation functions. The three proposed PNAA units represent the intensively-used neuron operations for the most common kernel filter dimensions in CNN systems as a proof of concept. The proposed PNAA units have been compiled using the TSMC 130 nm technology using the Synopsys DC compiler software. The Front-End analysis for different characteristic PVTs showed that the maximum achieved processing speed for the proposed PNAA units could reach a computational speed of 20.9 Giga Operation per Seconds (GPOS) at a frequency of 409.84 MHz and a predicted power consumption equal to 58.729 mW.

Some Structures of Parallel VLSI-Oriented Processing Units for Implementation of Small Size Discrete Fractional Fourier Transforms

Discrete orthogonal transforms such as the discrete Fourier transform, discrete cosine transform, discrete Hartley transform, etc., are important tools in numerical analysis, signal processing, and statistical methods. The successful application of transform techniques relies on the existence of efficient fast algorithms for their implementation. A special place in the list of transformations is occupied by the discrete fractional Fourier transform (DFrFT). In this paper, some parallel algorithms and processing unit structures for fast DFrFT implementation are proposed. The approach is based on the resourceful factorization of DFrFT matrices. Some parallel algorithms and processing unit structures for small size DFrFTs such as N = 2, 3, 4, 5, 6, and 7 are presented. In each case, we describe only the most important part of the structures of the processing units, neglecting the description of the auxiliary units and the control circuits.

Parallel Image Captioning Using 2D Masked Convolution

Automatically generating a novel description of an image is a challenging and important problem that brings together advanced research in both computer vision and natural language processing. In recent years, image captioning has significantly improved its performance by using long short-term memory (LSTM) as a decoder for the language model. However, despite this improvement, LSTM itself has its own shortcomings as a model because the structure is complicated and its nature is inherently sequential. This paper proposes a model using a simple convolutional network for both encoder and decoder functions of image captioning, instead of the current state-of-the-art approach. Our experiment with this model on a Microsoft Common Objects in Context (MSCOCO) captioning dataset yielded results that are competitive with the state-of-the-art image captioning model across different evaluation metrics, while having a much simpler model and enabling parallel graphics processing unit (GPU) computation during training, resulting in a faster training time.

Accelerating in-memory transaction processing using general purpose graphics processing units

High throughput is critical for on-line transaction processing (OLTP) applications with a large amount of users. With massive parallel processing units and high memory bandwidth, GPUs are suitable for accelerating OLTP transactions. However, it is challenge to implement transaction execution on GPUs, due to (1) the branch divergences caused by the single instruction multiple threads (SIMT) execution paradigm, and (2) the lack of fine-grained synchronization mechanism and pointer-based dynamic data structures in the GPU ecosystem.In this paper, we present a high-performance in-memory transaction processing system on GPUs to accelerate OLTP applications, named GPU-TPS. Firstly, we propose a transaction execution model to improve GPU hardware utilization and perform synchronization among transactions. Secondly, we optimize the indexing data structures that used extensively in OLTP systems (i.e., hash table for unordered store, and b＋ tree for ordered store) for fast storing on GPUs.To evaluate GPU-TPS, we apply it to two popular OLTP workloads (SmallBank and TPCC), and compare it with the state-of-the-art hardware transactional memory based CPU OLTP system (DrTM) and a GPU OLTP system (GPUTx). The experimental results show that GPU-TPS outperforms the CPU implementation by 3.8X for SmallBank and by 1.9X for TPCC, and outperforms the GPU implementation by 1.6X for SmallBank and by 1.8X for TPCC.

Accelerated Steady-State Torque Computation for Induction Machines Using Parallel-In-Time Algorithms

This paper focuses on efficient steady-state computations of induction machines. In particular, the periodic Parareal algorithm with initial-value coarse problem (PP-IC) is considered for acceleration of classical time-stepping simulations via non-intrusive parallelization in time domain, i.e., existing implementations can be reused. Superiority of this parallel-in-time method is in its direct applicability to time-periodic problems, compared to, e.g, the standard Parareal method, which only solves an initial-value problem, starting from a prescribed initial value. PP-IC is exploited here to obtain the steady state of several operating points of an induction motor, developed by Robert Bosch GmbH. Numerical experiments show that acceleration up to several dozens of times can be obtained, depending on availability of parallel processing units. Comparison of PP-IC with existing time-periodic explicit error correction method highlights better robustness and efficiency of the considered time-parallel approach.