Parallel Implementation Of Algorithm Research Articles

Parallel algorithm implementation for multi‐object tracking and surveillance

A recently developed sparse representation algorithm, has been proved to be useful for multi-object tracking and this study is a proposal for developing its parallelisation. An online dictionary learning is used for object recognition. After detection, each moving object is represented by a descriptor containing its appearance features and its position feature. Any detected object is classified and indexed according to the sparse solution obtained by an orthogonal matching pursuit (OMP) algorithm. For a real-time tracking, the visual information needs to be processed very fast without reducing the results accuracy. However, both the large size of the descriptor and the growth of the dictionary after each detection, slow down the system process. In this work, a novel accelerating OMP algorithm implementation on a graphics processing unit is proposed. Experimental results demonstrate the efficiency of the parallel implementation of the used algorithm by significantly reducing the computation time.

High performance computing in multi-scale modeling, graph science and meta-heuristic optimization

One of the main activities within the Group for Scientific Computing at the Faculty of Science are methods for efficiently utilizing real parallel architectures, typically clusters of SMP nodes, shared-memory systems, and GPUs. Focus is on the design, development and implementation of parallel algorithms and data structures for fundamental scientific and engineering problems. Message Passing Interface (MPI) is an important paradigm that still poses interesting design and implementation problems, especially combined with other programming models, like CUDA. In addition to standard HPC (High Performance Computing) technology stack, the Group also utilizes computing stacks like Hadoop and Spark. In this paper we present a short review of the recent research of the Group, focused on large-scale applications in various research fields with references to original articles. The first part considers multi-scale muscle modeling in mixed MPI-CUDA environment. In our approach, a finite element macro model is coupled with the microscopic Huxley kinetics model. The original approach in scheduling tasks within multi-scale simulation ensures good load balance, leading to speed-up of over two orders of magnitude and high scalability. The second part considers application of HPC in graph science for the task of establishing the basic structural features of the minimum-ABC index trees. In order to analyze large amounts of data (all trees of certain order) we utilize grid computing services like storage and computing in order to reduce analysis time up to three orders of magnitude. The last part presents WoBinGO framework for solving optimization problems on HPC resources. It overcomes the shortcomings of earlier static pilot-job frameworks by providing elastic resource provisioning using adaptive allocation of jobs with limited lifetime. The obtained results show that despite WoBinGO's adaptive and frugal allocation of computing resources, it provides significant speed-up when dealing with problems with computationally expensive evaluations, as found in hydro-informatics and market risk management.

Efficiency analysis of parallel implementation of SIMPLE algorithm on multi-processor computers

Efficiency analysis of parallel implementation of SIMPLE algorithm on multi-processor computers

GPUSCAN: GPU-Based Parallel Structural Clustering Algorithm for Networks

This paper presents a massively parallel implementation of a prominent network clustering algorithm, the structural clustering algorithm for networks (SCAN), on a graphical processing unit (GPU). SCAN is a fast and efficient clustering technique for finding hidden communities and isolating hubs/outliers within a network. However, for very large networks, it still takes considerable amount of time. With the introduction of massively parallel Compute Unified Device Architecture (CUDA) by Nvidia, applications properly employing GPUs are demonstrating high speed up. In current study, GPUSCAN, a CUDA based parallel implementation of SCAN, is presented. SCAN's computation steps have been carefully redesigned to run very efficiently on the GPU by transforming SCAN into a series of highly regular and independent concurrent operations. All intermediate data structures are created in the GPU to efficiently benefit from GPU's memory hierarchy. How these structures reformed and represented in the GPU memory hierarchy are illustrated. Now, through GPUSCAN, a large network or a batch of disjoint networks can be offloaded to the GPU for very fast and equivalent structural clustering. The performance of the GPU accelerated structural clustering has been shown to be much faster than the sequential CPU implementation. Both GPUSCAN and SCAN are tested on different size artificial and real-world networks. Results indicate that network becomes larger GPUSCAN significantly over performs SCAN. In tested datasets, speed-up of over 500-fold is achieved. For instance, calculating structural similarity and clustering of 5.5 million edges of the California road network in GPUSCAN is 513-fold faster than the serial version of SCAN.

A strategy for parallelising polygon rasterisation algorithms using multi-core CPUs

Polygon rasterisation is a fundamental process in geographic information science. Because of recent increases in the quantity of vector data, rapid rasterisation techniques are urgently needed. This study explores methods for combining processes and threads on multi-core CPUs to accelerate large-scale polygon rasterisation. First, a data decomposition method is adopted for effective load balancing between processes and threads. Second, a polygon processing strategy is proposed to manage four types of exceptional polygons. Using these approaches, a hybrid parallel framework is proposed to parallelise sequential rasterisation algorithms while maximising their processing speed. The experimental results show that the implemented parallel algorithm can efficiently reduce rasterisation time (from 40.62 h to 1.97 h) and obtain a satisfactory speed-up of 20.62. The proposed hybrid parallel algorithm outperforms pure process-level or pure thread-level implementations. Moreover, the proposed decomposition methods can provide consistently superior performance compared with conventional techniques and can achieve superior load balancing.

Parallel Implementation of Polarimetric Synthetic Aperture Radar Data Processing for Unsupervised Classification Using the Complex Wishart Classifier

This work investigates the parallel implementation of target decomposition and unsupervised classification algorithms for polarimetric synthetic aperture radar (POLSAR) data processing. The algorithms are implemented using two different parallel programming models: 1) clusters of CPUs, using message passing interface (MPI), and 2) commodity graphic processing units (GPUs), using the compute device unified architecture (CUDA). POLSAR data processing generally involves a large amount of computations as the full polarimetric information needs to be decomposed and analyzed. Our experiments reveal that GPU architectures provide a good framework for massive parallelization of POLSAR data processing. For instance, it is found that a single GPU can be more efficient than a cluster of 128 nodes with speedups of more than $100 \times $ in comparison with the single processor times. The proposed implementation makes the best use of low-level features in the GPU architecture such as shared memories, while also providing coalesced accesses to memory in order to achieve maximum performance.

Parallel implementation of the time-evolving block decimation algorithm for the Bose–Hubbard model

A system of ultracold atoms in an optical lattice represents a powerful experimental setup for testing the fundamentals of quantum mechanics. While its microscopic interaction mechanisms are well understood, the system behavior for a moderate number of particles is difficult to simulate due to a high dimension of its many-body space. This article presents TEBDOL, a parallel implementation of the time-evolving block decimation (TEBD) algorithm that can efficiently simulate time evolution of a one-dimensional chain of atoms in optical lattices. We investigate the parallelization strategy and the strong and weak scaling with the number of processes. Program summaryProgram title: TEBDOLCatalogue identifier: AEYN_v1_0Program summary URL:http://cpc.cs.qub.ac.uk/summaries/AEYN_v1_0.htmlProgram obtainable from: CPC Program Library, Queen’s University, Belfast, N. IrelandLicensing provisions: GNU General Public License v3.0No. of lines in distributed program, including test data, etc.: 9060No. of bytes in distributed program, including test data, etc.: 54338Distribution format: tar.gzProgramming language: Common Lisp.Computer: x86-64.Operating system: Linux.Has the code been vectorized or parallelized?: Parallelized using MPIRAM: 1–64 GBClassification: 7.7.External routines: Basic Linear Algebra Subprograms (BLAS), Linear Algebra Package (LAPACK), Message Passing Interface (MPI)Nature of problem: A system of neutral atoms in an optical lattice is a many-body quantum system that can be described using the Bose–Hubbard model. Hilbert space dimensions of many-body quantum models grow exponentially with the number of particles. Simulating time evolution in the Bose–Hubbard model is therefore a hard problem even in case of a moderate number of particles.Solution method: A system state is represented by a tensor network. Its time evolution is then simulated using the time-evolving block decimation (TEBD) algorithm.Restrictions: TEBDOL is limited to one-dimensional systems. The times accessible in the simulations are restricted by the growth of entanglement in the system.Unusual features: Tensor networks in TEBDOL support a global Abelian symmetry, i.e., the program conserves the total number of particles. Models with multiple particle species are supported as well. TEBDOL is implemented in Common Lisp and can run in parallel on a computer cluster.Running time: Running time depends on the lattice size, on the number of particles, and on the maximal allowed tensor dimensions. Simulations of simple models take a few seconds on a single CPU while simulations of large and complex models can take up to a week on a cluster with hundreds of CPUs.

GPU-Accelerated Parallel Coevolutionary Algorithm for Parameters Identification and Temperature Monitoring in Permanent Magnet Synchronous Machines

A hierarchical fast parallel co-evolutionary immune particle swarm optimization (PSO) algorithm, accelerated by graphics processing unit (GPU) technique (G-PCIPSO), is proposed for multiparameter identification and temperature monitoring of permanent magnet synchronous machines (PMSM). It is composed of two levels and is developed based on compute unified device architecture (CUDA). In G-PCIPSO, the antibodies (Abs) of higher level memory are selected from the lower level swarms and improved by immune clonal-selection operator. The search information exchanges between swarms using the memory-based sharing mechanism. Moreover, an immune vaccine-enhanced operator is proposed to lead the ${P}$ bests particles to unexplored areas. Optimized parallel implementations of G-PCIPSO algorithm is developed on GPU using CUDA, which significantly speeds up the search process. Finally, the proposed algorithm is applied to multiple parameters identification and temperature monitoring of PMSM. It can track parameter variation and achieve temperature monitoring online effectively. Compared with a CPU-based serial execution, the computational efficiency is greatly enhanced by GPU-accelerated parallel computing technique.

Feasibility study of genetic algorithms application for implementation of block cryptosystem cryptanalysis

Feasibility of genetic search algorithms application for implementation of the cryptanalysis of block cipher methods is considered. A distinctive feature of the bioinspired cryptanalysis methods application (in particular, genetic methods) is the possibility of using the encryption (or decryption) algorithm as an objective function for the suitability evaluation of the key defined by genetic operations. Consequently, when using the bioinspired cryptanalysis methods, the S key definition (for example, when using type 2 cryptanalysis) depends not so much on the complexity of the ciphering transformations, as on the bioinspired method which is to provide a sufficient variety of key generation that shows the significance of the research task of the bioinspired algorithms feasibility (in particular, genetic search methods) for the block cryptosystem cryptanalysis. It is noted also that as the distinctive feature of both block cipher methods, and the genetic algorithms is their internal parallelism, then the task of developing a cryptanalysis algorithm based on the parallel implementation of the constituent stages is relevant. An algorithm of the block methods cryptanalysis on the example of the DES standard on the basis of its parallel version is offered; the experiment results of the quasioptimal key determination obtained at the parallel algorithm implementation on the 8-letter text blocks are given. It is noted that time costs of the algorithm realization do not exceed the time of the known cryptanalysis implementation.

Data decomposition method for parallel polygon rasterization considering load balancing

It is essential to adopt parallel computing technology to rapidly rasterize massive polygon data. In parallel rasterization, it is difficult to design an effective data decomposition method. Conventional methods ignore load balancing of polygon complexity in parallel rasterization and thus fail to achieve high parallel efficiency. In this paper, a novel data decomposition method based on polygon complexity (DMPC) is proposed. First, four factors that possibly affect the rasterization efficiency were investigated. Then, a metric represented by the boundary number and raster pixel number in the minimum bounding rectangle was developed to calculate the complexity of each polygon. Using this metric, polygons were rationally allocated according to the polygon complexity, and each process could achieve balanced loads of polygon complexity. To validate the efficiency of DMPC, it was used to parallelize different polygon rasterization algorithms and tested on different datasets. Experimental results showed that DMPC could effectively parallelize polygon rasterization algorithms. Furthermore, the implemented parallel algorithms with DMPC could achieve good speedup ratios of at least 15.69 and generally outperformed conventional decomposition methods in terms of parallel efficiency and load balancing. In addition, the results showed that DMPC exhibited consistently better performance for different spatial distributions of polygons.

Implementation of the Parallel Algorithm of the Cross Power Spectral Density of Random Signals

Implementation of the Parallel Algorithm of the Cross Power Spectral Density of Random Signals

A GPU-based Parallel Ant Colony Algorithm for Scientific Workflow Scheduling

Scientific workflow scheduling problem is a combinatorial optimization problem. In the real application, the scientific workflow generally has thousands of task nodes. Scheduling large-scale workflow has huge computational overhead. In this paper, a parallel algorithm for scientific workflow scheduling is proposed so that the computing speed can be improved greatly. Our method used ant colony optimization approaches on the GPU. Thousands of GPU threads can parallel construct solutions. The parallel ant colony algorithm for workflow scheduling was implemented with CUDA C language. Scheduling problem instances with different scales were tested both in our parallel algorithm and CPU sequential algorithm. The experimental results on NVIDIA Tesla M2070 GPU show that our implementation for 1000 task nodes runs in 5 seconds, while a conventional sequential algorithm implementation runs in 104 seconds on Intel Xeon X5650 CPU. Thus, our GPU-based parallel algorithm implementation attains a speed-up factor of 20.7.

On scalable parallel recursive backtracking

Supercomputers are equipped with an increasingly large number of cores to use computational power as a way of solving problems that are otherwise intractable. Unfortunately, getting serial algorithms to run in parallel to take advantage of these computational resources remains a challenge for several application domains. Many parallel algorithms can scale to only hundreds of cores. The limiting factors of such algorithms are usually communication overhead and poor load balancing. Solving NP-hard graph problems to optimality using exact algorithms is an example of an area in which there has so far been limited success in obtaining large scale parallelism. Many of these algorithms use recursive backtracking as their core solution paradigm. In this paper, we propose a lightweight, easy-to-use, scalable approach for transforming almost any recursive backtracking algorithm into a parallel one. Our approach incurs minimal communication overhead and guarantees a load-balancing strategy that is implicit, i.e., does not require any problem-specific knowledge. The key idea behind our approach is the use of efficient traversal operations on an indexed search tree that is oblivious to the problem being solved. We test our approach with parallel implementations of algorithms for the well-known Vertex Cover and Dominating Set problems. On sufficiently hard instances, experimental results show nearly linear speedups for thousands of cores, reducing running times from days to just a few minutes.

Parallel cuda implementation of conflict detection for application to airspace deconfliction

Methods for maintaining separation between aircraft in the current airspace system rely heavily on human operators. A conflict is an event in which two or more aircraft experience a loss of minimum allowable separation. Interest has grown in developing more advanced automation tools to predict when a traffic conflict is going to occur and to assist in its resolution. The term air space deconfliction is used to describe the resolution of conflicts after they have been predicted or detected. Due to the computationally intensive character of conflict detection and airspace deconfliction, as well as their data parallel nature, they are naturally amenable to parallel processing. This work discusses a parallel implementation of a conflict detection algorithm for application to airspace deconfliction. It uses the NVIDIA Quadro FX 5800 and the Tesla C1060 graphical processing units (GPUs) in conjunction with the Compute Unified Device Architecture (CUDA) hardware/software architecture. Details of the implementation are discussed, including the use of streams for asynchronous programming and the use of multiple GPUs. The performance of the parallel implementation is compared to that of an equivalent sequential version and shown to exhibit improvement in execution time. Recommendations are provided to further improve performance of the algorithm.

Parallel Computing for Mixed-Stable Modelling of Large Data Sets

In this paper, we develop efficient parallel algorithms for the statistical processing of large data sets. Namely, we parallelize the maximum likelihood method for the estimation of parameters of the mixed-stable model. This method is known to be very computationally demanding. Financial German DAX stock index data are used as empirical data in this work. Several hierarchical levels of parallelism were distinguished, analyzed and implemented using OpenMP and MPI library. Parallel performance tests were conducted on the IBM SP6 supercomputer. Obtained performance results show that implemented parallel algorithms are very efficient and scalable on distributed and shared memory systems. Speedups up to 800 times were obtained for 1024 parallel processes. Noticeably, our parallel application is able to efficiently utilize the Simultaneous multithreading (Intel Hyper-Threading) technology in modern processors. This research demonstrates that the application of modern parallel technologies allows a fast and accurate estimation of mixed-stable parameters even for large amounts of data and promotes a wider use of stable modelling for the statistical data processing. DOI: http://dx.doi.org/10.5755/j01.itc.44.2.6723

Fast Fourier-Based Phase Unwrapping on the Graphics Processing Unit in Real-Time Imaging Applications

Numerous imaging techniques measure data that are mathematically wrapped to the finite interval [−π, π], corresponding to the principle value domain of the arctangent function. A wide range of reconstruction algorithms has been developed to obtain the true, unwrapped phase by adding an integral multiple of 2π to each point of the wrapped grid. However, the phase unwrapping procedure is hampered by the presence of noise, phase vortices or insufficiently sampled digital data. Unfortunately, reliable phase unwrapping algorithms are generally computationally intensive and their design often requires multiple iterations to reach convergence, leading to high execution times. In this paper, we present a high-speed phase unwrapping algorithm that is robust against noise and phase residues. By executing the parallel implementation of a single-step Fourier-based phase unwrapping algorithm on the graphics processing unit of a standard graphics card, we were able to reduce the total processing time of the phase unwrapping algorithm to < 5 ms when executed on a 640 × 480-pixel input map containing an arbitrarily high density of phase jumps. In addition, we expand upon this technique by inserting the obtained solution as a preconditioner in the conjugate gradient technique. This way, phase maps that contain regions of low-quality or invalid data can be unwrapped iteratively through weighting of local phase quality.

Parallel design and implementation of Error Diffusion Algorithm and IP core for FPGA

This paper offers an improved error diffusion algorithm for its real-time implementation in FPGA by creating Error-Error Diffusion Value Lookup Tables to spare multiplications, adopting four pipelines instead of traditional sequential process, and performing color error diffusion in four parallel channels among other techniques whereby it takes only one clock circle on average to get the halftone result of a pixel. In accordance with the Avalon bus specification, the improved algorithm is packaged into an IP core which is later adopted to construct a practical halftoning hardware system using the SOPC technique. Tests of the system in the "USB Direct Printing System" of the research office show that the IP core is efficient to meet the requirements of the printing domain.

Implementation of SVD Parallel Algorithm and its Application in Medical Industry

Singular value decomposition (SVD) is an important part of the numerical calculateion.It is widely used in biology, meteorology, quantum mechanics and other fields. It is discovered that the speed of calculation and accuracy has become the two basic questions of singular value decomposition during the construction process. With the era of big data,there are more and more cases of largescale data analysis using SVD. Singular value decomposition was originally an algorithm for computing resources are consumed, if still using the traditional stand-alone mode, will consume a lot of time cost. In order to improve the computing speed and accuracy, the system implement the parallel SVD algorithm which is based on unilateral jacobi method.It is used to analyze large-scale matrix about medicine for finding similarity of medicine efficacy.

State of the Art Parallel Approaches For Rsa Public Key Based Cryptosystem

RSA is one of the most popular Public Key Cryptography based algorithm mainly used for digital signatures, encryption/decryption etc. It is based on the mathematical scheme of factorization of very large integers which is a compute-intensive process and takes very long time as well as power to perform. Several scientists are working throughout the world to increase the speedup and to decrease the power consumption of RSA algorithm while keeping the security of the algorithm intact. One popular technique which can be used to enhance the performance of RSA is parallel programming. In this paper we are presenting the survey of various parallel implementations of RSA algorithm involving variety of hardware and software implementations.

Study of Various Parallel Implementations of Association Rule Mining Algorithm

In data mining, Apriori technique is generally used for frequent itemsets mining and association rule learning over transactional databases. The frequent itemsets generated by the Apriori technique provides association rules which are used for finding trends in the database. As the size of the database increases, sequential implementation of Apriori technique will take a lot of time and at one point of time the system may crash. To overcome this problem, several algorithms for parallel implementation of Apriori technique have been proposed. This paper gives a comparative study on various parallel implementation of Apriori technique .It also focuses on the advantages of using the Map Reduce technology, the latest technology used in parallelization of large dataset mining. Keywords: Data Mining, Association rules, Apriori, Hadoop , Map Reduce