P-type Silicon Wafers Research Articles

Morphology, chemical and electrical properties of CdO Nanoparticles on porous silicon

In this paper, CdO nanoparticles prepared by pulsed laser deposition techniqueonto a porous silicon (PS) surface prepared by electrochemical etching of p-type silicon wafer with resistivity (1.5-4Ω.cm) in hydrofluoric (HF) acid of 20% concentration. Current density (15 mA/cm2) and etching times (20min). The films were characterized by the measurement of AFM, FTIR spectroscopy and electrical properties.
 Atomic Force microscopy confirms the nanometric size.Chemical components during the electrochemical etching show on surface of PSchanges take place in the spectrum of CdO deposited PS when compared to as-anodized PS.
 The electrical properties of prepared PS; namely current density-voltage characteristics under dark, show that the pass current through the PS layer is more than that obtained from the CdO/PS/Si which is related to increasing junction resistivity that come from increasing in depletion width.

Photovoltaics literature survey (no. 149)

Photovoltaics literature survey (no. 149)

Impact of the doping concentration on the density of pores using metal-assisted chemical etch

Metal-assisted chemical etch (MACE) of silicon substrate in an etchant containing HF and H2O2 with different HF–H2O2 molar ratio R (R = [HF]/([HF] + [H2O2]), where [HF] and [H2O2] are the concentration of HF and H2O2 in mol/L respectively) using silver particles as catalyst was studied. Boron doped p-type (100) silicon wafers with resistivity of 0.01 Ω·cm and 10.65 Ω·cm were used as substrates and etched in the etchant with R = 0.7. It was found that the density of pores on the silicon substrate with resistivity of 0.01 Ω·cm was higher than that with resistivity of 10.65 Ω·cm. A p-type (100) silicon substrate, which was heavily and non-uniformly doped with boron, with nominal resistivity of 0.0013 Ω·cm was processed by using MACE in etchant with different R’s. By comparing the densities of etched pores at different doping regions, we came to the conclusion that the density of pores increased with the increase of doping concentration and with the decrease of R. It was especially obvious in the range where the pore size was smaller than the average size of silver particles. The possible reason was proposed. Finally, we used the two-point probe measurement technique to measure the resistance of this silicon substrate and verified the doping non-uniformity in the microscopic scale. This research can be applied on the detection of doping uniformity on one single wafer.

Photovoltaic characteristics of (E-Admantan fulgide thin film/P-Si single crystal) solar cell

A hybrid organic-inorganic solar cell (HOISc) has prepared by thermal evaporation of a thin film of {E-Adamantan-2-Ylidene - 4-[1 - (2, 5-dimethyl-3furyl) ethyldene] dihydro-2,5-Furandione} as a new member of the Fulgides’ family, on a single crystal of a p-type silicon wafer (P-Si). The analysis of the dark current, voltage characteristics suggested the presence of two conduction mechanisms; thermo-ionic assisted tunnelling mechanism followed by space charge limited current (SCLC) mechanism, which dominated by a single trap level. The reverse current was interpreted regarding either Pool-Frenkel or Schottky - effect. The dark, evacuated capacitance-voltage characteristic at room temperature exhibited an abrupt nature with a built-in voltage Vbi ≈ 0.26 Volt. The width of the depletion region,W ≈ 2.22 μm. The analysis of the photovoltaic characteristic at room temperature and under illumination of (23.56 mW cm−2) helped in the determination of some solar cell parameters such as; the open circuit voltage, VOC = 0.75 V, the fill factor, FF = 0.47 and the efficiency of the cell, η ≈ 6.892%.

Geometrical optimisation of core-shell nanowire arrays for enhanced absorption in thin crystalline silicon heterojunction solar cells.

Background: Elongated nanostructures, such as nanowires, have attracted significant attention for application in silicon-based solar cells. The high aspect ratio and characteristic radial junction configuration can lead to higher device performance, by increasing light absorption and, at the same time, improving the collection efficiency of photo-generated charge carriers. This work investigates the performance of ultra-thin solar cells characterised by nanowire arrays on a crystalline silicon bulk.Results: Proof-of-concept devices on a p-type mono-crystalline silicon wafer were manufactured and compared to flat references, showing improved absorption of light, while the final 11.8% (best-device) efficiency was hindered by sub-optimal passivation of the nanowire array. A modelling analysis of the optical performance of the proposed solar cell architecture was also carried out. Results showed that nanowires act as resonators, amplifying interference resonances and exciting additional wave-guided modes. The optimisation of the array geometrical dimensions highlighted a strong dependence of absorption on the nanowire cross section, a weaker effect of the nanowire height and good resilience for angles of incidence of light up to 60°.Conclusion: The presence of a nanowire array increases the optical performance of ultra-thin crystalline silicon solar cells in a wide range of illumination conditions, by exciting resonances inside the absorber layer. However, passivation of nanowires is critical to further improve the efficiency of such devices.

In Situ Growth of ZnO inside a Porous Silicon Matrix Obtained by Electrochemical Etching with a Hydrofluoric Acid-Formaldehyde Solution

We present zinc oxide (ZnO) particles obtained inside a porous silicon matrix in the same electrolytic process using a p-type silicon wafer in a hydrofluoric acid (HF) solution containing formaldehyde (CH2O) and hydrated zinc sulfate as additives. The X-ray diffraction pattern of the sample confirmed the presence of ZnO with a hexagonal-type wurtzite structure. Photoluminescence (PL) spectra of the samples, before and after the functionalization process, were measured to observe the effect of ZnO inside the porous silicon. The PL measurements of porous silicon functionalized with ZnO (ZnO/PS) revealed infrared, red, blue, and ultraviolet emission bands. The ultraviolet region corresponds to the band-band emission of ZnO, and the visible emission is attributed to defects. The results of the nitrogen adsorption/desorption isotherms of the PS and ZnO/PS samples revealed larger BET surface areas and pore diameters for the ZnO/PS sample. We conclude that ZnO/PS can be obtained in a one-step electrolytic process. These types of samples can be used in gas sensors and photocatalysis.

Temperature dependant electronic charge transport characteristics at MX2 (M = Mo, W; X = S, Se)/Si heterojunction devices

Nanosheets of two dimensional (2D) transition metal dichalcogenides (WS2, MoS2 and WSe2) have been synthesized by two stage solvothermal mediated sonochemical exfoliation method. The as-synthesized high quality and stable dispersions in the form of few layer nanosheets were characterized by X-ray diffraction (XRD), transmission electron microscopy (TEM), Raman spectroscopy. The nanosheets were deposited on p-type silicon wafer to from WS2/p-Si, MoS2/p-Si, and WSe2/p-Si, heterojunction diodes. Temperature dependent transport properties and conduction behavior were analyzed using I–V characteristics. Thermionic emission transport model with T0 affected current transport mechanism across the junction was found as the most possible current transport model for all the three prepared diodes. The results provide an easy and large area preparation of 2D layered transition metal dichalcogenide semiconductors for unique electro-optical applications.

Dielectric properties of Al/PVA/p-Si (MPS) Structure as a function of frequency and voltage

Abstract Metal-Polymer-Semiconductor (MPS) structure Al/PVA/p-Si was fabricated using polyvinyl alcohol (PVA) as an organic interfacial layer on a p-type silicon wafer by spin coating method. Frequency dependent dielectric properties like real and imaginary part of dielectric permittivity (dielectric constant e′ and dielectric loss e″), dissipation factor or loss tangent (tan δ), real and imaginary parts of the electric modulus (M′, M′′) of the fabricated MPS structure were investigated for various frequencies from 50 KHz to 1 MHz. Frequency dispersion has been found for all dielectric parameters. Simultaneously these were found to be a function of voltage. It was found that e′ and e″ decrease with the increase in frequency. M′ increases with frequency while M′′ shows a peak behaviour that shifts towards lower frequency with increasing applied voltage. All these changes in dielectric parameters may be attributed to surface states distribution at PVA/p-Si interface and interfacial polarization.

Degradation of Surface Passivation and Bulk in p-Type Monocrystalline Silicon Wafers at Elevated Temperature

The surface passivation quality and the bulk lifetime of boron-doped p-type Czochralski silicon wafers were studied in response to dark annealing at 175 °C, using in situ effective lifetime measurements. We investigated non-fired and fired silicon nitride (SiN x ), aluminum oxide (AlO x ) capped with SiN x , and thermally-grown silicon oxide (SiO2). Modulation in surface passivation quality and bulk lifetime was detected only in cases where hydrogen is assumed to be released into the silicon wafer from the dielectric (AlO x /SiN x stack and fired SiN x layer). Interestingly, the degradation of both the surface and the bulk were followed by a recovery. It is also interesting to note that the changes in the surface and the bulk seem to be related, as the surface degradation starts when the initial bulk degradation ends. This study indicates a possible involvement of hydrogen in both the degradation and the recovery processes. The evolution of the effective lifetime as a function of time is similar to that reported for carrier-induced degradation in multicrystalline wafers; however, occurring on a different time scale. Hence, these findings may also be valuable for investigation of other degradation mechanisms in different silicon materials.

Study of the relationship between metal-assisted chemical etching and direction of the applied electric field

Metal-assisted chemical etching (MACE) has been proposed as a promising alternative for the fabrication of micro/nano-structures on silicon with simple process and low cost. Electric field can be applied during the reaction to control the motion of charged particles so as to accelerate the reaction and form uniform vertical trenches with high aspect ratio. In this paper, boron doped p-type (100) silicon wafers with resistivity of 20 ∼ 30 Ω · cm was used as substrates. After coated with layers of 5 nm Ti and 10 nm Au, the silicon substrate was immersed into the etchant containing hydrofluoric acid (HF) and hydrogen peroxide (H2O2) with high HF-to-H2O2 concentration ratio (ρ) and an applied voltage of 40 volts. It was found that the direction of the applied electric field had a great influence on morphologies of the trenches. Deeper trenches with vertical sidewalls and relatively smoother bottom were observed when silicon substrate was connected to cathode of the power supply. Possible interpretation to these phenomena was proposed, and the effect of the electric field intensity and doping concentration was further studied.

Highly sensitive and reliable octyltrichlorosilane coated silicon sensors for nitrogen gas flow detection

In this article, we present highly sensitive and reliable nitrogen gas flow sensors based on surface modified n-type (n-Si) and p-type (p-Si) silicon wafers. The surfaces of n-Si and p-Si wafers were coated with octyltrichlorosilane (OTS) molecules. The surface modified n-Si and p-Si wafers were used as sensing elements. The sensing elements were kept on the 45° angle inclined to the experimental mount and nitrogen gas was flown over the inclined surface at subsonic velocities. The flow induced voltage generation is caused by the interplay between the mechanisms of Bernoulli's principle and Seebeck effect. The experimental results show that the half coated and full coated n-Si and p-Si wafers generate more voltage than that of the uncoated at a given velocity. In the case of n-Si wafers, the half coated surface generated voltage was ≈4.80 times than that of the uncoated surface. In the case of p-Si wafers, the half coated surface generated voltage was ≈3.83 times than that of the full coated. The surface analysis of the half and full coated surfaces show that the OTS SAM molecules on n-Si surfaces were homogeneous and well ordered, however on p-Si surfaces, the OTS SAM molecules were heterogeneous and disordered. The enhanced voltage generations and high sensitivities are caused by an effective change in the gradient of Fermi energy (EF) due to OTS SAM coating. The experimental observations and theoretical analysis of enhanced voltage generation show that the OTS surface modification causes synergism of different mechanisms, contributing to the cumulative increase of flow induced voltage. The effect of aging process on the reliability of the half coated OTS/n-Si and OTS/p-Si sensors were tested for 24 h, 30 days and 90 days, the experimental results confirm that the flow induced voltages are consistent and reproducible and both the OTS/n-Si and OTS/p-Si sensors are very reliable. The investigation of the effects of the coverage of the OTS SAM and the angle of inclination on the flow induced voltage shows that the 50% coverage of the OTS/n-Si, OTS/p-Si and the 45° angle of inclination produced a maximum flow induced voltage at any given velocity.

Annealing ambient effect on electrical properties of ZnO:Al/p-Si heterojunctions

Aluminum doped zinc oxide (ZnO:Al) thin films via 1.2 at. % Al content was deposited on p-type silicon wafers by using sol-gel dip coating technique to compare the effect of post treatment ambient on electrical characteristics of ZnO:Al/p-Si heterojunction. The annealing environment treatment was performed at 700 °C for 60 min under various gas ambients such as, air, argon, nitrogen, and vacuum. The deposited heterojunction samples were characterised in order to clarified its morphology and crystalline structure. The films showed an orientation along c-axis and the best electrical properties (0.75 × 10−4 Ω cm) were obtained for the sample prepared in vacum. The changes in electrical properties and current-voltage performance were compared with each other after p-n junction was annealed under different ambient conditions. The heterojunction electrical parameters were determined Therefore, it was possible to make an annealing ambient comparison of the heterojunction for the cost-effect production by using sol-gel dip coating technique to use as the diode in electronic devices.

Contactless non-destructive imaging of doping density and electrical resistivity of semiconductor Si wafers using lock-in carrierography

A contactless non-destructive imaging method for spatially resolved dopant concentration, [2.2] Nd, and electrical resistivity, ρ, of n- and p-type silicon wafers using lock-in carrierography images at various laser irradiation intensities is presented. Amplitude and phase information from wafer sites with known resistivity was employed to derive a calibration factor for accurate determination of the absolute carrier generation rate. A frequency-domain model based on the nonlinear nature of photocarrier radiometric signals was used to extract dopant density images. Lateral variations in the resistivity of an n-type and a p-type wafer obtained by means of this methodology were found to be in excellent agreement with those obtained with conventional 4-point probe measurements. This all-optical contactless method can be used as a non-destructive tool for doping density and electrical resistivity measurements and their images over large semiconductor areas. Nd, ρ and their variances can be measured and mapped for the photovoltaic, micro- and opto-electronic industries including on wafers with oxides or surface treated layers for which contacting electrical measurements are impossible.

On the impact of dark annealing and room temperature illumination on p-type multicrystalline silicon wafers

In the past few years, carrier-induced degradation (CID) in p-type multicrystalline silicon (mc-Si) has been receiving significant attention. Recently, it has been reported that this material is also susceptible to degradation under dark anneal at moderate temperatures. In the first part of this study, we investigate the impact of the dark anneal temperature on mc-Si wafers. We identify both degradation and regeneration of the effective lifetime, where higher temperatures lead to faster rates and lower degradation extent. A fitting model is developed to describe the kinetics of these processes, where the degradation and regeneration process are assumed to happen simultaneously. An Arrhenius analysis of the degradation and regeneration rates, extracted from the proposed model, determines activation energies of 1.08 ± 0.05 eV for the degradation process and 1.11 ± 0.04 eV for the regeneration one. An improvement of the minority carrier effective lifetime of up to 40% is observed after a long dark anneal process. This improvement is associated with enhancement of both the bulk and surface passivation. Temperature- and injection-dependent lifetime spectroscopy measurements indicate that the recombination parameters of the associated defect causing the degradation in the dark are similar to those determined for the CID-related defect; therefore, it seems both defects have a similar nature.In the second part of the study, the effect of the illumination intensity at room temperature on the degradation/regeneration is studied. Surprisingly, an improvement in the effective lifetime is found, followed by a very slow degradation. The proposed model is found to be suitable to fit these measurements. The extracted rates suggest that the observed behavior is due to a regeneration that is much faster than the degradation.The reported findings provide new insights into CID in p-type mc-Si that will help improve understanding and assist in developing mitigation solutions.

An experimental study of optoelectronic properties of porous silicon for solar cell application

The main aim of this paper is to enhance the efficiency of solar cell by reducing the reflectivity with the cost effective approach. If resistivity of the silicon wafer is increased the wafer cost is decreased. Hence, the high resistive p-type silicon wafer is used here to fabricate the porous silicon. Electro chemical etching process is used to synthesize the porous silicon from the high resistive bulk silicon. The etching parameters like current density is maintained as constant as 10 mA/cm2 and etching time are varied as 60, 120 and 180 min. Electrochemical etchant like HF and isopropanol are mixed in the ratio of 1:2. The porosity is determined by gravimetric method and the photoluminescence and spectrum absorption are investigated by using the spectroflurometer. Based on the result, refractive index and band gap is determined. The obtained photoluminescence response shows that if the porosity of the Psi is increased, then the band gap is also increased. The maximum porosity achieved is 84.21% for the etching time 180 min. and maximum energy band gap is obtained as 1.8921 eV for the wavelength 655.35 nm. Hence, it is proved that low cost, high resistive wafer is also capable to fabricate the anti reflective solar cell.

Band gap Measurement of P – type Monocrystalline Silicon Wafer

Band gap of P-type monocrystalline silicon wafer has been measured using spectral response measurement system. To see the spectral response a SR510 lock in amplifier, SR540 optical chopper, monochromator (400nm-1200nm), optical detector and lab view software has been used. From spectral response of polished P-type monocrystalline silicon wafer absorption, reflection and transmission has been respectively seen from 400nm-550nm, 550nm-1050nm and 1050-1200nm. Assuming band gap of silicon is (1.12eV), this result has been theoretically verified using Planck–Einstein relation. Moreover, theoretical band gap of silicon has been calculated (1.127362 eV). The band gap measurement process uses partial concept of Tauc’s downhill negative slop and Planck–Einstein relation. Experimental result shows that, the band gap of silicon is 1.127907 eV.Bangladesh J. Sci. Ind. Res.53(3), 179-184, 2018

Mechanism research of negative resistance oscillations characteristics of the silicon magnetic sensitive transistor with long base region

A silicon magnetic sensitive transistor (SMST) with the negative resistance oscillation phenomenon is presented in this paper. The SMST of cubic structure is composed of three regions and three electrodes (E, C and B). Two of the regions (collector region and base region) are designed on the top surface of the SMST, and the emitter region is designed at the bottom of the SMST. Using microelectromechanical system (MEMS) technology, the chip is fabricated on [Formula: see text] orientation p-type silicon (near intrinsic) wafer and packaged on printed circuit board (PCB). When collector voltage (V[Formula: see text]) and the base injecting current (I[Formula: see text]) are a certain value, the experimental results show that the collector current (I[Formula: see text]) attains negative resistance oscillation phenomenon and it is influenced by the external magnetic field (B) and temperature (T). Based on the effect of deep-level impurities on the carrier net recombination rate, theoretical analysis demonstrates that the deep-level impurities are the main factors of the appearance for oscillations phenomenon.

Responsivity of porous silicon for blue visible light with high sensitivity

In this work, porous silicon (PS) are fabricated using electrochemical etching (ECE) process for p-type crystalline silicon (c-Si) wafers of (100) orientation. The structural, morphological and electrical properties of PS synthesized at etching current density of (10, 20, 30) mA/cm2 at constant etching time 10 min are studied. From X-ray diffraction (XRD) measurement, the value of FWHM is in general decreases with increasing current density for p-type porous silicon (p-PS). Atomic force microscope (AFM) showed that for p-PS the average pore diameter decreases at 20 mA. Porous silicon which formed on silicon will be a junction so I-V characteristics have been studied in the dark to calculate ideality factor (n), and saturation current (Is) for these junctions. These junctions are used in photo sensors applications, where the photo sensors have been examined at blue light region. Sensitivity, rise and fall times have been calculated for this wavelength, the maximum value for sensitivity is (3797.6 %) at etching current density 10 mA/cm2 under blue light illumination at zero bias voltage.

Thermal conductivity reduction in highly doped mesoporous silicon: The effect of nano-crystal formation

The study of heat transfer properties in mesoporous silicon, fabricated from highly doped p-type and n-type silicon wafers, is presented. Measurements were performed by a laser induced transient thermal grating technique, which allowed us to determine the effective (in-plane) thermal conductivity. It is shown that the thermal conductivity undergoes a significant decrease with respect to bulk values mainly due to a reduction of the phonon mean free path of the solid matrix. This reduction can be ascribed to the formation of nano-crystalline domains, which are a consequence of the wet etching fabrication method. Additionally, the in-plane thermal conductivity was analyzed by employing a modified effective medium approach, which includes the phonon mean free path reduction due to the presence of both the nanometric pores and the nano-crystalline domains. The theoretical analysis shows good agreement with our measurements, indicating that the inclusion of phonon mean free path reduction to an effective medium approach is a well-suited method for studying the thermal conductivity of porous silicon.

Characterization of Wafer-Bonded Oxide-Free Silicon with Surfaces Treated with an Ion-Bombardment Procedure

While direct wafer-bonding can be used for device fabrication, it can also be used as a pathway for characterizing and understanding the properties of interfaces across bonded materials. In this work, an ion-bombardment process with varying ion energies in an EVG® ComBond® high vacuum wafer-bonding system is used to remove the native oxides on (001) p-type silicon wafers [1]. The results of argon ions with ion energies varying over one order of magnitude (from a factor of 0.2 to 2 of a baseline energy E0) are presented in this study. Removing oxide layers between two bonded materials can lead to electrically conductive interfaces of the bonded structure; however, the consequence of employing this ion-bombardment procedure is that it induces surface and sub-surface damage of the wafer. This resulting damage limits the bonded interface’s electrical conductivity by forming a barrier to electronic transport across the bonded interface. The thicknesses and densities of the damaged surfaces were determined using x-ray reflectivity (XRR) and spectroscopic ellipsometry (SE). XRR and SE also both revealed a transition layer at the interface between the bulk (crystalline) silicon and the damaged silicon region. XRR results show that upon increasing the ion energy from 0.2·E0 to 0.4·E0, the damaged layer thickness remains constant or even decreases slightly (from 2.2 ± 0.3 nm to 1.8 ± 0.3 nm) while the transition layer thickness maintains ~1.0 nm in both samples. However, increasing the ion energy from 0.4·E0 to 2·E0 results in an increase in the damage layer thicknesses from 1.8 ± 0.3 nm to 3.5 ± 0.3 nm as well as a thickness increase of transition layers from ~1.0 ± 0.2 nm to 3.0 ± 0.2 nm. Interestingly, the damaged silicon layer density is approximately the same across all ion energies used. The resulting damaged silicon region has a density 20% less than that of crystalline Si and deposited amorphous silicon. Cross-sectional transmission electron microscopy (X-TEM) images of 0.4·E0 and 2·E0 samples show that the damage region between the bonded wafers spans 3.7 nm and 7.5 nm, respectively, in agreement with the XRR and SE results for single wafer thicknesses. Bonded pairs with thicker damaged regions exhibit lower electrical conductivity across the interface. Current-voltage (I-V) measurements show that the 0.4·E0 and 2·E0 samples exhibited interfacial resistances of about 0.8 kΩ and 39 kΩ, respectively. X-TEM images show that annealing at 450 °C for 12 hours removes nearly all of the damage region. The removal of the damaged region after annealing is consistent with subsequent I-V measurements that show negligible interfacial resistance. In other words, the electrical conductivity across the bonded interface is comparable to the conductivity within the individual wafers, which suggests the energy barrier across the interface due to the damaged region is mitigated after annealing. A model of the energy barrier profile across the interface due to the damage region is presented. Reference [1] C. Flötgen,et al., ECS Transactions 64, 103-110 (2014). Figure 1