Oxide Breakdown Field Research Articles

TEOS-based low-pressure chemical vapor deposition for gate oxides in 4H–SiC MOSFETs using nitric oxide post-deposition annealing

The use of SiO2/4H–SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) can be problematic due to high interface state density (Dit) and low field-effect mobility (μfe). Here, we present a tetra-ethyl-ortho-silicate (TEOS)-based low-pressure chemical vapor deposition (LPCVD) method for fabricating the gate oxide of 4H–SiC MOSFETs using nitric oxide post-deposition annealing. SiO2/4H–SiC MOS capacitors and MOSFETs were fabricated using conventional wet and TEOS oxides. The measured effective oxide charge density (Qeff) and Dit of the TEOS-based LPCVD SiO2/4H–SiC MOS capacitor with nitridation were 4.27 × 1011 cm−2 and 2.99 × 1011 cm−2eV−1, respectively. We propose that the oxide breakdown field and barrier height were dependent on the effective Qeff. The measured μfe values of the SiO2/4H–SiC MOSFETs with wet and TEOS oxides after nitridation were, respectively, 11.0 and 17.8 cm2/V due to the stable nitrided interface between SiO2 and 4H–SiC. The proposed gate stack is suitable for 4H–SiC power MOSFETs.

High-pressure microwave plasma oxidation of 4H-SiC with low interface trap density

Microwave plasma oxidation under a relatively high pressure (6 kPa) region is developed to rapidly grow a high-quality SiO2 layer on 4H-SiC, based on a thermodynamic analysis of SiC oxidation. By optimizing the plasma power, an atomically flat interface is achieved, and the interface trap density is lower than that of standard 1300 °C thermal-oxidized and 1350 °C NO-annealed samples measured by various methods under multiple temperature conditions. Moreover, the oxide breakdown field is higher than 9.3 MV/cm, which is comparable to that of a sample produced by high-temperature thermal oxidation. Particularly, the results of electron energy loss spectroscopy show that the transition layer between 4H-SiC and SiO2 is lower than 2 nm, indicating that microwave plasma oxidation can greatly suppress the formation of interface defects. The results strongly demonstrate the effectiveness of high-pressure plasma oxidation for SiC.

Gate Damages Induced in SiC Power MOSFETs During Heavy-Ion Irradiation—Part II

This article presents the results of a 2-D finite element simulation study of the gate damages induced by heavy-ion irradiation in SiC power metal–oxide–semiconductor field-effect transistors (MOSFETs). The time evolution of the electric field in the gate oxide is studied. Two effects are investigated: the first is associated with the charge deposition in the SiC portion of the MOSFET, with the time evolution studied using the 2-D finite element simulator; the second one results from holes generated during the ion transit, trapped in the gate oxide after the fast electrons have been quickly swept away by the electric field. Two different techniques have been combined for estimating the hole concentration in the gate oxide: the well-known recombination rate was modified to consider the trapped charge yield, as was recently done to better interpret single event gate rupture (SEGR) failure of silicon power MOSFETs. Under ion irradiation test conditions at which the gate damage experimentally starts to be observed, we demonstrate that, because of the ion impact, regardless of the ion linear energy transfer (LET), the peak value of the electric field in the gate oxide becomes practically equal to the oxide breakdown field (~12–15 MV/cm). Moreover, we show that simulations can be used to predict the test conditions at which gate damage starts to appear as a function of LET and the range of heavy ions used in the irradiation experiments.

Controlled oxide interlayer for improving reliability of SiO2/GaN MOS devices

AbstarctThe impact of controlling Ga-oxide (GaOx) interlayers in SiO2/GaOx/GaN gate stacks is investigated by means of physical and electrical characterizations. Direct deposition of SiO2 insulators produces thin GaOx interlayers, and subsequent oxidation treatment attains high-quality insulator/GaN interface. However, the Ga diffusion into the SiO2 layers severely degrades the breakdown characteristics of GaN-MOS devices. To improve reliability of such devices, we proposed a two-step procedure with the initial SiO2 deposition conducted under nitrogen-rich ambient, followed by thick SiO2 capping. We found that this two-step procedure enables nitrogen incorporation in the insulator/GaN interface to stabilize GaN surface. Consequently, the Ga diffusion into the SiO2 overlayer during the oxidation annealing is effectively suppressed. The proposed method allows us to achieve a SiO2/GaOx/GaN stacked structure of superior electrical property with improved Weibull distribution of an oxide breakdown field and with interface state density below 1010 cm−2 eV−1.

Leakage current conduction, hole injection, and time-dependent dielectric breakdown of n-4H-SiC MOS capacitors during positive bias temperature stress

The conduction mechanism(s) of gate leakage current JG through thermally grown silicon dioxide (SiO2) films on the silicon (Si) face of n-type 4H-silicon carbide (4H-SiC) has been studied in detail under positive gate bias. It was observed that at an oxide field above 5 MV/cm, the leakage current measured up to 303 °C can be explained by Fowler-Nordheim (FN) tunneling of electrons from the accumulated n-4H-SiC and Poole-Frenkel (PF) emission of trapped electrons from the localized neutral traps located at ≈2.5 eV below the SiO2 conduction band. However, the PF emission current IPF dominates the FN electron tunneling current IFN at oxide electric fields Eox between 5 and 10 MV/cm and in the temperature ranging from 31 to 303 °C. In addition, we have presented a comprehensive analysis of injection of holes and their subsequent trapping into as-grown oxide traps eventually leading to time-dependent dielectric breakdown during electron injection under positive bias temperature stress (PBTS) in n-4H-SiC metal-oxide-silicon carbide structures. Holes were generated in the heavily doped n-type polycrystalline silicon (n+-polySi) gate (anode) as well as in the oxide bulk via band-to-band ionization by the hot-electrons depending on their energy and SiO2 film thickness at Eox between 6 and 10 MV/cm (prior to the intrinsic oxide breakdown field). Transport of hot electrons emitted via both FN and PF mechanisms was taken into account. On the premise of the hole-induced oxide breakdown model, the time- and charge-to-breakdown (tBD and QBD) of 8.5 to 47 nm-thick SiO2 films on n-4H-SiC were estimated at a wide range of temperatures. tBD follows the Arrhenius law with activation energies varying inversely with initial applied constant field Eox supporting the reciprocal field (1/E) model of breakdown irrespective of SiO2 film thicknesses. We obtained an excellent margin (6.66 to 6.33 MV/cm at 31 °C and 5.11 to 4.55 MV/cm at 303 °C) of normal operating field for a 10-year projected lifetime of 8.5 to 47 nm-thick SiO2 films on n-4H-SiC under positive bias on the n+-polySi gate. Furthermore, the projected maximum operating oxide field was little higher in metal gate devices compared to n+-polySi gate devices having an identically thick thermal SiO2 films under PBTS.

(Invited) Anodic Oxide Formation and Oxygen Evolution on Metals Such As Al and Ta - Experiment and Simulation

This presentation recalls the peculiarities of anodic polarization valve metals namely aluminium and Tantalum. Both metals are very unnoble and react immediately with oxygen or water. They form an anodic oxide that hinders further transport of anions and cations through this film. Upon higher polarization the electrical field in the oxide exceeds the critical value of oxide formation field strength enabling metal cations and oxygen anions to migrate within the high field gradient in a thermally activated and field supported hopping process. This mechanism that is known as the high field mechanism of oxide formation nicely explains the most important aspects of oxide formation but some of the kinetic observations require a more sophisticated description that is called the extended high field model. As a result of the ions injected into the adjacent phases through the interface, a space charge is formed that drastically changes the local field strength. Since the potential drop over the entire film thickness remains constant, other regions of the film must compensate the reduced interface potential drop. This leads to a temporal imbalance of the driving forces within the oxide. For a limited time the charge carrier concentration can become extremely high, resulting in an experimentally observed maximum in current density named overshoot. This overshoot is not only observed in potentiostatic experiments but also in potentiodynamic scans. Both types of experiments can be satisfyingly simulated on the basis of this model. Under specific conditions however, oxide formation is not the only occurring process, meaning that the current efficiency in terms of oxide formation is below 100%. There are at least two different charge transport mechanism leading to oxygen evolution. The first one is the more obvious one in which the oxide breakdown field strength is exceeded resulting in a, at least temporal and/or local, destruction of the oxide film, that allows charge flow into this side reaction. The second one is less obvious since direct elastic tunnelling of electrons is not possible over a range of a few nm. A large number of defects in the insulating oxide film which can also be described as states in the band gap may allow charge transport in an unexpected way. The importance of these findings, the model behind, and the industrial applications will be discussed.

PECVD와 NO 어닐링 공정을 이용하여 제작한 N-based 4H-SiC MOS Capacitor의 SiC/SiO2 계면 특성

본 연구에서는 4H-SiC MOSFET의 주요 문제점인 <TEX>$SiC/SiO_2$</TEX> 계면의 특성을 향상시키기 위해 PECVD (plasma enhanced chemical vapor deposition) 공정을 이용하여 n-based 4H-SiC MOS Capacitor를 제작하였다. 건식 산화 공정의 낮은 성장속도, 높은 계면포획 밀도와 <TEX>$SiO_2$</TEX>의 낮은 항복전계 등의 문제를 극복하기 위하여 PECVD와 NO어닐링 공정을 사용하여 MOS Capacitor를 제작하였다. 제작이 끝난 후, MOS Capacitor의 계면특성을 hi-lo C-V 측정, I-V 측정 및 SIMS를 이용해 측정하고 평가하였다. 계면의 특성을 건식 산화의 경우와 비교한 결과 20% 감소한 평탄대 전압 변화, 25% 감소한 <TEX>$SiO_2$</TEX> 유효 전하 밀도, 8MV/cm의 증가한 <TEX>$SiO_2$</TEX> 항복전계 및 1.57eV의 유효 에너지 장벽 높이, 전도대 아래로 0.375~0.495eV만큼 떨어져 있는 에너지 영역에서 69.05% 감소한 계면 포획 농도를 확인함으로써 향상된 계면 및 산화막 특성을 얻을 수 있었다. In this research, n-based 4H-MOS Capacitor was fabricated with PECVD (plasma enhanced chemical vapor deposition) process for improving SiC/<TEX>$SiO_2$</TEX> interface properties known as main problem of 4H-SiC MOSFET. To overcome the problems of dry oxidation process such as lower growth rate, high interface trap density and low critical electric field of <TEX>$SiO_2$</TEX>, PECVD and NO annealing processes are used to MOS Capacitor fabrication. After fabrication, MOS Capacitor's interface properties were measured and evaluated by hi-lo C-V measure, I-V measure and SIMS. As a result of comparing the interface properties with the dry oxidation case, improved interface and oxide properties such as 20% reduced flatband voltage shift, 25% reduced effective oxide charge density, increased oxide breakdown field of 8MV/cm and best effective barrier height of 1.57eV, 69.05% reduced interface trap density in the range of 0.375~0.495eV under the conduction band are observed.

Influence of low temperature oxidation and nitrogen passivation on the MOS interface of C-face 4H-SiC

Wet and dry thermal oxidations on carbon (C)-face 4H-SiC samples were carried out at temperatures of 850°C, 900°C, 950°C, and 1000°C at different durations, followed by Ar anneals at the same temperature as the oxidations and NO anneals at 1175°C for different durations. The Fowler–Nordheim tunneling exhibits between 2 and 4MVcm−1, respectively, and then the breakdown occurs at around 6–8MVcm−1. The wet oxidation at 950°C provides the lowest interface trap density of 4–6×1011cm−2eV−1 at 0.24eV below the conduction band. Experiments also demonstrate that the oxide breakdown field for an N-implanted sample is lower than that of the non-implanted samples. However, the oxide breakdown field for an Al-implanted sample is even lower than that of the N-implanted sample, only 1.5MVcm−1, mainly due to damage caused by ion implantation.

POCl3 Annealing as a New Method for Improving 4H-SiC MOS Device Performance

Effects of POCl3 annealing on the electrical properties of metal-oxide-semiconductor (MOS) devices on 4H-SiC were investigated. Comparative results of non-annealed, NO-annealed, and POCl3-annealed MOS devices are shown. POCl3 annealing is more effective to reduce interface state density and improve channel mobility than conventional NO annealing. Breakdown characteristics and reliability of annealed oxides were also investigated. POCl3 annealing did not deteriorate oxide breakdown field very much. Time-dependent dielectric breakdown characteristics indicated different behavior due to enhanced electron trapping in the oxide. It is related with uniformly distributed phosphorus in the oxide. Flat-band voltage shift due to interface traps and near-interface traps in the oxide was very small at low oxide fields (< 3 MV/cm), whereas injected electrons were easily trapped in the POCl3 annealed oxide at high oxide fields (> 5 MV/cm). By combination of NO and POCl3 annealing, relatively high channel mobility and stabilized characteristics against electron injection were achieved.

Effect of POCl&lt;sub&gt;3&lt;/sub&gt; Annealing on Reliability of Thermal Oxides Grown on 4H-SiC

We have evaluated the reliability of POCl3-annealed oxides on 4H-SiC using time-zero dielectric breakdown (TZDB), constant current time-dependent dielectric breakdown (CC-TDDB), and high-frequency capacitance-voltage (C-V) measurements after electron injection. The POCl3 annealing does not deteriorate oxide breakdown field very much, still keeping an average value of larger than 9 MV/cm. However, the electron injection into POCl3-annealed oxide brings negative charges easily. From the C-V measurements, the POCl3-annealed capacitors were found to indicate a large positive flatband voltage shift after electron injection. Phosphorus atoms in the oxide may be related to the trapping site of injected electrons. The distribution and density of phosphorus in the oxide should be optimized to realize highly reliable 4H-SiC MOSFETs with high performance.

High Pressure Oxidation of 4H-SiC in Nitric Acid Vapor

High pressure chemical vapor oxidation of SiC in nitric acid vapor is reported. Higher growth rate at temperatures as low as 400 to 500 °C has been achieved. The oxidation kinetics has been studied. It has been observed that the growth rate is strongly dependent on temperature, and the thickness of the oxide increases almost linearly with time within the error limits. X-ray photoelectron spectroscopy (XPS) measurement has been carried out to study the composition of the oxide. Room temperature electrical characterization (current–voltage and capacitance–voltage) has been carried out to estimate the oxide breakdown field strength, oxide charges, and interface state density. It is observed that prolonged oxidation or oxidation at higher temperature in acid ambient deteriorates the quality of oxide.

Effects of N2O Postdeposition Annealing on Metal-Organic Decomposed CeO2 Gate Oxide Spin-Coated on GaN Substrate

Effects of postdeposition annealing (PDA) in N2O ambient on metal-organic decomposed CeO2 films deposited on GaN substrate had been reported. The utilization of N2O gas during PDA had successfully suppressed the decomposition of GaN as revealed by x-ray diffraction (XRD). XRD had detected the presence of CeO2 and α-Ce2O3 phases, wherein the phase transformation of CeO2 to α-Ce2O3 led to the formation of β-Ga2O3 interfacial layer (IL). Formation of IL comprising of Ga–O and Ga–O–N compounds in CeO2/GaN system was verified by dark-field scanning transmission electron microscope image and energy dispersive x-ray line profile, respectively. The metal–oxide–semiconductor characteristics of CeO2/GaN structure showed a change of negative to positive effective oxide charge (Qeff) and increasing interface-trap density (Dit) as a function of PDA temperature. The highest oxide breakdown field demonstrated by 1000°C-annealed sample was correlated with Qeff and Dit. A detailed explanation on this correlation as well as current transport mechanism in these oxides has been presented.

MOS Characteristics of C-Face 4H-SiC

Metal–oxide–semiconductor (MOS) capacitors and MOS field-effect transistors (MOSFETs) fabricated on the carbon face of 4H-SiC were characterized following different postoxidation annealing methods used to passivate the oxide–semiconductor (O–S) interface. Of the various processes studied, sequential postoxidation annealing in NO followed by atomic hydrogen gave the lowest interface trap density (D it). Direct oxidation/passivation in NO yielded somewhat better I–V characteristics, though all passivation ambients produced approximately the same breakdown field strength. n-Channel MOSFETs showed high channel mobility at low field, which is likely caused by the presence of mobile ions at the O–S interface. Comparisons with the silicon face are presented for interface trap density, oxide breakdown field, and channel mobility. These comparisons suggest that the carbon face does not offer significant performance advantages.

Formation, etching and electrical characterization of a thermally grown gallium oxide on the Ga-face of a bulk GaN substrate

Thermal oxides on the Ga-face of low defect density bulk gallium nitride (GaN) were controllably produced under varying conditions and subsequently analyzed. The thermal oxidation was performed in a dry oxygen atmosphere at different temperatures and different oxidation times. Each oxide layer was identified as the monoclinic β-Ga 2O 3 by a θ–2 θ X-ray diffraction (XRD) scan. Complementary Auger electron spectroscopy (AES) and high-resolution X-ray photoelectron spectroscopy (XPS) were also performed to study the chemical and electronic states of the oxide. The surfaces of the as-grown oxide and the GaN surfaces (after oxide removal) were studied using scanning electron microscopy (SEM). The roughness of both surfaces was found to increase with increasing oxidation temperature. Schottky diodes were fabricated on the GaN surfaces after oxide removal to further examine the surface quality. An excess reverse leakage current was found for Schottky diodes fabricated on GaN surfaces that were oxidized at 950 °C or 1000 °C, indicating possible surface decomposition at these two temperatures. The characteristics of wet and dry etching of the gallium oxide layer were also investigated. Finally, metal–oxide–semiconductor (MOS) capacitors were fabricated using thermally oxidized bulk GaN substrates. Current–voltage ( I– V) measurements showed a low reverse current of 1.5 pA at −10 V. The oxide breakdown field was determined to be 0.65 MV/cm. Capacitance–voltage ( C– V) measurements displayed a deep depletion feature, and the interface trap density near the conduction band was estimated to be in the low 10 11 eV −1 cm −2 range.

Effects of thermal nitrided gate-oxide thickness on 4H silicon-carbide-based metal-oxide-semiconductor characteristics

The effects of thermal nitrided gate-oxide thickness on n-type 4H silicon-carbide-based metal-oxide-semiconductor characteristics have been reported. Seven different thicknesses of oxide (tox), ranging from 2to20nm, have been investigated. It has been shown that effective oxide charge (Qeff) and total interface-trap density (Nit) have demonstrated a cyclic trend as tox is increased. These observations have been explained in the letter. Correlations of Qeff and Nit with oxide breakdown field and current transport mechanism in these oxides have also been established and explained.

Effect of Reactive-Ion Etching on Thermal Oxide Properties on 4H-SiC

4H-SiC MOS capacitors were used to characterize the effect of reactive-ion etching of the SiC surface on the electrical properties of N2O-grown thermal oxides. The oxide breakdown field reduces from 9.5 MV/cm with wet etching to saturate at 9.0 MV/cm with 30% reactive-ion over-etching. Additionally, the conduction-band offset barrier height, φB, progressively decreases from 2.51 eV with wet etching to 2.46 eV with 45% reactive-ion over-etching.

4H-SiC oxynitridation for generation of insulating layers

This paper describes the present state of a nitrogen-based passivation forSiO2 layers on 4H-SiC. Interface state density, oxide breakdown field, channel mobility and gateoxide reliability have been characterized following nitric oxide (NO) passivationanneals. The kinetics of nitrogen incorporation and the quantitative modellingbetween nitrogen content and interface trap density with NO anneals have also beendiscussed.

Rapid thermal oxidation of radio frequency sputtered polycrystalline silicon germanium films

The oxide growth of rf sputtered polycrystalline Si1−xGex films was found not sensitive to the Ge concentration in the films. The infrared results showed that the oxide grown on Si0.61Ge0.39 film mainly contained GeO2 and the oxide contained Ge–O–Ge and Si–O–Ge bonds when grown on Si0.73Ge0.27 film. X-ray photoelectron spectroscopy results showed the absence of Ge in the bulk of the oxides for Si1−xGex films with x&amp;lt;0.27 and no pile-up of Ge at the SiO2/Si1−xGex interface. The electrical breakdown fields of oxides grown on Si1−xGex films were lower than the oxide breakdown field of polysilicon. The Dit and Qf values of the SiO2/Si1−xGex system were found to be rather high at ∼2.1–2.6×1012 eV−1 cm−2 and ∼1.1–2.7×1012 cm−2, respectively.

Electrical properties of rapid thermal oxides on Si1−x−yGexCy films

The electrical characteristics of rapid thermal oxides on Si1−x−yGexCy layers are reported. X-ray photoelectron spectroscopy results indicate segregation of Ge at the SiO2/Si1−x−yGexCy interface, a thin GeO2 layer at the oxide surface, and elemental Ge at the interface and in the oxide. The interface state density of the samples ranges from 3.0×1011 to 3.6×1012 eV−1 cm−2. All the samples show electron trapping behavior and the trap generation rate decreases with increasing C concentration. The charge-to-breakdown value and the oxide breakdown field are higher for Si0.887Ge0.113 than for Si1−x−yGexCy samples, and these values decrease with increasing C concentration.

Thick Oxide Layers on N and P SiC Wafers by a Depo-Conversion Technique

ABSTRACTThe electrical properties of thick oxide layers on n and p-type 6H-SiC obtained by a depoconversion technique are presented. High frequency capacitance-voltage measurements on MOS capacitors with a ∼ 3000 Å thick oxide indicates an effective charge density comparable to that of MOS capacitors with thermal oxide. The breakdown field of the depo-converted oxide obtained using a ramp response technique indicates a good quality oxide with average values in excess of 6 MV/cm on p-type SiC and 9 MV/cm on n-type SiC. The oxide breakdown field was observed to decrease with increase in MOS capacitor diameter.