Output Current Ripple Reduction Research Articles

Simulation Based Analysis of Digitally Controlled 4-phase DC-DC Converter with Coupled Inductors

<p class="R-AbstractKeywords"><span lang="EN-US">Interleaved converters are used in many different conversion systems involving various topologies and are related to different fields of application due its advantages over single-phase converters. Such advantages include reduced current in switching devices and passive elements, reduced output current ripple, and so on. Reductions in size and costs of magnetic components and inductors current ripple can be achieved by an integration of magnetics. In this paper application of 2-phase coupled inductor designed in convenient way by using commercially manufactured coil formers and ferrite cores is analyzed to developed 4-phase interleaved DC-DC converter. Different structures of the coupled inductor for 4 phases is studied. The steady state phase and output current ripple in buck mode of the interleaving magnetic integrated bidirectional DC-DC converter is simulated. The necessary count of inductors for selected topology are manufactured and placed on the PCB board.</span></p>

Discontinuous SVPWM Techniques of Three-Leg VSI-Fed Balanced Two-Phase Loads for Reduced Switching Losses and Current Ripple

In this paper, various types of discontinuous space vector pulse-width modulation techniques for a three-leg voltage source inverter supplying balanced two-phase loads are proposed. The main objectives of the paper are to analyze switching loss characteristics associated with semiconductor devices and to reduce output current ripple by dealing with various types of zero space vector time in each switching sequence. Capabilities of reductions in switching losses and current ripple for both balanced and unbalanced output phase voltages at high modulation index and load power factor angle of 30° lagging are focused. The validity of the proposed techniques is verified by simulation and experimental results in terms of voltage spectrum, current waveforms, reductions in switching losses, and output current ripple at high modulation index when compared to a continuous space vector pulse-width modulation technique.

Soft‐switching converter with low circulating current and wide range of ZVS turn‐on

SummaryIn this paper, a new hybrid dc–dc converter with low circulating current within the freewheeling interval, wide range of zero‐voltage switching and reduced output current ripple is presented. The proposed hybrid circuit includes two three‐level pulse‐width modulation converters and a series resonant converter with the shard lagging‐leg switches. Series resonant converter is operated at fixed switching frequency (close to series resonant frequency) to extend the zero‐voltage switching range of lagging‐leg switches. The output of series resonant converter is connected to the secondary sides of three‐level converters to produce a positive rectified voltage instead of zero voltage. Hence, the output inductances can be reduced. The reflected positive voltage is used to decrease the circulating current to zero during the freewheeling interval. Therefore, the circulating current losses in three‐level converters are improved. Finally, experiments are presented for a 1.44 kW prototype circuit converting 800 V input to an output voltage 24 V/60A. Copyright © 2015 John Wiley & Sons, Ltd.

결합 인덕터를 이용한 2상 양방향 비반전 벅-부스트 컨버터

This study proposes a two-phase non-inverting buck-boost converter that uses a coupled inductor. The multi-phase converter has many advantages over single-phase counterparts, such as reduced output current ripple and conduction loss in switching devices and passive elements. Although the output current ripple of the multi-phase converter is reduced significantly because of the interleaved effect, the inductor current ripple is not reduced in multi-phase converters. One of the solutions to this problem is to use a coupled inductor. A 4 kW prototype converter is built and tested to verify the performance of the proposed converter.

Feed-Forward Scheme for an Electrolytic Capacitor-Less AC/DC LED Driver to Reduce Output Current Ripple

In order to achieve high-efficiency, high-power-factor, high-reliability, and low-cost, a flicker-free electrolytic capacitor-less single-phase ac/dc light emitting diode (LED) driver is investigated in this paper. This driver is composed of a power-factor-correction (PFC) converter and a bidirectional converter. The bidirectional converter is used to absorb the second harmonic component in the output current of the PFC converter, thus producing a pure dc output to drive the LEDs. The spectrum of the output capacitor voltage of the bidirectional converter is analyzed, indicating that the output capacitor voltage contains harmonic components at multiples of twice the line frequency apart from the dc component and second harmonic component. A feed-forward control scheme with a series of calculation operation is proposed to obtain the desired modulation signal, which contains the corresponding harmonic components, to ensure the bidirectional converter fully absorb the second harmonic current in the output of the PFC converter. Finally, a 33.6 W prototype is fabricated and tested in the lab, and the experiment results show that the proposed control scheme greatly reduces the ripple of the LED driving current.

English

Multiphase dc-dc converters are widely used in modern power electronics applications due to their advantages over single-phase converters. Such advantages include reduced current stress in both the switching devices and passive elements, reduced output current ripple, increase in output voltage and overall efficiency and so on. The output current ripple of a converter can be significantly reduced by virtue of the interleaving connection. This paper presents a design and simulation of an interleaved high step up DC-DC converter with PID controller. The control strategy of the converter is based on a Proportional-Integral-Derivative (PID) controller. The proposed converter achieves a high step-up voltage-conversion ratio without extreme duty ratio and the numerous turns-ratios of a coupled inductor and reduction in the input current ripple with the efficiency higher than 97%.The PID controller is used in the feedback to reduce the rise time and steady state error. The proposed interleaved high step up DC-DC converter model along with PID controller is modeled using SIMULINK and the simulation results are presented in this paper to authenticate the proposed scheme.

Lossless passive snubber for half bridge interleaved flyback converter

Discontinues output current of regular flyback converter will cause several problems such as large volume of output capacitor and also high output voltage noise. Interleaved structure can reduce output current ripple and process more power compared with single-phase flyback converter. Normally, reducing the weight and size of a converter is an important goal while designing. An efficient way to reduce the size and weight of a converter and thus increasing power density is increasing switching frequency. However, in this way, switching losses increases. A half bridge interleaved flyback converter with clamp circuit is introduced and improved with a passive lossless snubber circuit. In this structure, the stored energy in parasitic elements is absorbed by passive snubber at turn off instant to provide soft switching condition for all semiconductor elements. The proposed snubber is load independent which is an important characteristic. In addition, a 500 W prototype converter is implemented which can improve the efficiency more than 6%.

Output Current Ripple Reduction Algorithms for Home Energy Storage Systems

This paper proposes an output current ripple reduction algorithm using a proportional-integral (PI) controller for an energy storage system (ESS). In single-phase systems, the DC/AC inverter has a second-order harmonic at twice the grid frequency of a DC-link voltage caused by pulsation of the DC-link voltage. The output current of a DC/DC converter has a ripple component because of the ripple of the DC-link voltage. The second-order harmonic adversely affects the battery lifetime. The proposed algorithm has an advantage of reducing the second-order harmonic of the output current in the variable frequency system. The proposed algorithm is verified from the PSIM simulation and experiment with the 3 kW ESS model.

Analysis and Design of Coupled Inductors for Two-Phase Interleaved DC-DC Converters

Multiphase dc-dc converters are widely used in modern power electronics applications due to their advantages over single-phase converters. Such advantages include reduced current stress in both the switching devices and passive elements, reduced output current ripple, and so on. Although the output current ripple of a converter can be significantly reduced by virtue of the interleaving effect, the inductor current ripple cannot be reduced even with the interleaving PWM method. One way to solve this problem is to use a coupled inductor. However, care must be taken in designing the coupled inductor to maximize its performances. In this paper, a detailed analysis of a coupled inductor is conducted and the effect of a coupled inductor on current ripple reduction is investigated extensively. From this analysis, a UU core based coupled inductor structure is proposed to maximize the performance of the coupled inductor.

Pulsewidth Modulation Method of Matrix Converter for Reducing Output Current Ripple

A matrix converter interfaces with three-phase ac voltage source, which creates three different virtual dc-link voltages. In this paper, a new pulsewidth modulation (PWM) method for the matrix converter is proposed to generally use these three virtual dc-link voltages. By using the two higher line-to-line voltages as the virtual dc-link voltages, the proposed method can create the identical switching sequences to those created by the conventional space vector PWM (SVPWM) method. Moreover, the proposed method is able to select the appropriate virtual dc-link voltage, according to the PWM purpose and/or load condition. In this paper, the virtual dc-link voltages adjacent to the output voltage reference are introduced to reduce output-current switching ripples. The feasibility of the proposed PWM method was verified by a computer simulation and experimental results. The output voltage and current waveforms produced by using the proposed method can be equal or better than those created using the conventional SVPWM method. Moreover, a new switching sequence that reduces output-current switching ripple can be easily adopted within the proposed PWM method. The harmonic characteristics of output current created using the proposed method are markedly improved over those using the conventional PWM method.

Interleaved buck converters with a single-capacitor turn-off snubber

This paper proposes interleaved buck converters with a single-capacitor snubber to smooth out switch turn-off transition. The single-capacitor snubber is used to limit rising rate of drain-source voltage of the metal-oxide-semiconductor field-effect transistor (MOSFET) switch in the converters to reduce turn-off loss. In addition, the converters are operated at the boundary of continuous and discontinuous conduction modes (CCM), (DCM) to reduce turn-on loss, and in an interleaving fashion to reduce output current ripple. As compared with the counterparts of conventional converter topologies, the proposed converters have the merits of less component count, higher efficiency over a certain load range, smaller size, and they are easier to implement. Hardware measurements obtained from experimental prototypes have verified these merits.