Organic Gate Insulator Research Articles

Low-voltage operating, high mobility top-gate structural flexible organic thin-film transistor with a one-step spin-coated binary polymer gate dielectric

Low-voltage operation is one of the prerequisites for the practical applications of the organic thin-film transistors (OTFTs). Up to date, the most reported low-voltage operatable OTFTs use a bottom-gate structure, and are fabricated by several different technologies in the whole process, in which the organic semiconductors and/or gate dielectrics are prepared in the expensive vacuum equipment. The simple fabricating technologies and fewer processes can better demonstrate the inherent advantages, and enhance the commercial competitiveness of OTFTs. Here, we propose a strategy to fabricate the binary polymers gate dielectric by one-step spin-coating in the top-gate structured flexible OTFTs, by which not only the device performances are prominently improved, but also the fabricating process of the OTFTs is minimized. As a result, the flexible OTFTs exhibit a high mobility over 0.5 cm2 Vs−1, low threshold voltage near to −0.5 V, and excellent mechanical bending durability with a very slightly performances degradation after the tensile and compressive bending at a small curvature radius of 3.0 mm over 1000 cycles.

Amorphous Fluorinated Acrylate Polymer Dielectrics for Flexible Transistors and Logic Gates with High Operational Stability.

Fluorinated amorphous polymeric gate-insulating materials for organic thin-film transistors (OTFTs) not only form hydrophobic surfaces but also significantly reduce traps at the interface between the organic semiconductor and gate insulator. Therefore, these polymeric materials can enhance the OTFT's operation stability. In this study, we synthesized a new polymeric insulating material series composed of acrylate and fluorinated functional groups (with different ratios) named MBHCa-F and used them as gate insulators for OTFTs and in other applications. The insulating features of the MBHCa-F polymers, including surface energy, surface atomic content properties, dielectric constant, and leakage current, were clearly analyzed with respect to the content of the fluorinated functional groups. At higher fluorine-based functional group content, the polymeric series exhibited higher fluorine-based contents at the surface and superior electrical properties, such as field-effect mobility and driving stability, at OTFTs. Therefore, we believe that this study provides a substantial method for synthesizing polymeric insulating materials to enhance the operational stability and electrical performance of OTFTs.

Polyaniline Based Field Effect Transistor for Humidity Sensor

In this present research work, we presented a new Bottom Gate P-Type Organic Field Effect Transistor (OFET) humidity sensor and its applicability towards humidity has been experimentally demonstrated. P-type organic semiconductor polyaniline (PANI) has been used in a variety of applications, including logic circuit components, electromagnetic shielding, chemical sensing, and anticorrosion. Humidity sensor can be used to monitor relative humidity (RH) in various environments. We only focus on the fabrication of conducting polymer OFETs with top contact to measure humidity and verify I-V properties. The current saturation (ISat) of p-type OFETs was 0.8 μA, while the threshold voltage VTh was 2.2 V. The results of FESEM have been perform to confirm that deposited thin film grown on the substrate is purely uniform. The Proposed sensor shows that organic gate dielectrics are a low-cost alternative to inorganic gate dielectrics with good electrical performance. The proposed OFET-based sensors have a number of benefits, such as high sensitivity, low cost, quick response, and physical flexibility.

Pentacene Based Organic Field Effect Transistor Using Different Gate Dielectric

This paper presents the electrical behavior of the top contact/ bottom gate of an organic field-effect transistor (OFET) utilizing Pentacene as a semiconductor layer with two distinctive gate dielectric materials Polyvinylpyrrolidone (PVP) and Zirconium oxide (ZrO2) were chosen. The influence of the monolayer and bilayer gates insulator on OFET performance was investigated. MATLAB software was used to simulate and determine the electrical characteristics of a device. The output and transfer characteristics were studied for ZrO2, PVP and ZrO2/PVP as an organic gate insulator layer. Both characteristics show a high drain current at the gate dielectric ZrO2/PVP equal to -0.0031A and -0.0015A for output and transfer characteristics respectively, this can be attributed to an increase in the dielectric capacitance. Trans conductance characteristics also studied the gate dielectric materials and show the ZrO2/PVP gate dielectric having a higher value from the monolayer, indicating the effect of dielectric capacitance.

Organic Field Effect Transistor Based on P3HT with Two Different Gate Dielectrics

The electrical performance of bottom-gate/top source-drain contact for p-channel organic field-effect transistors (OFETs) using poly(3-hexylthiophene) (P3HT) as an active semiconductor layer with two different gate dielectric materials, Polyvinylpyrrolidone (PVP) and Hafnium oxide (HfO2), is investigated in this work. The output and transfer characteristics were studied for HfO2, PVP and HfO2/PVP as organic gate insulator layer. Both characteristics show a high drain current at the gate dielectric HfO2/PVP equal to -0.0031A and -0.0015A for output and transfer characteristics respectively, this can be attributed to the increasing of the dielectric capacitance. Transcondactance characteristics also studied for the three organic materials and show the HfO2/PVP gate dielectric have higher value from the single layers which indicate the effect of dielectric capacitance, gm=-0.5517x10-4A/V, -0.9931x10-5A/V, and -0.6511 x10-4A/V respectively.

Top-gate zinc-tin-oxide thin-film transistors based on organic gate insulator

The thin-film transistors (TFTs) using the pulsed-plasma-deposition–prepared amorphous Zn-Sn-O (a-ZTO) as active layer and the dip-coated polymethylmethacrylate (PMMA) as gate insulator were fabricated. The results display that the PMMA film shows anti-reflection phenomenon when the PMMA layer combines with the ZTO layer to form a double-layer configuration. Moreover, the oxygen vacancy existing in ZTO decreased with the increase of the substrate heating. Compared to the reference a-ZTO TFTs with a channel prepared at RT and subsequently annealing at , a markedly improved performance was evidenced for TFT via treatment of heating in the process of preparation ( in O2 ambient). The optimum a-ZTO TFTs, operating in an enhancement mode, showed a high mobility of and an on/off ratio over 105.

Solution Processed Organic Transistors on Polymeric Gate Dielectric with Mobility Exceeding 15 cm2 V−1 s−1

Herein, 6,6′ bis (trans‐4‐pentylcyclohexyl)‐dinaphtho[2,1‐b:2′,1′‐f ]thieno[3,2‐b]thiophene (5H‐21DNTT)—a solution‐processable derivative of DNTT—is characterized and studied for its potential as a crystalline solution‐processed organic semiconductor to achieve high mobility and stable organic thin‐film transistor (OTFT) operation. The performance of a bottom‐gate, bottom‐contact OTFT with a 5H‐21DNTT semiconductor is analyzed with different polymeric organic gate dielectrics via various solution‐processed techniques. In comparison to other polymeric gate dielectrics, Parylene C exhibited a superior performance for 5H‐21DNTT OTFT devices, and the OTFT devices show a remarkable average mobility of 10.9 cm2 V−1 s−1, as well as a maximum mobility exceeding 15 cm2 V−1 s−1, with a 100% reliability factor.

Low-Temperature Deposition of Inorganic–Organic HfO2–PMMA Hybrid Gate Dielectric Layers for High-Mobility ZnO Thin-Film Transistors

Low-temperature solution-processed inorganic–organic hybrid gate dielectrics are considered as emerging candidates for future low-cost flexible electronic devices, which are alternatives to high-temperature inorganic-based gate dielectric materials. In the present work, we developed a novel inorganic–organic HfO2–PMMA hybrid dielectric material by an efficient eco-friendly sol–gel method, deposited by spin-coating technique and converted into dielectric thin films at a very low thermal annealing temperature of 185 °C. The HfO2–PMMA hybrid thin-film formation was systematically investigated by FTIR and XPS techniques. Subsequently, a very low surface roughness of 0.8 nm and high uniformity of hybrid thin films were observed by tapping-mode AFM. Also, the thin films showed a hydrophilic nature with a high surface energy of 59.9 mJ/m2 as observed by the contact angle technique. The insulating properties of this hybrid film, studied by C–V and I–V measurements, showed very low leakage current density under 1 ...

Impact of the post-thermal annealing on OFETs using printed contacts, printed organic gate insulator and evaporated C60 active layer

Towards fully printed organic electronics, bottom-gate, bottom contacts fullerene based organic FETs (OFETs) are fabricated using inkjet printing drop-on-demand technology for the deposition of gate contact, organic gate insulator and source and drain contacts. The last layer of this structure that is the semiconducting fullerene C60 film is deposited by thermal evaporation at ambient temperature. Using physical and electrical analysis, the electrical performances are optimized by studying the effect of the thickness of the C60 film and of the post-thermal annealing of the OFET. A quantitative relationship between the crystalline structure of the C60 semiconducting layer (grain size and surface roughness) and the electrical performance of the OFETs is demonstrated. The best performance as determined from the values of the electrical parameters of the OFETs is obtained for 90 nm thick C60 film and after an annealing of the OFET at 200 °C. The answer of present nearly fully printed OFETs to a voltage pulse applied to the gate leads to a switching time of 13 ms, and then to application frequency of some 10 Hz. This result opens the way to potential main application in electronic circuits for the treatment of analog signals coming from the human body activities.

Solution-Processable, Thin, and High-κ Dielectric Polyurea Gate Insulator with Strong Hydrogen Bonding for Low-Voltage Organic Thin-Film Transistors.

We developed a solution-processable, thin, and high-dielectric polyurea-based organic gate insulator for low-voltage operation and high performance of organic thin-film transistors (OTFTs). A 60 nm-thick polyurea thin film exhibited a high dielectric constant of 5.82 and excellent electrical insulating properties owing to strong hydrogen bonding. The hydrogen bonding of the synthesized polyurea was confirmed using infrared spectroscopy and was quantitatively evaluated by measuring the interactive force using atomic force microscopy. Moreover, the effect of hydrogen bonding of polyurea on the insulating properties was systematically investigated through the combination of various monomers and control of the thickness of the polyurea film. The dinaphtho[2,3- b:2',3'- f]thieno[3,2- b]thiophene-based OTFTs with the polyurea gate insulator showed excellent thin-film transistor (TFT) performance with a field-effect mobility of 1.390 cm2/V·s and an on/off ratio of ∼105 at a low operation voltage below 2 V. In addition, it is possible to fabricate flexible polymer organic semiconductor (OSC)-based TFT devices using a solution process, owing to excellent solvent stability in various organic solvents. We believe that the solution-processable polyurea gate insulator with a high dielectric constant and good insulation properties is a promising candidate for low-voltage-operated OTFTs using various OSCs.

Determination of Interface-State Distributions in Polymer-Based Metal-Insulator-Semiconductor Capacitors by Impedance Spectroscopy

Information on localized states at the interfaces of solution-processed organic semiconductors and polymer gate insulators is critical to the development of printable organic field-effect transistors (OFETs) with good electrical performance. This paper reports on the use of impedance spectroscopy to determine the energy distribution of the density of interface states in organic metal-insulator-semiconductor (MIS) capacitors based on poly(3-hexylthiophene) (P3HT) with three different polymer gate insulators, including polyimide, poly(4-vinylphenol), and poly(methylsilsesquioxane). The findings of the study indicate that the impedance characteristics of the P3HT MIS capacitors are strongly affected by patterning and thermal annealing of the organic semiconductor films. To extract the interface-state distributions from the conductance of the P3HT MIS capacitors, an equivalent circuit model with continuum trap states is used, which also takes the band-bending fluctuations into consideration. In addition, the relationship between the determined interface states and the electrical characteristics of P3HT-based OFETs is investigated.

Using Ultrathin Parylene Films as an Organic Gate Insulator in Nanowire Field-Effect Transistors.

We report the development of nanowire field-effect transistors featuring an ultrathin parylene film as a polymer gate insulator. The room temperature, gas-phase deposition of parylene is an attractive alternative to oxide insulators prepared at high temperatures using atomic layer deposition. We discuss our custom-built parylene deposition system, which is designed for reliable and controlled deposition of <100 nm thick parylene films on III-V nanowires standing vertically on a growth substrate or horizontally on a device substrate. The former case gives conformally coated nanowires, which we used to produce functional Ω-gate and gate-all-around structures. These give subthreshold swings as low as 140 mV/dec and on/off ratios exceeding 103 at room temperature. For the gate-all-around structure, we developed a novel fabrication strategy that overcomes some of the limitations with previous lateral wrap-gate nanowire transistors. Finally, we show that parylene can be deposited over chemically treated nanowire surfaces, a feature generally not possible with oxides produced by atomic layer deposition due to the surface "self-cleaning" effect. Our results highlight the potential for parylene as an alternative ultrathin insulator in nanoscale electronic devices more broadly, with potential applications extending into nanobioelectronics due to parylene's well-established biocompatible properties.

Fabrication of flexible organic thin-film transistors based on negative acting photosensitive novolak polymer as an organic gate insulator

ABSTRACTA diazonaphthoquinone (DNQ)-based cross-linkable photo-sensitive cresol novolak resin through acid-catalyzed condensation with melamine molecules is presented as an organic gate insulator (OGI) for the fabrication of poly(3-hexylthiophene) thin-film transistors. This novolak OGI exhibits a remarkably smooth surface of Ra 1.0 nm and RMS 0.3 nm and shows excellent chemical resistance against common process solvents upon a post exposure bake ≥150°C. The corresponding metal-insulator-metal diode incorporated with a 200 nm thick OGI demonstrates remarkable low leakage current level of 10 pA/cm2 @3 MV/cm. Bottom-contact poly(3-hexylthiophene) (P3HT) transistors with novolak OGI on both rigid glass and flexible polyethylene terephthalate (PET) plastic substrates are further demonstrated, suggesting that novolak polymer is a promising candidate for realizing a high performance OGI at low processing temperature.

The effect of indirect UV/ozone treatment on pentacene thin film transistors with double-stacked organic gate insulators

Abstract We investigated the indirect UV/ozone treatment, which means treating the insulator surface under tens of nanometers, rather than the direct surface of the insulator. The double-stacked organic layers are used as gate insulator and the UV/ozone treatment is conducted between these two layers. We analyzed the surface morphologies of the gate insulator and the pentacene by atomic force microscopy (AFM) to confirm the effect of indirect UV/ozone treatment. The UV/ozone treatment reduced the surface roughness of the upper side gate insulator and increased the pentacene grain size. Pentacene-based thin film transistors were fabricated and the electrical property improvement after this treatment was examined. The largest improvement was found when the UV/ozone treatment time is 10 min and the upper side gate insulator thickness is 20 nm, and the mobility at that condition is 1.21 cm2/V s, which is larger than three times that without UV/ozone treatment (0.33 cm2/V s).

Ferroelectric FET for nonvolatile memory application with two-dimensional MoSe2 channels

Graphene and other two-dimensional materials have received considerable attention regarding their potential applications in nano-electronics. Here, we report top-gate nonvolatile memory field-effect transistors (FETs) with different layers of MoSe2 nanosheets channel gated by ferroelectric film. The conventional gate dielectric of FETs was replaced by a ferroelectric thin film that provides a ferroelectric polarization electric field, and therefore defined as an Fe-FET where the poly (vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)) was used as the gate dielectric. Among the devices with MoSe2 channels of different thicknesses, the device with a single layer of MoSe2 exhibited a large hysteresis of electronic transport with an over 105 write/erase ratio, and displayed excellent retention and endurance performance. The possible mechanism of the device’s good properties was qualitatively analyzed using band theory. Additionally, a comprehensive study comparing the memory properties of MoSe2 channels of different thicknesses is presented. Increasing the numbers of MoSe2 layers was found to cause a reduced memory window. However, MoSe2 thickness of 5 nm yielded a write/erase ratio of more than 103. The results indicate that, based on a Fe-FET structure, the combination of two-dimensional semiconductors and organic ferroelectric gate dielectrics shows good promise for future applications in nonvolatile ferroelectric memory.

Nanocomposites of polyimide and mixed oxide nanoparticles for high performance nanohybrid gate dielectrics in flexible thin film transistors

Organic gate dielectrics in thin film transistors (TFTs) for flexible display have advantages of high flexibility yet have the disadvantage of low dielectric constant (low-k). To supplement low-k characteristics of organic gate dielectrics, an organic/inorganic nanocomposite insulator loaded with high-k inorganic oxide nanoparticles (NPs) has been investigated but high loading of high-k NPs in polymer matrix is essential. Herein, compositing of over-coated polyimide (PI) on self-assembled (SA) layer of mixed HfO2 and ZrO2 NPs as inorganic fillers was used to make dielectric constant higher and leakage characteristics lower. A flexible TFT with lower the threshold voltage and high current on/off ratio could be fabricated by using the hybrid gate dielectric structure of the nanocomposite with SA layer of mixed NPs on ultrathin atomic-layer deposited Al2O3.

Metal-oxide assisted surface treatment of polyimide gate insulators for high-performance organic thin-film transistors.

We developed a facile method for treating polyimide-based organic gate insulator (OGI) surfaces with self-assembled monolayers (SAMs) by introducing metal-oxide interlayers, called the metal-oxide assisted SAM treatment (MAST). To create sites for surface modification with SAM materials on polyimide-based OGI (KPI) surfaces, the metal-oxide interlayer, here amorphous alumina (α-Al2O3), was deposited on the KPI gate insulator using spin-coating via a rapid sol-gel reaction, providing an excellent template for the formation of a high-quality SAM with phosphonic acid anchor groups. The SAM of octadecylphosphonic acid (ODPA) was successfully treated by spin-coating onto the α-Al2O3-deposited KPI film. After the surface treatment by ODPA/α-Al2O3, the surface energy of the KPI thin film was remarkably decreased and the molecular compatibility of the film with an organic semiconductor (OSC), 2-decyl-7-phenyl-[1]benzothieno[3,2-b][1]benzothiophene (Ph-BTBT-C10), was increased. Ph-BTBT-C10 molecules were uniformly deposited on the treated gate insulator surface and grown with high crystallinity, as confirmed by atomic force microscopy (AFM) and X-ray diffraction (XRD) analysis. The mobility of Ph-BTBT-C10 thin-film transistors (TFTs) was approximately doubled, from 0.56 ± 0.05 cm2 V-1 s-1 to 1.26 ± 0.06 cm2 V-1 s-1, after the surface treatment. The surface treatment of α-Al2O3 and ODPA significantly decreased the threshold voltage from -21.2 V to -8.3 V by reducing the trap sites in the OGI and improving the interfacial properties with the OSC. We suggest that the MAST method for OGIs can be applied to various OGI materials lacking reactive sites using SAMs. It may provide a new platform for the surface treatment of OGIs, similar to that of conventional SiO2 gate insulators.

Highly Sensitive Ultraviolet Light Sensor Based on Photoactive Organic Gate Dielectrics with an Azobenzene Derivative

Photochromic molecules have been recently adopted by many researchers for organic field-effect transistor (OFET) applications, since they offer the opportunity to achieve flexible-type ultraviolet (UV) light sensors with the advantages of organic material-based solution processes. Here, we present the novel usage of an azobenzene derivative in the gate dielectric layer of an OFET for highly sensitive and reliable UV sensing applications. Owing to the large change of capacitance caused by the reversible photoisomerization of azobenzene, the OFET device can modulate efficiently the current signal under UV and visible light. We found that the on-current was greatly amplified upon UV light irradiation with good photoresponsivity and photocurrent ratio and then fully returned to the initial state under visible light. In addition, the device shows a strongly linear relationship with the UV radiation intensity and repetitive on–off response in real-time UV sensing tests, thus being potentially applied in highly ...

(Invited) Low-Temperature Processed and Self-Aligned InGaZnO Thin-Film Transistor with an Organic Gate Insulator for Flexible Device Applications

Recently, metal-oxide thin-film transistors (TFTs) have attracted considerable attention for use in next-generation flat panel displays. An amorphous InGaZnO (IGZO) semiconductor is widely accepted as a promising channel material for TFT applications owing to its outstanding electrical properties. Moreover, since oxide semiconductor can be deposited even at room temperature by sputtering, it is recognized as a promising material for flexible device applications. From the standpoint of flexible devices, an organic insulating material is a good candidate for gate insulator (GI) even for the oxide thin-film transistors (TFTs). In this presentation, a self-aligned and top-gated IGZO TFT with an organic gate insulator was demonstrated at a maximum processing temperature of 150 ºC. First, the controlling methods of the hybrid interface between the InGaZnO channel and the organic gate insulator were investigated. It was demonstrated that an organic protection layer of the IGZO channel and controlling the oxygen content in the IGZO channel are effective to achieve good performance TFTs at low processing temperature; however, it was also revealed that an excess oxygen acted as an electron trap existing at the IGZO/GI interface and degraded the TFT’s reliability. Second, carrier concentration in the IGZO was selectively controlled by helium plasma treatment with a substrate bias for source and drain (S/D) regions of self-aligned TFT. It was revealed that lateral diffusion from S/D extension to the IGZO channel was influenced by the doping methods. We achieved a self-aligned and top-gated IGZO TFT with an organic gate insulator that was fabricated at a maximum processing temperature of 150 ºC. Field effect mobility of over 10 cm2/Vs and subthreshold swing of below 0.2 V/dec. have been obtained. Details will be discussed at the conference.

Investigation of High Current Tetracene-TFT Using Surface Nitrided SiO2 Gate Insulator Film

The use of surface nitrided SiO2 film as gate insulator of tetracene-TFT (Thin Film Transistor) has been proposed. Using Ar/N2 plasma, the nitridation has been carried out on the SiO2 surface to remove carrier trapping sites due to hydroxyl groups. As a result, transistor output characteristics have been drastically improved with extremely high current level using tetracene film as organic semiconductor material. Recently, there has been widely interested in organic-TFT because of its flexibility, ability to have a lot of material designs, applicability to large area devices and so on. However, the surface of conventional gate insulator such as SiO2and other metal oxide films often contain charge trapping sites due to the existence of hydroxyl (-OH) groups and surface defects. The carriers of organic-TFT have to move at the surface layer in the organic film adjacent to the gate insulator. Therefore it is important to control the surface and/or interface of organic film and gate insulator to avoid the carrier scattering at the charge trapping sites. Now, commonly used method to overcome this problem is deposition of SAM (Self-Assembled-Monolayer) film on the gate insulator. As a result, it is reported that electrical characteristics have been drastically improved. But it takes time about at least half a day to deposit the SAM film. In this paper, we have attempted to improve the carrier mobility in the tetracene film as organic semiconductor material, with surface nitride SiO2 film as the gate insulator for a short processing time. Figure1 shows transistor output characteristics with the channel length (L) = 70[um] and channel width (W) = 2000[um], respectively. It is clearly shown the extremely high current have been achieved from the tetracene-TFT on surface nitrided SiO2. On the contrary, no modulation due to gate bias could be achieved on SiO2film without the nitridation. Also, to clarify the difference, the property of tetracene/SiO2 interface of each sample, C-V measurement has been carried out. After the nitridation have been done on the SiO2 surface that had been etched with dil-HF to make hydroxyl groups, the width of C-V hysteresis is decreased. Therefore we can conclude the surface nitridation of SiO2 films with Ar/N2 plasma is effective method to remove charge trapping sites related to hydroxyl groups and improve transistor output characteristics. Figure 1