Optoelectronic Integrated Circuits Research Articles

Optical coupling optimization in a novel metal—semiconductor—metal ultraviolet photodetector based on semicircular Schottky electrodes

A novel semicircular electrode metal-semiconductor-metal (SEMSM) ultraviolet detector is modeled, investigated and characterized with a self-consistent numerical calculation method. For the purpose of model and performance verification, a comprehensive comparison of the SEMSM detector and a conventional electrode MSM detector is carried out with experimental data. The results indicate that the physical models are able to predict the enhanced device features. Moreover, the structural parameters have been adjusted appropriately to optimize the SEMSM detector. The findings show that a device with a 2 μm finger radius and 3 μm spacing exhibits outstanding characteristics in terms of a peak responsivity of 0.177 A/W at 290 nm, a maximum external quantum efficiency of over 75%, and a comparable normalized photocurrent to dark current ratio of 1.192 × 1011 W−1 at 0.3 V bias. These results demonstrate that the SEMSM detector has excellent performance for optoelectronic integrated circuit applications.

Design and Fabrication of a Monolithic Optoelectronic Integrated Circuit Chip Based on CMOS Compatible Technology

A monolithic optoelectronic integrated circuit chip on a silicon-on-insulator is designed and fabricated based on complementary metal oxide semiconductor compatible technology. The chip integrates an optical Mach-Zehnder modulator (MZM) and a CMOS driving circuit with the amplification function. Test results show that the extinction ratio of the MZM is close to 20 dB and the small-signal gain of the CMOS driving circuit is about 26.9 dB. A 50 mV 10 MHz sine wave signal is amplified by the driving circuit, and then drives the MZM successfully.

10-Gb/s 850-nm CMOS OEIC Receiver With a Silicon Avalanche Photodetector

We present a 10-Gb/s optoelectronic integrated circuit (OEIC) receiver fabricated with standard 0.13-μm complementary metal-oxide-semiconductor (CMOS) technology for 850-nm optical interconnect applications. The OEIC receiver consists of a CMOS-compatible avalanche photodetector (CMOS-APD), a transimpedance amplifier (TIA), an offset cancellation network, a variable equalizer (EQ), a limiting amplifier (LA), and an output buffer. The CMOS-APD provides high responsivity as well as large photodetection bandwidth. The TIA is composed of two-stage differential amplifiers with high feedback resistance of 4 kΩ. The EQ compensates high-frequency loss by controlling the boosting gain with a capacitor array. The LA consists of five-stage gain cells with active feedback and negative capacitance to achieve broadband performance. With the OEIC receiver, we successfully demonstrate transmission of 10-Gb/s optical data at 850 nm with a bit error rate of 10-12 at the incident optical power of -4 dBm. The OEIC receiver has the core chip area of about 0.26 mm2 and consumes about 66.8 mW.

Performance of the Active Microring Resonator Based on SOI Rib Waveguide

Micro-ring resonator based on silicon-on-insulator (SOI) has been extensively studied due to its many advantages, thus promising to improve the optoelectronic integrated circuit performance. This paper highlights the study of the free carrier injection effect on the silicon rib waveguide with p-i-n diode structure integrated in the SOI micro-ring resonator. The free carrier concentrations have been modulated by the electrical signal that can cause change of refractive index of the micro-ring resonator. The device performances are predicted by using numerical modelling software 2D SILVACO and Finite Difference Time Domain method simulation software RSOFT. The results show the change of refractive index is maximized at a greater applied voltage. A shift in resonant wavelength of around 6.7 nm was predicted at 0.9V with 1.14x10-3refractive index change. It is also shown that 8.5dB change of the output response obtained through the output.

Reconfigurable Integrated Optoelectronics

Integrated optics today is based upon chips of Si and InP. The future of this chip industry is probably contained in the thrust towards optoelectronic integrated circuits (OEICs) and photonic integrated circuits (PICs) manufactured in a high-volume foundry. We believe that reconfigurable OEICs and PICs, known as ROEICs and RPICs, constitute the ultimate embodiment of integrated photonics. This paper shows that any ROEIC-on-a-chip can be decomposed into photonic modules, some of them fixed and some of them changeable in function. Reconfiguration is provided by electrical control signals to the electro-optical building blocks. We illustrate these modules in detail and discuss 3D ROEIC chips for the highest-performance signal processing. We present examples of our module theory for RPIC optical lattice filters already constructed, and we propose new ROEICs for directed optical logic, large-scale matrix switching, and 2D beamsteering of a phased-array microwave antenna. In general, large-scale-integrated ROEICs will enable significant applications in computing, quantum computing, communications, learning, imaging, telepresence, sensing, RF/microwave photonics, information storage, cryptography, and data mining.

A 10-Gb/s OEIC with Meshed Spatially-Modulated Photo Detector in 0.18-$\mu{\hbox {m}}$ CMOS Technology

This paper describes the design of a 10-Gb/s fully integrated CMOS optical receiver, which consists of a novel spatially-modulated photo detector (SMPD), a low-noise trans-impedance amplifier (TIA), and a post-limiting amplifier on a single chip. The bandwidth of proposed meshed SMPD can be boosted up to 6.9 GHz under a reverse-biased voltage of 14.2 V. The measured responsivity of the meshed SMPD is 29 mA/W as illuminated by 850-nm light source. To compensate the relatively low responsivity of on-chip CMOS photo detector (PD), a high-gain TIA with nested feedback and shunt peaking is proposed to achieve low-noise operation. The optical receiver is capable of delivering 25-kΩ conversion gain when driving 50-Ω output loads. For a PRBS test pattern of 27- 1, the 10-Gb/s optoelectronic integrated circuit (OEIC) has optical sensitivity of - 6 dBm at a bit-error rate (BER) of 10 -11. Implemented in a generic 0.18-μm CMOS technology, the chip area is 0.95 mm by 0.8 mm. The trans-impedance amplifier, post amplifier, and output buffer respectively drain 38 mW, 80 mW, and 27 mW from the 1.8-V supply.

CMOS monolithic optoelectronic integrated circuit for on-chip optical interconnection

A monolithic silicon CMOS optoelectronic integrated circuit (OEIC) is designed and fabricated using standard 0.35-μm CMOS technology. This OEIC monolithically integrates light emitting diode (LED), silicon dioxide waveguide, photodetector and receiver circuit on a single silicon chip. The silicon LED operates in reverse breakdown mode and can emit light at 8.5 V. The output optical power is 31.2 nW under 9.8 V reverse bias. The measured spectrum of LED showed two peaks at 760 nm and 810 nm, respectively. The waveguide is composed of silicon dioxide/metal multiple layers. The responsivity of the n-well/p-substrate diode photodetector is 0.42 A/W and the dark current is 7.8 pA. The LED-emitted light transmits through the waveguide and can be detected by the photodetector. Experimental results show that on-chip optical interconnects are achieved by standard CMOS technology successfully.

Integration of Micro-Light-Emitting-Diode Arrays and Silicon Driver for Heterogeneous Optoelectronic Integrated Circuit Device

In this paper, we proposed the possibility of implementing a single chip device for realizing optoelectronic integrated circuits (OEICs). Micro-light-emitting-diode (LED) arrays and a complementary metal–oxide–semiconductor (CMOS) pulse width modulation (PWM) silicon driver were proposed, designed, and fabricated on a single chip. The micro-LED arrays were separated by a dry etching method into 64 pixels of 8×8, each with a size of 30×30 µm2 and operated in 3 V at 100 µA. The PWM Si driver was well operated and modulated using various control signals. Furthermore, to investigate the driver for handling massive parallel information, a simple multifunctional driver was designed, fabricated, and flip-chip-bonded using a gold compliant bump and anisotropic conductive adhesive with micro-LED arrays.

An 8.5-Gb/s Fully Integrated CMOS Optoelectronic Receiver Using Slope-Detection Adaptive Equalizer

An 8.5-Gb/s single-chip optoelectronic integrated circuit (OEIC) for short-distance optical communications is realized in a 0.13-μm CMOS process. The OEIC consists of an on-chip silicon photodiode, a transimpedance amplifier with modified regulated cascode input configuration, an adaptive equalizer based upon slope-detection algorithm, and a limiting amplifier with merged negative impedance circuits. The proposed slope-detection adaptive equalizer compensates the limited bandwidth and the temperature variation of the integrated silicon photodiode. Measured results demonstrate 120-dB Ω transimpedance gain, 5.9-GHz bandwidth, -3.2-dBm optical sensitivity for 10-12 BER, and 47-mW power dissipation from a single 1.5-V supply. The OEIC chip core occupies the area of 0.1 mm2.

A BJT translinear loop based optoelectronic integrated circuit with variable transimpedance for optical storage systems

A 0.35 μm SiGe BiCMOS optical receiver with voltage-controlled transimpedance is presented. A variable-gain current amplifier using a BJT translinear loop is applied. A transimpedance dynamic range of 1554 (63.8 dB) with the largest transimpedance of 2.84 M?, a bandwidth up to 379 MHz, and a transimpedance bandwidth product up to 168 T?Hz are achieved.

Athermal Wavelength Characteristics of Si Slot Ring Resonator Embedded with Benzocyclobutene for Optoelectronic Integrated Circuits

An athermal Si-slot-waveguide ring resonator embedded with benzocyclobutene (BCB), a low-k material used in electronics, was proposed. By controlling the width of the BCB-filled gap to 90 nm, the temperature coefficient of equivalent index of a Si slot waveguide could be reduced to 3.70×10-6, which is two orders of magnitude smaller than that of a conventional Si waveguide. The dependences of peak wavelength shift on temperature in the fabricated devices of a conventional Si wire waveguide with SiO2 cladding, Si wire waveguide with BCB cladding, and Si slot waveguide with BCB cladding were 26, 17, and -0.6 pm/K, respectively.

Novel Ga(NAsP)-Based Heterostructures for the Integration of Optoelectronic Functionalities on (001) Si-Substrate

The novel direct band gap, dilute nitride Ga(NAsP)-material system allows for the first time the monolithic integration of a III/V laser material lattice matched to Si substrate. This lattice-matched approach offers the possibility for a high-quality, low defect density integration of a III/V-laser material potentially leading to long-term stable laser devices on Si-substrate. The broad area laser structures consist of pseudomorphically strained active Ga(NAsP)/(BGa)(AsP) multi-quantum-well heterostructures (MQWHs) embedded in thick doped (BGa)P waveguide layers, grown by a specific low-temperature metal organic vapour phase epitaxy (MOVPE) process on (001) Si-substrate. This paper will present and discuss the current status of the material and device optimization to realise electrical injection laser diodes as a basis for Si-photonics based optoelectronic integrated circuits (OEICs) with novel functionalities.

Influence of RTA and LTA on the Optical Propagation Loss in Polycrystalline Silicon Wire Waveguides

To provide flexibility in implementing polySi devices in Si optoelectronic integrated circuits, polySi wire waveguides were fabricated with various low thermal budget solid-phase crystallization (SPC) approaches, i.e., spike rapid thermal annealing (RTA) at 1050°C for < 1 s, low-temperature annealing (LTA) at 600°C for 15 h, or a combination of both with different sequences. The approach of first LTA and then RTA reaches a relatively low optical loss at 1550 nm: ~ 9.8 dB/cm in 300-nm-wide polySi waveguides after an additional forming gas annealing at 420°C to passivate the dangling bonds, close to that fabricated with the conventional high thermal budget SPC.

ZnO Nanobridge Array UV Photodetectors

This study describes the fabrication of ultraviolet photodetectors with laterally aligned ZnO nanobridge arrays. These nanobridge arrays grow upward in the face-to-face direction, thereby forming biaxial compressive stress where nanobridges intersect. Compared with conventional thin-film photodetectors, the nanobridge devices markedly enhance photosensitivity and blue shift (30 nm) of the spectral response. These phenomena are caused by surface effects of the ZnO nanobridge and strain-induced polarization effects, leading to band structure change. Nanobridge devices are a promising alternative for transforming advanced optoelectronic integration circuits with a 1D structure into miniaturized devices.

光电集成光接收机前端及限幅放大器的研制

光电集成光接收机前端及限幅放大器的研制

10 Gb/s OEIC optical receiver front-end and 3.125 Gb/s PHEMT limiting amplifier

A 10 Gb/s OEIC (optoelectronic integrated circuit) optical receiver front-end has been studied and fabricated based on the Φ-76 mm GaAs PHEMT process; this is the first time that a limiting amplifier (LA) has been designed and realized using depletion mode PHEMT. An OEIC optical receiver front-end mode composed of an MSM photodiode and a current mode transimpedance amplifier (TIA) has been established and optimized by simulation software ATLAS. The photodiode has a bandwidth of 10 GHz, a capacitance of 3 fF/μm and a photosensitive area of 50 × 50 μm2. The whole chip has an area of 1511 × 666 μm2. The LA bandwidth is expanded by spiral inductance which has been simulated by software HFSS. The chip area is 1950 × 1910 μm2 and the measured results demonstrate an input dynamic range of 34 dB (10–500 mVpp) with constant output swing of 500 mVpp.

High frequency modeling for quantum-well laser diodes

High frequency modeling of quantum-well (QW) laser diodes for optoelectronic integrated circuit (OEIC) design is discussed in this paper. Modeling of the intrinsic device and the extrinsic components is discussed by accounting for important physical effects at both dc and high frequency. The concepts of equivalent circuits representing both intrinsic and extrinsic components in a QW laser diode are analyzed to obtain a physics-based high frequency model. The model is based on the physical rate equations, and is versatile in that it permits both small- and large-signal simulations to be performed. Several procedures of the high frequency model parameter extraction are also discussed. Emphasis here is placed on validating the model via a comparison of simulated results with measured data of the small-signal modulation response, obtained over a wide range of optical output powers.

InAlAs/InAs/InGaAs pseudomorphic high electron mobility transistors exhibiting ultra‐fast optical response

AbstractHigh electron mobility transistors with a pseudomorphically strained InAs channel (InAs‐PHEMTs) have superior electron‐transport properties and high electron density, which are due to a large conduction‐band discontinuity. In this work, we demonstrate that InAs‐PHEMTs have an additional property: they exhibit an ultra‐fast optical response with a time‐constant of 3.5 × 10–11 s. By irradiating the optical signal onto the InAs‐PHEMTs, hole‐electron pairs are created in the channel layer. Holes accumulated in the source region of the channel layer recombine immediately with 2DEG due to an Auger recombination mechanism. Holes generated in the region outside the gate also recombine immediately with the 2DEG due to the Auger recombination mechanism before they drift or diffuse toward the gate region. This is why the optical response time of an InAs‐PHEMT is extremely small and it is restricted by the time for holes to transit across the gate region. A circuit incorporating an InAs‐PHEMT as a transistor and an InAlAs/InAs/InGaAs MSM photodiode that has the same structure as an InAs‐PHEMT as an optical detector has the potential to be applied as an ultra‐fast receiver optoelectronic integrated circuit. (© 2009 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)

Monolithically integrated long wavelength photoreceiver OEIC based on InP/InGaAs HBT technology

The epitaxial structure and growth, circuit design, fabrication process and characterization are described for the photoreceiver opto-electronic integrated circuit (OEIC) based on the InP/InGaAs HBT/PIN photodetector integration scheme. A 1.55 μm wavelength monolithically integrated photoreceiver OEIC is demonstrated with self-aligned InP/InGaAs heterojunction bipolar transistor (HBT) process. The InP/InGaAs HBT with a 2 μm × 8 μm emitter showed a DC gain of 40, a DC gain cutoff frequency of 45 GHz and a maximum frequency of oscillation of 54 GHz. The integrated InGaAs photodetector exhibited a responsivity of 0.45 A/W at λ = 1.55 μm, a dark current less than 10 nA at a bias of −5 V and a −3 dB bandwidth of 10.6 GHz. Clear and opening eye diagrams were obtained for an NRZ 223–1 pseudorandom code at both 2.5 and 3.0 Gbit/s. The sensitivity for a bit error ratio of 109 at 2.5 Gbit/s is less than −15.2 dBm.

A LiÉnard Oscillator Resonant Tunnelling Diode-Laser Diode Hybrid Integrated Circuit: Model and Experiment

We report on a hybrid optoelectronic integrated circuit based on a resonant tunnelling diode driving an optical communications laser diode. This circuit can act as a voltage controlled oscillator with optical and electrical outputs. We show that the oscillator operation can be described by Lienard's equation, a second order nonlinear differential equation, which is a generalization of the Van der Pol equation. This treatment gives considerable insight into the potential of a monolithic version of the circuit for optical communication functions including clock recovery and chaotic source applications.