Optical Packet Switch Architecture Research Articles

Comparative analysis of optical data center switches

Abstract In the recent past, there has been an explosive growth in data traffic within data center systems. This rapid increase in data volume has put significant constraints on the speed of current data communication networks, which are predominantly based on electronic controllers and memory. The speed limitations of electronic devices hinder their ability to process data at higher rates efficiently. To address this issue and enable faster data processing, the use of optical communication emerges as the most promising solution. Optical communication leverages the capabilities of light signals and optical components, which can handle data at much higher rates compared to their electronic counterparts. One key element in optical communication systems is the utilization of fiber delay lines (FDLs) as optical storage for packets. FDLs offer the ability to temporarily store and delay optical signals, providing buffering capabilities within optical networks. These FDLs can be configured in various setups, including feed forward, feed backward, and recirculating configurations, each with its own set of advantages and disadvantages. In this context, this article explores several state-of-the-art arrayed waveguide grating (AWG)-based optical packet switch (OPSW) architectures. These switches are designed to efficiently route and manage optical packets within data center networks. Each architecture is summarized, highlighting its unique features and capabilities. To compare the different AWG-based OPSW architectures, various key parameters are considered, such as the cost, physical losses, bit error rate (BER), and the number of tunable components required. These parameters are critical in determining the performance, efficiency, and cost-effectiveness of the switches.

160 Gbps capacity and sub-us latency of polarization-independent optical packet switch architecture for free-space optical network using PLZT optical switch

In this paper, we discuss the challenges and limitations of current free-space optical (FSO) networks toward scaling beyond the 100 Gbps switch capacity era while achieving low-latency and high-reliability. Owing to the slowdown of Moore’s law, to avoid electronically-induced bottlenecks, we construct an FSO switch network and experimentally evaluate the feasibility of ultrafast optical packet switch architecture based on polarization-independent plomb lanthanum zirconate titanate (PLZT) switch without buffering. The bit error ratio of 160 Gbps ([Formula: see text]) data was validated based on measurements while still preserving the sub-us latency metrics ([Formula: see text] ns). The experimental results may offer a significant reference for FSO communication and network.

Architecture and Performance Evaluation of a Novel Optical Packet Switch with Input Concentrators

In this paper, we propose a novel optical packet switch (OPS) architecture with input concentrators, which employ multi-input single-output optical buffers to aggregate all the incoming traffic into a small size switching fabric. Accordingly, the physical size, the number of the needed wavelength converters, and the economic cost of the total OPS node are decreased dramatically. However, the deployment of input concentrators introduces additional packet loss and delay, except from the contention at the switch output. A Markov model is presented to study the packet loss ratio (PLR) and average packet delay given by the input concentrators. The corresponding closed form expressions are given. The model also demonstrates that the system performance can be greatly improved by increasing the buffer size when the traffic load is not larger than 0.69315. The analytical values are compared with the simulation results. All the obtained results show that the proposed model provides satisfactory approximations under different network scenarios. Moreover, the economic cost savings of the proposed OPS node at the present time and its evolution as a function of time are also discussed in detail. The proposed architecture can also be applied in a packet enhanced optical transport network (OTN).

Performance comparison between recirculating loop buffer-based optical packet switch architectures

Due to the high cabling complications and limited scalability, the Ethernet switching is not a well-suited technology for the next-generation data center systems (NGDCs). In designing of interconnects for NGDCs, the first step is to select an appropriate switching technology. The best solution to the problems faced by NGDCs is the use of optical switching technology in the core of data centers. In this paper, three recirculating loop buffer-based optical packet switches are discussed. The first two switch discussed in this paper were proposed in the recent past, and the third switch is proposed by the authors of this paper. In this paper, a performance comparison between the switches is performed by considering physical and network layer parameters. The obtained results presented in the paper show that the performance of our proposed switch is better in comparison with other switches.

A 1024-Port Optical Uni- and Multicast Packet Switch Fabric

Novel Data Center (DC) architectures based on resource disaggregation hold the potential to increase the resource utilization at a reduced energy and cost envelope, imposing, however, significant challenges in the underlying DC network infrastructure that has to provide high-radix and high-bandwidth connectivity, while maintaining sub-μs latency. At the same time, the explosive growth of AI applications has transformed the traffic profiles on the majority of DC workloads calling for support of advanced network functionalities, such as multicasting. In this direction, we scale-up the Hipoλaos optical packet switch architecture to a thousand-port layout, at the same time upgrading its functionality to allow latency-free intra-tray multicasting. The feasibility of a 10.24-Tb/s capacity switch fabric with a 10-Gb/s line rate in a 1024-port configuration, with four-packet buffering capacity is experimentally demonstrated, revealing error-free performance with <3.4-dB power penalty. Optical multicasting to up-to five nodes is also experimentally validated at 10 Gb/s, with a power penalty variation of less than 1 dB between the different output ports, while multicast operation across the whole required spectral range of a 1024-port switch is investigated, utilizing pairs of wavelengths with different channel spacing. Network-level analysis of the 1024-port Hipoλaos switch revealed sub-μs p90-latency and ∼85% throughput, for the unicast case, when utilizing a two-packet-buffer design. Finally, the simulation model was extended to support the Hipoλaos multicast friendly layout, revealing up to 4250% throughput improvement, as compared to the conventional layout, while maintaining sub-μs latency.

Packet Loss Rate Differentiation in slotted Optical Packet Switching OCDM/WDM

We propose a multi-class mechanism for Optical Code Division Multiplexing (OCDM), Wavelength Division Multiplexing (WDM) Optical Packet Switch (OPS) architecture capable of supporting Quality of Service (QoS) transmission. OCDM/WDM has been proposed as a competitive hybrid switching technology to support the next generation optical Internet. This paper addresses performance issues in the slotted OPS networks and proposed four differentiation schemes to support Quality of Service. In addition, we present a comparison between the proposed schemes as well as, a simulation scheduler design which can be suitable for the core switch node in OPS networks. Using software simulations the performance of our algorithm in terms of losing probability, the packet delay, and scalability is evaluated.

Synchronous optical packet switch architecture with tunable single and multi-channels wavelength converters

Abstract In this paper, we propose a bufferless synchronous optical packet switch (OPS) architecture named the Limited-range wavelength conversion with Dynamic Pump-wavelength Selection (LDPS) architecture. LDPS is equipped with a dedicated limited-range wavelength converters (LRWCs, and a shared pool of parametric wavelength converters (PWCs) with dynamic pump-wavelength selection (DPS). The adoption of hybrid conversion types in the proposed architecture aims at improving the packet loss rate (PLR) compared to conventional architecture with single conversion types, while reducing (or at least maintaining) the conversion distance ( d ) of used wavelength converters. Packet contention in the proposed architecture is resolved using the first available algorithm (FAA) and the dynamic pump-wavelength selection algorithm (DPSA). The performance of the proposed architecture is compared to two well-known conventional architectures; namely, the LRWC architecture that uses dedicated LRWCS for each input wavelength, and the DPS architecture that uses a shared pool of dynamic pump-wavelength converters (PWCs). Simulation results show that, for the same value of d , the new architecture reduces the PLR compared to the LRWC architecture by up to 40 % and 99.7 % for traffic loads, 0.5 and 1; respectively. In addition, for d = 1 , the new architecture reduces the PLR compared to the DPS architecture by up to 10 % and 99.3 % for traffic loads, 0.5 and 1; respectively.

Physical layer analysis of AWG based optical packet switch architecture

Optical packet switching is the next generation switching technique in conjunction with mature electronic switching. In optical packet switching, the core router plays an important role in the routing and buffering of packets. In recent past, AWG based optical router are proposed and heavily investigated due to its very low insertion loss and very simple wavelength dependent routing pattern. In this paper, a further modification in an AWG based optical packet switch is proposed. These modifications improve the signal reception quality at the output. Power budget analysis is presented to evaluate the buffer capacity. As a physical layer parameters, the minimum switch power is evaluated using the mathematical model and at the BER level of 10−9 the maximum buffering capacity is evaluated. Finally, simulation results are presented in terms of network layer parameters, packet loss probability and average delay. The packet loss probability is as low as 10−7 well under acceptable limits.

In-Band Label Extractor Based on Cascaded Si Ring Resonators Enabling 160 Gb/s Optical Packet Switching Modules

Photonic integration of optical packet switching modules is crucial to compete with existing electronic switching fabrics in large data center networks. The approach of coding the forwarding packet information in an in-band label enables a spectral-efficient and scalable way of building low-latency large port count modular optical packet switching architecture. We demonstrate the error-free operation of the four in-band label extraction from 160 Gb/s optical data packets based on photonic integrated silicon-on-insulator ring resonators. Four low-loss cascaded ring resonators using the quasi-TM mode are used as narrowband filters to ensure the detection of four optical labels as well as the error-free forwarding of the payload at limited power penalty. Due to the low-loss and less-confined optical quasi-TM mode the resonators can be very narrowband and have low insertion loss. The effect of the bandwidth of the four ring resonators on the quality of the payload is investigated. We show that using four rings with 3dB bandwidth of 21 pm and only an insertion loss of 3 dB, the distortion on the payload is limited (<;1.5 dB power penalty), even when the resonances are placed very close to the packet's central wavelength. We also investigate the optical power requirements for error-free detection of the label as function of their spectral position relative to the center of the payload. The successful in-band positioning of the labels makes this component very scalable in amount of labels.

An optical multicast packet switching architecture shared with limited-range multi-wavelength converter and full-range wavelength converters

Optical packet switch with multicast capability can inspire a broad range of multipoint to multipoint applications in future optical networks. An optical multicast packet switching architecture, equipped with feedback shared small number of limited-range multi-wavelength converters (LMWCs) and output shared some full-range wavelength converters (FRWCs), is proposed for a wavelength-division multiplexed optical multicast network to improve multicast performance in the paper. The FRWCs are used to overcome the performance degradation in terms of packet loss probability due to only use LMWCs. In the architecture, the two converters are shared by all the multicast packets importing to the optical multicast switch node. A maximum bipartite matching with minimum edges weights strategy was designed to employ fewer wavelength converters and avoid useless degradation of optical signal quality for the architecture to improve the node performance. The simulation results show that the proposed architecture and its wavelength converter scheduling algorithm can reduce the multicast packet loss probability with relatively lesser wavelength conversion cost.

The Major Physical Layer Constraints of Fiber Optical fiber Packet Switch Architectures

Many optical packet switch (OPS) architectures are proposed and demonstrated. In the design of these architectures, most of the attention is paid on the network layer parameters like high through put (low packet loss probability) and low latency, etc. and to achieve these goals. The structure of the architectures becomes very complex. In real scenarios, these architectures may not work efficiently because of physical layer constraints. Hence, cross layer optimization needs to be considered. This paper addresses the major physical layer constraints, and it has been found that the optical packet switch architecture can work efficiently within the bounded regimes which can be called as an operation window.

AWG Based Optical Packet Switch Architecture

This paper discusses an optical packet switch (OPS) architecture, which utilizes the components like optical reflectors, tunable wavelength converters (TWCs), arrayed waveguide grating (AWG) and pieces of fiber to realize the switching action. This architecture uses routing pattern of AWG, and its symmetric nature, to simplify switch operation significantly. It is also shown that using multi- wavelengths optical reflector, length of delay lines can be reduced to half of its original value. This reduction in length is useful for comparatively larger size packets as for them. It can grow up some kilometers. The considered architecture is compared with already published architecture. Finally, modifications in the architecture are suggested such that switch can be efficiently placed in the backbone network.

Numerical and experimental study of a high port-density WDM optical packet switch architecture for data centers

Data centers have to sustain the rapid growth of data traffic due to the increasing demand of bandwidth-hungry internet services. The current intra-data center fat tree topology causes communication bottlenecks in the server interaction process, power-hungry O-E-O conversions that limit the minimum latency and the power efficiency of these systems. In this paper we numerically and experimentally investigate an optical packet switch architecture with modular structure and highly distributed control that allow configuration times in the order of nanoseconds. Numerical results indicate that the candidate architecture scaled over 4000 ports, provides an overall throughput over 50 Tb/s and a packet loss rate below 10(-6) while assuring sub-microsecond latency. We present experimental results that demonstrate the feasibility of a 16x16 optical packet switch based on parallel 1x4 integrated optical cross-connect modules. Error-free operations can be achieved with 4 dB penalty while the overall energy consumption is of 66 pJ/b. Based on those results, we discuss feasibility to scale the architecture to a much larger port count.

State aggregation-based model of asynchronous multi-fiber optical switching with shared wavelength converters

This paper proposes new analytical models to study optical packet switching architectures with multi-fiber interfaces and shared wavelength converters. The multi-fiber extension of the recently proposed Shared-Per-Input-Wavelength (SPIW) scheme is compared against the multi-fiber Shared-Per-Node (SPN) scheme in terms of cost and performance for asynchronous traffic. In addition to using Markov chains and fixed-point iterations for modeling the mono-fiber case, a novel state aggregation technique is proposed to evaluate the packet loss in asynchronous multi-fiber scenario. The accuracy of the performance models is validated by comparison with simulations in a wide variety of scenarios with both balanced and imbalanced input traffic. The proposed analytical models are shown to remarkably capture the actual system behavior in all scenarios we tested. The adoption of multi-fiber interfaces is shown to achieve remarkable savings in the number of wavelength converters employed and their range. In addition, the SPIW solution allows to save, in particular conditions, a significant number of optical gates compared to the SPN solution. Indeed, SPIW allows, if properly dimensioned, potential complexity and cost reduction compared to SPN, while providing similar performance.

FPGA-Based Label Processor for Low Latency and Large Port Count Optical Packet Switches

We present a field-programmable gate array (FPGA)-based label processor for in-band optical labels with a processing time independent of the number of label bits. This allows for implementing an optical packet switching architecture that scales to a large port count without compromising the latency. As a proof of concept, we have employed an FPGA board with 100 MHz clock to validate the operation of the label processor in a 160 Gb/s optical packet switching system. Experimental results show successful three label bits processing and 160 Gb/s packets switching with 1 dB power penalty and 470 ns of latency. Projections on the label processor performance by using more powerful FPGAs indicate that 60 label bits ( optical addresses) can be processed within 31 ns.

Multi-function all optical packet switch by periodic wavelength arrangement in an arrayed waveguide grating and wideband optical filters

By utilizing the cyclic filtering function of an NxN arrayed waveguide grating (AWG), we propose and experimentally demonstrate a novel multi-function all optical packet switching (OPS) architecture by applying a periodical wavelength arrangement between the AWG in the optical routing/buffering unit and a set of wideband optical filters in the switched output ports to achieve the desired routing and buffering functions. The proposed OPS employs only one tunable wavelength converter at the input port to convert the input wavelength to a designated wavelength which reduces the number of active optical components and thus the complexity of the traffic control is simplified in the OPS. With the proposed OPS architecture, multiple optical packet switching functions, including arbitrary packet switching and buffering, first-in-first-out (FIFO) packet multiplexing, packet demultiplexing and packet add/drop multiplexing, have been successfully demonstrated.

The BOOM Project: Towards 160 Gb/s Packet Switching Using SOI Photonic Integrated Circuits and Hybrid Integrated Optical Flip-Flops

We present a 160 Gb/s optical packet switching architecture that performs label detection and packet wavelength con- version using photonic components integrated on silicon-on-insulator (SOI) waveguide boards. For label detection, we report the fabrication of a 4-channel tunable, second-order microring resonator demultiplexer using the SOI nanowire waveguide platform. For all-optical wavelength conversion we report the integration and packaging of a cascaded SOI delay interferometer (DI) structure using SOI rib waveguides. Both components were assembled with an optical flip-flop to enable 160 Gb/s optical packet switching. The power penalty after the wavelength conversion process was ~4.5 dB with error performance well above the FEC limit. This work is part of the European ICT-BOOM project which aims at building a Tb/s photonic router using hybrid and heterogeneous integration on SOI substrates. The preliminary results reported here is the initial step before the final project demonstrator.

Performance Analysis of Different Optical Switching Architectures

Problem statement: Optical Packet Switching (OPS) and transmission networks based on Wavelength Division Multiplexing (WDM) have been increasingly deployed in the Internet infrastructure over the last decade in order to meet the huge increasing demand for bandwidth. Several different technologies have been developed for optical packet switching such as space switches, broadcast-and-select, input buffered switches and output buffered switches. These architectures vary based on several parameters such as the way of optical buffering, the placement of optical buffers, the way of solving the external blocking inherited from switching technologies in general and the components used to implement WDM. Approach: This study surveys most of the exiting optical packet switching architectures. A simulation-based comparison of input buffered and output buffered architectures were presented. Results: The performance analysis of the selected two architectures derived using simulation program and compared at different scenarios. We found that the output buffered architectures give better performance than input buffered architectures. Conclusion: The simulation results shows that the-broadcast-and-select architecture is attractive in terms that it has lees number of components compared to other switches.

On the design of asynchronous optical packet switch architectures with shared delay lines and converters

Optical packet switching (OPS) is a promising technology to enable next-generation high-speed IP networks. A major issue in OPS is packet contention that occurs when two or more packets attempt to access the same output fiber. In such a case, packets may be dropped, leading to degraded overall switching performance. Several contention resolution techniques have been investigated in the literature including the use of fiber delay lines (FDLs), wavelength converters (WCs), and deflection routing. These solution typically induce extra complexity to the switch design. Accordingly, a key design objective for OPS is to reduce packet loss without increasing switching complexity and delay. In this paper, we investigate the performance of contention resolution in asynchronous OPS architectures with shared FDLs and WCs in terms of packet loss and average switching delay. In particular, an enhanced FDL-based and a novel Hybrid architecture with shared FLDs and WCs are proposed, and their packet scheduling algorithms are presented and evaluated. Extensive simulation studies show that the performance of proposed FDL-based architecture outperforms typical OPS architectures reported in the literature. In addition, it shown that, for the same packet loss ratio, the proposed hybrid architecture can achieve up to 30% reduction in the total number of ports and around 80% reduction in the overall length of fiber as compared to the FDL-based architectures.

Evaluation of Power Consumption in Low Spatial Complexity Optical Switching Fabrics

In this paper, we propose an analytical model to evaluate the power consumption in the switching fabric of a bufferless shared-per-wavelength (SPW) optical packet switch architecture in which one bank of wavelength converters (WC) is dedicated to each wavelength. We assume that both optical gates and WCs are realized in semiconductor optical amplifier technology. In our evaluation, we account for the power consumption of the current drivers needed to both controlling the used active devices and supplying the thermoelectric coolers. SPW allows for a complexity reduction of the spatial switching matrix that leads to reduced power consumption with respect to other switching architectures. Results show the effectiveness in terms of consumed power of the considered architecture with respect to the shared-per-node reference architecture, where a fully sharing strategy of WCs is adopted. The main results show that SPW allows us to reduce the power consumption in the order of 26% for offered traffic equal to 0.6. The obtained results also show how the fabric switching of the SPW optical packet switch consumes much less power per gigabits per second carried than the one of a typical commercial core router.