OpenMP Programs Research Articles

Characterizing task-based OpenMP programs.

Programmers struggle to understand performance of task-based OpenMP programs since profiling tools only report thread-based performance. Performance tuning also requires task-based performance in order to balance per-task memory hierarchy utilization against exposed task parallelism. We provide a cost-effective method to extract detailed task-based performance information from OpenMP programs. We demonstrate the utility of our method by quickly diagnosing performance problems and characterizing exposed task parallelism and per-task instruction profiles of benchmarks in the widely-used Barcelona OpenMP Tasks Suite. Programmers can tune performance faster and understand performance tradeoffs more effectively than existing tools by using our method to characterize task-based performance.

Statistical models for the estimation of execution time of coarsegrained OpenMP programs

Statistical models for the estimation of execution time of coarsegrained OpenMP programs

Locality-Aware Task Scheduling and Data Distribution for OpenMP Programs on NUMA Systems and Manycore Processors

Performance degradation due to nonuniform data access latencies has worsened on NUMA systems and can now be felt on-chip in manycore processors. Distributing data across NUMA nodes and manycore processor caches is necessary to reduce the impact of nonuniform latencies. However, techniques for distributing data are error-prone and fragile and require low-level architectural knowledge. Existing task scheduling policies favor quick load-balancing at the expense of locality and ignore NUMA node/manycore cache access latencies while scheduling. Locality-aware scheduling, in conjunction with or as a replacement for existing scheduling, is necessary to minimize NUMA effects and sustain performance. We present a data distribution and locality-aware scheduling technique for task-based OpenMP programs executing on NUMA systems and manycore processors. Our technique relieves the programmer from thinking of NUMA system/manycore processor architecture details by delegating data distribution to the runtime system and uses task data dependence information to guide the scheduling of OpenMP tasks to reduce data stall times. We demonstrate our technique on a four-socket AMD Opteron machine with eight NUMA nodes and on the TILEPro64 processor and identify that data distribution and locality-aware task scheduling improve performance up to 69% for scientific benchmarks compared to default policies and yet provide an architecture-oblivious approach for programmers.

Slice-based parallel approach for HEVC encoder

The high efficiency video coding (HEVC) is the newest video coding standard from the ITU-T Video Coding Experts Group and the ISO/IEC Moving Picture Experts Group, which significantly increases the computing demands to encode video to reach the limits on compression efficiency. Our interest is centered on applying parallel processing techniques to HEVC encoder to significantly reduce the computational time without disturbing the coding performance behavior. We propose a parallelization approach to the HEVC encoder which is well suited to multicore architectures. Our proposal uses OpenMP programming paradigm working at slice parallelization level. We encode several slices of each frame at the same time using all available processing cores. The results show that speed-ups up to $$9.8$$9.8 can be obtained for the All Intra mode and up to $$8.7$$8.7 for Low-Delay B, Low-Delay P and Random Access modes for $$12$$12 processes with a negligible loss in coding performance.

Performance analysis of parallel algorithms in physics simulation for molecular dynamics simulation liquid metals solidification processes

In this work, a parallel arithmetic program for the MD (molecular dynamics) simulation study of a large-sized system is proposed and reformed, based on the previous program with PVM (Parallel Virtual Machine) model applied in a small-sized system for liquid metals. Our methodology is combined with the MPI (message passing interface) and OpenMP (Open Multiple Processing) programming model using the spatial domain decomposition method, conquering the problems occurred in PVM model and enlarging the scale of simulated system. Comparing with the previous small-sized system consisting of 50,000–100,000 atoms, the large-sized system is consist of 5,000,000–10,000,000 atoms and the simulation results are more closely to the real situation of the simulated system. In this paper, the performance of parallel program using MPI+OpenMP model is analyzed, showing better speedup, parallel efficiency, and scalability. Finally, we adopt many physical evaluation methods to verify the validity of the simulation results, including pair distribution function, bond-type index analysis, atomic clusters analysis and visualizing analysis. From these physical results, it is clear that the simulation results are in good agreement with the experimental results, which confirm the correctness of the program in simulation.

Automatic and Portable Mapping of Data Parallel Programs to OpenCL for GPU-Based Heterogeneous Systems

General-purpose GPU-based systems are highly attractive, as they give potentially massive performance at little cost. Realizing such potential is challenging due to the complexity of programming. This article presents a compiler-based approach to automatically generate optimized OpenCL code from data parallel OpenMP programs for GPUs. A key feature of our scheme is that it leverages existing transformations, especially data transformations, to improve performance on GPU architectures and uses automatic machine learning to build a predictive model to determine if it is worthwhile running the OpenCL code on the GPU or OpenMP code on the multicore host. We applied our approach to the entire NAS parallel benchmark suite and evaluated it on distinct GPU-based systems. We achieved average (up to) speedups of 4.51× and 4.20× (143× and 67×) on Core i7/NVIDIA GeForce GTX580 and Core i7/AMD Radeon 7970 platforms, respectively, over a sequential baseline. Our approach achieves, on average, greater than 10× speedups over two state-of-the-art automatic GPU code generators.

IJARCCE - Computer and Communication Engineering

2 Abstract: The improvement in performance gained by the use of a multi core processor depends very much on the software algorithms used and their implementation. In particular, possible gains are limited by the fraction of the software that can be run in parallel simultaneously on multiple cores and this effect is described by Amdahl's law. Most applications, however, are not accelerated so much unless programmers invest a prohibitive amount of effort in re- factoring the whole problem. In order to exploit the complete capabilities of multi core systems, applications have to become increasingly parallel in nature. Writing parallel program is not an easy task. OpenMP programming model helps in creating multithreaded applications for the existing sequential programs. This paper analyses the performance improvement of a parallel algorithm on multi core systems. The experimental results shows Significant speed up achieved on multi core systems with the parallel algorithm.

Using distributed memory parallel computers and GPU clusters for multidimensional Monte Carlo integration

SummaryThe aim of this paper is to show that the multidimensional Monte Carlo integration can be efficiently implemented on various distributed memory parallel computers and clusters of multicore nodes using recently developed parallel versions of linear congruential generator and lagged Fibonacci generator pseudorandom number generators. We show how to accelerate the overall performance by offloading some computations to Graphics Processing Units (GPUs), and we discuss how to transform Message Passing Interface (MPI) + OpenMP programs to MPI + OpenMP + CUDA model. We explain how to utilize multiple cores of CPUs together with multiple GPU accelerators within a single node and how to achieve reasonable load balancing of all computational resources of GPU‐accelerated multicore nodes. We present and discuss the results of experiments performed on the following target architectures: IBM Blue Gene/Q parallel computer, a cluster of Intel Xeon E5‐2660 servers, and a Tesla‐based GPU cluster with Intel Xeon X5650 multicore processors. The results are presented from two points of view: strong scaling and weak scaling. We also compare the performance of all considered architectures. Copyright © 2014 John Wiley & Sons, Ltd.

Research on Multi-Core PC Parallel Computation Based on OpenMP

Along with quad-core PC coming into the market and invention of 80-core processor in the laboratory, Software development will go through a foundational innovation due to multicore technology. The technique of parallel programming on multi-core computers is explored in this thesis. First, the OpenMP standard which is an application programming interface (API) on parallel programming model of shared-memory is introduced and an overview of a set of compiler directives and a library of support functions are given. The OpenMP programs requires an OpenMP-compatible compiler and thread-safe libraries，therefore, both Intel C++ compiler 9.1 and Microsoft Visual Studio 2005 are perfect choices. Then, two-dimensional discrete fast Fourier transform (FFT) is studied by focusing on parallel program design，realization and optimization technology. Finally，the thesis predicts that high performance parallel computing software component library must be a perfect exploitation field in the further future.

Improving Resilience to Timing Errors by Exposing Variability Effects to Software in Tightly-Coupled Processor Clusters

Manufacturing and environmental variations cause timing errors in microelectronic processors that are typically avoided by ultra-conservative multi-corner design margins or corrected by error detection and recovery mechanisms at the circuit-level. In contrast, we present here runtime software support for cost-effective countermeasures against hardware timing failures during system operation. We propose a variability-aware OpenMP (VOMP) programming environment, suitable for tightly-coupled shared memory processor clusters, that relies upon modeling across the hardware/software interface. VOMP is implemented as an extension to the OpenMP v3.0 programming model that covers various parallel constructs, including ${\tt task}$ , ${\tt sections}$ , and ${\tt for}$ . Using the notion of work-unit vulnerability (WUV) proposed here, we capture timing errors caused by circuit-level variability as high-level software knowledge. WUV consists of descriptive metadata to characterize the impact of variability on different work-unit types running on various cores. As such, WUV provides a useful abstraction of hardware variability to efficiently allocate a given work-unit to a suitable core for execution. VOMP enables hardware/software collaboration with online variability monitors in hardware and runtime scheduling in software. The hardware provides online per-core characterization of WUV metadata. This metadata is made available by carefully placing key data structures in a shared L1 memory and is used by VOMP schedulerss. Our results show that VOMP greatly reduces the cost of timing error recovery compared to the baseline schedulers of OpenMP, yielding speedup of 3%–36% for tasks, and 26%–49% for sections. Further, VOMP reaches energy saving of 2%–46% and 15%–50% for tasks, and sections, respectively.

Performance Improvement of EZW Encoding through Parallelization

During the past few decades the wavelet transform is more and more widely used in image and video compression. One of the well known progressive encodings in image compression is the “Embedded Zerotree wavelet” (EZW) encoding, which involves the wavelet transform. As of today the parallelization of the wavelet transform is abundantly investigated, So this work deals with the parallelization of the encoding part itself. The OPENMP programming model is used for implementing the parallel version. Both the sequential and parallel versions of EZW encoding are presented along with their performance. General Terms Progressive encoding, EZW, zerotree, parallelization

Parallel strategies analysis over the HEVC encoder

Recently, a new video coding standard called HEVC has been developed to deal with the nowadays media market challenges, being able to reduce to the half, on average, the bit stream size produced by the former video coding standard H.264/AVC at the same video quality. However, the computing requirements to encode video improving compression efficiency have significantly been increased. In this paper, we focus on applying parallel processing techniques to HEVC encoder to significantly reduce the computational power requirements without disturbing the coding efficiency. So, we propose several parallelization approaches to the HEVC encoder which are well suited to multicore architectures. Our proposals use OpenMP programming paradigm working at a coarse grain level parallelization which we call GOP-based level. GOP-based approaches encode simultaneously several groups of consecutive frames. Depending on how these GOPs are conformed and distributed, it is critical to obtain good parallel performance, taking also into account the level of coding efficiency degradation. The results show that near ideal efficiencies are obtained using up to 12 cores.

A Pipelined Parallelism Approach to Parallel Short-Range Molecular Dynamics Simulations on Multi-Core Platforms

We present a pipelined parallelism approach to implement the short-range force computations in molecular dynamic simulations on a multi-core machine. Our methodology is based on the OpenMP programming model. It uses multiple producer threads and a single consumer thread to adapt the application for pipeline parallelism, and utilizes the high inter-core communication bandwidth. Multiple producer threads compute the short-range force, and the consumer thread modifies the global force-array. Compared with some other methods applied in data parallelism that can parallelize reduction operations on a force-array, our method achieves high performance especially when the simulation system is characterized by irregular geometry or by inhomogeneous atom densities.

Performance Analysis of Parallel Algorithm over Sequential using OpenMP

Parallel programming represents the next turning point in how software engineers write software. Today, low-cost multi-core processors are widely available for both desktop computers and laptops. As a result, applications will increasingly need to be paralleled to fully exploit the multi-core-processor throughput gains that are becoming available. Unfortunately, writing parallel code is more complex than writing serial code. This is where the OpenMP programming model enters the parallel computing picture. OpenMP helps developers create multi-threaded applications more easily while retaining the look and feel of serial programming. The term algorithm performance is a systematic and quantitative approach for constructing software systems to meet the performance objectives such as response time, throughput, scalability and resource utilization. The performances (speedup) of parallel algorithms on multi-core system have been presented in this paper. The experimental results on a multi-core processor show that the proposed parallel algorithms achieves good performance compared to the sequential.

Performance Monitoring and Analysis of Task-Based OpenMP

OpenMP, a typical shared memory programming paradigm, has been extensively applied in high performance computing community due to the popularity of multicore architectures in recent years. The most significant feature of the OpenMP 3.0 specification is the introduction of the task constructs to express parallelism at a much finer level of detail. This feature, however, has posed new challenges for performance monitoring and analysis. In particular, task creation is separated from its execution, causing the traditional monitoring methods to be ineffective. This paper presents a mechanism to monitor task-based OpenMP programs with interposition and proposes two demonstration graphs for performance analysis as well. The results of two experiments are discussed to evaluate the overhead of monitoring mechanism and to verify the effects of demonstration graphs using the BOTS benchmarks.

PEBIL: binary instrumentation for practical data-intensive program analysis

In order to achieve a high level of performance, data intensive programs such as the real-time processing of surveillance feeds from unmanned aerial vehicles, genomics sequence comparison or large graph traversal require the strategic application of multi/many-core processors and co-processors using a hybrid of inter-process message passing (e.g. MPI and SHMEM) and intra-process threading (e.g. pthreads and OpenMP). To facilitate program and system design decisions, program runtime behavior gathered through binary instrumentation is useful because it enables inspection of the low-level interactions between a data intensive program and a multi-core processor or many-core co-processor. This work details two novel mechanisms in the PEBIL binary instrumentation platform that make it well-suited for analyzing data-intensive programs by providing (1) support for fast lookup of instrumentation thread-local storage (ITLS) and (2) support for the fast enabling and disabling of instrumentation at runtime as a methodology for supporting sampling. These features are compared to two other popular binary instrumentation platforms, Pin and Dyninst, in both analytical and empirical terms for programs implemented using the popular but disparate parallelization models MPI and OpenMP. Empirical comparisons are made for two binary instrumentation applications that are critical to the analysis of data-intensive programs, basic block counting and memory address trace collection. These empirical results show that PEBIL is unrivaled in terms of overhead for basic block counting, introducing an average of 18 % extra runtime for MPI programs and 116 % for OpenMP programs as opposed to 60 % (MPI) and 232 % (OpenMP) for Pin and 20 % (MPI) and 14743 % (OpenMP) for Dyninst. For memory address trace collection that makes use of the conventional optimization of sampling 10 % of the memory addresses of a program to reduce processing time, PEBIL also introduces the lowest overheads of 144 % (MPI) and 222 % (OpenMP) compared to 313 % (MPI) and 360 % (OpenMP) with Pin and 1113 % (MPI) and 89075 % (OpenMP) with Dyninst.

Performance Optimization of Video Coding Process on Multi-Core Platform Using Gop Level Parallelism

High definition video applications often require heavy computation, high bandwidth and high memory requirements which make their real-time implementation difficult. Multi-core architecture with parallelism provides new solutions to implementing complex multimedia applications in real-time. It is well-known that the speed of the H.264 encoder can be increased on a multi-core architecture using the parallelism concept. Most of the parallelization methods proposed earlier for these purposes suffer from the drawbacks of limited scalability and data dependency. In this paper, we present a result obtained using data-level parallelism at the Group-Of-Pictures (GOP) level for the video encoder. The proposed technique involves each GOP being encoded independently and implemented on JM 18.0 using advanced data structures and OpenMP programming techniques. The performance of the parallelized video encoder is evaluated for various resolutions based on the parameters such as encoding speed, bit rate, memory requirements and PSNR. The results show that with GOP level parallelism, very high speed up values can be achieved without much degradation in the video quality.

Integrating performance analysis and energy efficiency optimizations in a unified environment

Performance analysis tools have been available for decades. They help developers to speed up their applications and pinpoint bottlenecks in scalability. They are wide-spread, well understood, and sophisticated. Since the growing power consumption of HPC systems has become a major cost factor, support for energy efficiency evaluation has been added to various performance analysis tools. Furthermore, beneficial as well as detrimental effects of power saving strategies on energy efficiency are already well understood. However, appropriate tools to directly exploit the detected potentials are not yet available. We therefore present a library that reuses the highly sophisticated instrumentation mechanisms of VampirTrace to dynamically change hardware and software parameters that influence energy efficiency. We also present a library that wraps OpenMP runtimes of several x86_64 compilers in order to provide a low-overhead instrumentation at a parallel region level. This enhances VampirTrace's abilities to handle OpenMP programs without the typically required recompilation.

Characterizing and Mitigating Work Time Inflation in Task Parallel Programs

Task parallelism raises the level of abstraction in shared memory parallel programming to simplify the development of complex applications. However, task parallel applications can exhibit poor performance due to thread idleness, scheduling overheads, andwork time inflation– additional time spent by threads in a multithreaded computation beyond the time required to perform the same work in a sequential computation. We identify the contributions of each factor to lost efficiency in various task parallel OpenMP applications and diagnose the causes of work time inflation in those applications. Increased data access latency can cause significant work time inflation in NUMA systems. Our locality framework for task parallel OpenMP programs mitigates this cause of work time inflation. Our extensions to the Qthreads library demonstrate that locality-aware scheduling can improve performance up to 3X compared to the Intel OpenMP task scheduler.

Coordinate-Space Hartree-Fock-Bogoliubov Solvers for Super fluid Fermi Systems in Large Boxes

The self-consistent Hartree-Fock-Bogoliubov problem in large boxes can be solved accurately in the coordinate space with the recently developed solvers HFB-AX (2D) and MADNESS-HFB (3D). This is essential for the description of superfluid Fermi systems with complicated topologies and significant spatial extend, such as fissioning nuclei, weakly-bound nuclei, nuclear matter in the neutron star rust, and ultracold Fermi atoms in elongated traps. The HFB-AX solver based on B-spline techniques uses a hybrid MPI and OpenMP programming model for parallel computation for distributed parallel computation, within a node multi-threaded LAPACK and BLAS libraries are used to further enable parallel calculations of large eigensystems. The MADNESS-HFB solver uses a novel multi-resolution analysis based adaptive pseudo-spectral techniques to enable fully parallel 3D calculations of very large systems. In this work we present benchmark results for HFB-AX and MADNESS-HFB on ultracold trapped fermions.