On-chip Temperature Sensor Research Articles

The on-chip temperature compensation and temperature control research for the silicon micro-gyroscope

In this paper, the on-chip temperature compensation and temperature control research for the silicon micro-gyroscope are presented. The proposed micro-gyroscope architecture which integrates an on-chip temperature sensor and a serpentine micro-heater achieves the on-chip temperature compensation and the on-chip temperature control of the micro-gyroscope. We first analyze the thermodynamic steady-state temperature distribution and transient temperature response of micro-gyroscope structure. Then we simulate the temperature response of the micro-gyroscope structure by Ansys software. The Deep Dry Silicon on Glass process and wet etching process are combined for fabrication of the integrated micro-gyroscope structure. The signal measurement and control circuit based on the FPGA platform are implemented. The temperature coefficients of zero bias and scale factor are compensated with the integrated temperature sensor. Taking advantage of the drive mode resonant frequency as the temperature sensor, a high precision on-chip temperature control of micro-gyroscope is realized simultaneously. The on-chip temperature compensation and temperature control experiment of micro-gyroscope prototype is tested. Experimental results indicate that the temperature coefficients of the scale factor and zero bias decrease by 3.95 times and 3.49 times separately by on-chip temperature compensation, which optimizes significantly the temperature characteristics of the micro-gyroscope prototype. The control accuracy of drive-mode frequency reaches to 3.57 × 10?4 Hz (that is 0.123 ppm and the calculated temperature accuracy of 0.0067 °C) from 0 to 40 °C by the on-chip temperature control, which demonstrates an achievement of the precision on-chip temperature control for the micro-gyroscope.

Prototype pixel detector in the SOI technology

We present a prototype pixel detector built in theSilicon on Insulator (SOI) Lapis 200 nm technology. The sensor matrixcontains 1024 cells of an integrating type, sending out continuously aserial analog signal. The pixels are protected from the ``back-gate'' effectby the Buried P-Well implantations. The measured ENC value was found to be120 electrons at 90 μs integration time. An on-chip prototype band-gapvoltage reference and temperature sensor has also been included in thedesign.

A purge and trap integrated microGC platform for chemical identification in aqueous samples.

The majority of current micro-scale gas chromatography (μGC) systems focus on air sampling to detect volatile organic compounds (VOCs). However, purging the VOCs from a water sample using microsystems is an unchartered territory. Various organic compounds used in everyday life find their way to water bodies. Some of these water organic compounds (WOCs) persist or degrade slowly, threatening not just human existence but also aquatic life. This article reports the first micro-purge extractor (μPE) chip and its integration with a micro-scale gas chromatography (μGC) system for the extraction and analysis of water organic compounds (WOCs) from aqueous samples. The 2 cm × 3 cm μPE chip contains two inlet and outlet ports and an etched cavity sealed with a Pyrex cover. The aqueous sample is introduced from the top inlet port while a pure inert gas is supplied from the side inlet to purge WOCs from the μPE chip. The outlets are assigned for draining water from the chip and for directing purged WOCs to the micro-thermal preconcentrator (μTPC). The trapped compounds are desorbed from the μTPC by resistive heating using the on-chip heater and temperature sensor, are separated by a 2 m long, 80 μm wide, and 250 μm deep polydimethylsiloxane (OV-1) coated μGC separation column, and are identified using a micro-thermal conductivity detector (μTCD) monolithically integrated with the column. Our experiments indicate that the combined system is capable of providing rapid chromatographic separation (<1.5 min) for quaternary WOCs namely toluene, tetrachloroethylene (PCE), chlorobenzene and ethylbenzene with a minimum detection concentration of 500 parts-per-billion (ppb) in aqueous samples. The proposed method is a promising development towards the future realization of a miniaturized system for sensitive, on-site and real-time field analysis of organic contaminants in water.

Rogowski Coil for Current and On-Temperature Monitoring Overhead Transmission Lines

This letter describes the development of a rogowski coil current and on-chip temperature sensor for evaluating the sag of conductors in high voltage transmission line. A rogowski coil has a air core instead of an iron core. The measurement show excellent linearity with practical no saturation problems. In addition, the rogowski rate highly for electrical isolation from the bus bar, and is light weight with low material cost. The uses reliably proven universal serial bus technology to energize the electronic circuitry. The data collected together with sag information will provide support for the development of an algorithm for estimation conductor sag values.

On-Chip MOSFET Temperature Sensor for Electrical Characterization of RF Circuits

This letter proposes a new sensor circuit to measure on-chip low-frequency temperature changes that have information about electrical high-frequency figures of merit of a radio frequency (RF) circuit. The proposed sensor circuit uses a metal-oxide-semiconductor field-effect transistor (MOSFET) as a temperature sensing device, which is then connected to a band-pass filter that amplifies the low-frequency temperature signal generated by the RF circuit under test (CUT). Simulations in 65 nm CMOS technology show that such a sensor circuit can extract the center frequency (2.47 GHz) of a RF power amplifier (PA) by measuring on-chip temperature changes at 1 kHz.

Real-time and on-chip surface temperature sensing of GaN LED chips using PbSe quantum dots

PbSe quantum dots (QDs) were employed as real-time and on-chip temperature sensors to monitor the surface temperature of GaN LED chips. The temperature-dependent photoluminescence spectra were achieved and confirmed to be a good method for surface temperature sensing in a micro- to nano-region. The nanosized QD sensors did not influence the LED emission spectrum due to their infrared emission and little absorption. The surface temperature of GaN LED chips was analyzed at different working times and voltages. The temperature sensitivity characterized by the photoluminescence peak position of PbSe QDs was found to be 0.15 nm °C(-1) in a range of 30-120 °C and the precision was determined to be ± 3 °C. The QD surface temperature sensors were confirmed to have good reversibility and repeatability.

A Noise Source Module for In-Situ Noise Figure Measurements From DC to 50 GHz at Cryogenic Temperatures

This letter presents the design and performance of a noise source module for in-situ noise temperature measurements at cryogenic temperatures. The noise source module operates from DC up to 50 GHz and is suitable for measurements of noise temperatures as low as a few Kelvin, achieving a measurement accuracy of about $\pm {1.2}~{\rm K}$ . The GaAs MMIC used in the module includes a well matched 50 $\Omega$ termination with better than 20 dB return loss, a heating element and an on-chip temperature sensor, hence the noise source module can directly be connected to the device under test (DUT) with no additional elements or transitions needed. The measurement can then be taken with standard noise measurement equipment. Noise temperatures as low as 13 K have been measured in Ka-band with this device. Due to the ease of use, the good matching, the extraordinary bandwidth and the less involved calibration technique, the noise source module outperforms the conventional measurement setup using a noise diode in conjunction with a cooled attenuator.

A 200 °C Universal Gate Driver Integrated Circuit for Extreme Environment Applications

High-temperature power converters (dc-dc, dc-ac, etc.) have enormous potential in extreme environment applications, including automotive, aerospace, geothermal, nuclear, and well logging. For successful realization of such high-temperature power conversion modules, the associated control electronics also need to perform at high temperature. This paper presents a silicon-on-insulator (SOI) based high-temperature gate driver integrated circuit (IC) incorporating an on-chip low-power temperature sensor and demonstrating an improved peak output current drive over our previously reported work. This driver IC has been primarily designed for automotive applications, where the underhood temperature can reach 200 °C. This new gate driver prototype has been designed and implemented in a 0.8 μm, 2-poly, and 3-metal bipolar CMOS-DMOS (Double-Diffused Metal-Oxide Semiconductor) on SOI process and has been successfully tested for up to 200 °C ambient temperature driving a SiC MOSFET and a SiC normally-ON JFET. The salient feature of the proposed universal gate driver is its ability to drive power switches over a wide range of gate turn-ON voltages such as MOSFET (0 to 20 V), normally-OFF JFET (-7 to 3 V), and normally-ON JFET (-20 to 0 V). The measured peak output current capability of the driver is around 5 A and is thus capable of driving several power switches connected in parallel. An ultralow-power on-chip temperature supervisory circuit has also been integrated into the die to safeguard the driver circuit against excessive die temperature (≥220 °C). This approach utilizes increased diode leakage current at higher temperature to monitor the die temperature. The power consumption of the proposed temperature sensor circuit is below 10 μW for operating temperature up to 200 °C.

An On-Chip Temperature Sensor With a Self-Discharging Diode in 32-nm SOI CMOS

We report a 39 μm × 27 μm on-chip temperature sensor which uses the temperature-dependent reverse-bias leakage current of a lateral silicon on insulator (SOI) CMOS p-n diode to monitor the thermal profile of a 32-nm microprocessor core. In this sensor, the diode junction capacitance is first charged to a fixed voltage. Subsequently, the diode capacitance is allowed to self-discharge through its temperature-dependent reverse-bias current. Next, by using a time-to-digital-converter circuit, the discharge voltage is converted to a temperature-dependent time pulse, and finally, its width is measured by using a digital counter. This compact temperature sensor demonstrates a 3σ measurement inaccuracy of ±1.95°C across the 5°C-100°C temperature range while consuming only 100 μW from a single 1.65-V supply.

A Low Power Real-time On-Chip Power Sensor in 45-nm SOI

This paper introduces a real-time on-chip power and temperature sensor for active power management in scaled CMOS technologies. In a distinct departure from earlier power estimation techniques, this sensor measures the voltage drop due to a current load and converts it into pulse counts to get a power estimate in real time. Linear regression is used to estimate load current based on the measured output frequency at a given temperature. The same sensor is also used to estimate temperature in a mode where output time period decreases linearly with temperature. Measurement results show accuracy to within ±1.05 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C for temperature estimation in the range of 22 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C-100 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C and within ±10% of the actual power consumed (for loads ≤ 3.3 mA). Fabricated in 45-nm SOI technology, this power and temperature sensor occupies an area of 140 μm×140μm and has a power overhead of 120 μW at 1.2 V supply.

A Multifrequency Passive Sensing Tag With On-Chip Temperature Sensor and Off-Chip Sensor Interface Using EPC HF and UHF RFID Technology

State-of-the-art passive RFID tags are limited in terms of functionality and operating range due to the limited power that can be converted from the electromagnetic field. This is why state-of-the-art wireless sensor systems are mostly battery-based if a high operating range is required. The proposed ultralow-power on-chip sensor unit and off-chip sensor interface which provides enough energy to supply various sensors with a power consumption up to the milliwatt range make it possible to remotely power the proposed RFID tag and use it as wireless sensor node. Equipping sensor nodes with RFID functionality not only enables identification and logistic applications but also an easy integration of the sensing tag into existing RFID systems. Exploiting the different characteristics of HF and UHF RFID systems, namely the large operating range in UHF and the high available power in HF, increases the flexibility and applicability of wireless sensor nodes. This paper presents a remotely powered multifrequency sensing tag according to the EPC HF and EPC Class 1 Gen 2 UHF standard developed in a 0.13- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu$</tex></formula> m low-cost CMOS process. Input powers of <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${-}$</tex></formula> 10.3 or <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${-}$</tex></formula> 7.9 dBm at a frequency of 900 MHz are necessary to operate the sensing tag with activated on-chip sensor unit or off-chip sensor interface, respectively.

Time-Bounded Authentication of FPGAs

This paper introduces a novel technique to authenticate and identify field-programmable gate arrays (FPGAs). The technique uses the reconfigurability feature of FPGAs to perform self-characterization and extract the unique timing of the FPGA building blocks over the space of possible inputs. The characterization circuit is then exploited for constructing a physically unclonable function (PUF). The PUF can accept different forms of challenges including pulsewidth, digital binary, and placement challenges. The responses from the PUF are only verifiable by entities with access to the unique timing signature. However, the authentic device is the only entity who can respond within a given time constraint. The constraint is set by the gap between the speed of PUF evaluation on authentic hardware and simulation of its behavior. A suite of authentication protocols is introduced based on the time-bounded mechanism. We ensure that the responses are robust to fluctuations in operational conditions such as temperature and voltage variations by employing: 1) a linear calibration mechanism that adjusts the clock frequency by a feedback from on-chip temperature and voltage sensor readings, and 2) a differential PUF structure with real-valued responses that cancels out the common impact of variations on delays. Security against various attacks is discussed and a proof-of-concept implementation of signature extraction and authentication are demonstrated on Xilinx Virtex 5 FPGAs.

An Electro-Magnetic Energy Harvesting System With 190 nW Idle Mode Power Consumption for a BAW Based Wireless Sensor Node

State-of-the-art wireless sensor nodes are mostly supplied by batteries. Such systems have the disadvantage that they are not maintenance free because of the limited lifetime of batteries. Instead, wireless sensor nodes or related devices can be remotely powered. To increase the operating range and applicability of these remotely powered devices an electro-magnetic energy harvester iPs developed in a 0.13 μ m low cost CMOS technology. This paper presents an energy harvesting system that converts RF power to DC power to supply wireless sensor nodes, active transmitters or related systems with a power consumption up to the mW range. This energy harvesting system is used to power a wireless sensor node from the 900 MHz RF field. The wireless sensor node includes an on-chip temperature sensor and a bulk acoustic wave (BAW) based transmitter. The BAW resonator reduces the startup time of the transmitter to about 2 μs which reduces the amount of energy needed in one transmission cycle. The maximum output power of the transmitter is 5.4 dBm. The chip contains an ultra-low-power control unit and consumes only 190 nW in idle mode. The required input power is -19.7 dBm.

Thermal Sensing With Lithographically Patterned Bimetallic Thin-Film Thermocouples

A chromium-nickel thin-film thermocouple that is 50 nm thick is demonstrated on a semiconductor substrate as proof of concept for lithographically processed bimetallic on-chip temperature sensors. The Seebeck coefficient of the thin-film thermocouple is calibrated to be 10.37 μV/°C, reproducibly smaller than the bulk literature value by a factor of 3.98. The batch reproducibility of this thin-film Seebeck coefficient is demonstrated. The linear Seebeck response up to 90°C is calibrated with the help of a simple formula which accounts for the temperature variations of the reference thermocouple under large heat loads.

A Wireless Sensor Node Supporting Various Powers Supply and Communication Methods

Problem statement: This study presents a wireless sensor node dedicated for in-tire pressure and temperature monitoring. Additional features set it apart from the many different systems available on the highly competitive market. State-of-the-art implementations are mounted on the rim of a tire. Here the sensor node will be mounted on the inner liner of the tire. By moving the sensor node from the rim to the inner liner, new challenges in the analog design arise. Approach: To implement this sensor node new power supply methods are investigated. Next, analog designs with the focus on low power are developed. Since the sensor node is operated in a harsh environment, robustness is a key issue. Results: The discussed sensor is capable of either active or passive communication. The passive communication is used in the field of Radio Frequency Identification (RFID), whereas active communication is used to transmit the sensor data. A combination of both is also possible. To supply the chip in the tire an RF energy harvesting interface is implemented. An input sensitivity of -19.7dBm for the harvesting interface and -12.5 dBm for the RFID interface is measured. The on-chip temperature sensor consumes 4μA including the analog to digital converter. Conclusion: Choosing the discussed sensor node for in-tire monitoring enables new fields of applications. With this sensor node sensing additional parameters like road condition is possible. Using passive communication improves warehouse management for tire manufactures. Also, tire type identification at the car is enabled.

Electrothermal Design Procedure to Observe RF Circuit Power and Linearity Characteristics With a Homodyne Differential Temperature Sensor

The focus in this paper is on the extraction of RF circuit performance characteristics from the dc output of an on-chip temperature sensor. Any RF input signal can be applied to excite the circuit under examination because only dissipated power levels are measured, which makes this approach attractive for online thermal monitoring and built-in test scenarios. A fully differential sensor topology is introduced that has been specifically designed for the proposed method by constructing it with a wide dynamic range, programmable sensitivity to dc, and RF power dissipation, as well as compatibility with CMOS technology. This paper also presents an outline of a procedure to model the local electrothermal coupling between heat sources and the sensor, which is used to define the temperature sensor's specifications as well as to predict the thermal signature of the circuit under test. A prototype chip with an RF amplifier and temperature sensor was fabricated in a conventional 0.18-μm CMOS technology. The proposed concepts were validated by correlating RF measurements at 1 GHz with the measured dc voltage output of the on-chip sensor and the simulation results, demonstrating that the RF power dissipation can be monitored and the 1-dB compression point can be estimated with less than 1-dB error. The sensor circuitry occupies a die area of 0.012 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , which can be shared when several on-chip locations are observed by placement of multiple temperature-sensing parasitic bipolar devices.

Cyber-Physical Thermal Management of 3D Multi-Core Cache-Processor System with Microfluidic Cooling

Existing three-dimensional (3D) integration of multi-core processor-cache system is confronted with the problem of die thermal run-away hazard. This teething problem is addressed by a real-time demand-based thermal management with non-uniform microfluidic cooling in this paper. A novel runtime temperature management is implemented to predict the real-time temperature demand based on software-sensing with prediction-and-correction. A 3D thermal model is developed to cater the real-time microfluidic thermal dynamics. An autoregressive (AR) prediction with correction is implemented by Kalman filtering to predict and correct the runtime power, which is further used to calculate the future temperature demand. With this software-sensing approach, thermal management can be performed in a cyber-physical fashion with real-time sensing, prediction-and-correction and fine-grained control. Compared to the existing works using on-chip temperature sensors, our closed-loop controller with software-sensing avoids the cost of sensor implementation and deployment. Our work analyzes and predicts the fine-grained temperature profile of multi-core processor-cache system. It enables a number of microfluidic channels to be adjusted adaptively with different flow-rates to control the system temperature proactively as opposed to the static control with a uniform flow-rate for microfluidic channels. With the proposed cyber-physical temperature management scheme, it is shown that the temperature of multi-core system is suppressed below an acceptable thermal threshold. In fact, the fine-grained flow-rate control also achieves a more even temperature distribution and saves up to 72.1% of total flow-rate compared with uniform flow-rate controls.

Simultaneous Characterization of Theta-JC and Theta-JB Using Through-Package 1-D Heat Flow

A new technique is proposed for simultaneous, in-situ characterization of in-package thermal resistances (junction-to-case and junction-to-board) in a single test. A thin resistive heater is patterned on package top surface to establish one-dimensional heat conduction along the package vertical direction. Accompanying temperature rise at the heater is measured using a thermocouple and analyzed to estimate equivalent thermal R-C network model of the package. Due to the one-dimensionality of the probing thermal wave, the derived R-C network model represents physical package thermal structure, enabling simultaneous estimation of both thermal resistances (theta-JC and theta-JB). The proposed technique is validated by measuring theta-JC and JB of an overmolded flip-chip ball grid array package. The proposed method eliminates need for a separate test setup for the characterization of each thermal resistance, enhancing the accuracy and efficiency of the package thermal characterization. In addition, use of the external heater and sensing element, instead of on-chip heater and temperature sensor, enables in-situ thermal characterization of a real package mounted on the set board.

A Thermal-Diffusivity-Based Frequency Reference in Standard CMOS With an Absolute Inaccuracy of $\pm $0.1% From $-$55 $^{\circ}$C to 125 $^{\circ}$C

An on-chip frequency reference exploiting the well-defined thermal-diffusivity (TD) of IC-grade silicon has been realized in a standard 0.7 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$\mu{\hbox{m}}$</tex></formula> CMOS process. A frequency-locked loop (FLL) locks the frequency of a digitally controlled oscillator (DCO) to the process-insensitive phase shift of an electrothermal filter (ETF). The ETF's phase shift is determined by its geometry and by the thermal diffusivity of bulk silicon ( <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$D$</tex> </formula> ). The temperature dependence of <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$D$</tex></formula> is compensated for with the help of die-temperature information obtained by an on-chip band-gap temperature sensor. The resulting TD frequency reference has a nominal output frequency of 1.6 MHz and dissipates 7.8 mW from a 5 V supply. Measurements on 16 devices show that it has an absolute inaccuracy of <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\pm $</tex></formula> 0.1% ( <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\sigma= \pm $</tex></formula> 0.05%) over the military temperature range ( <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$-$</tex></formula> 55 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$^{\circ}{\hbox{C}}$</tex></formula> to 125 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$^{\circ}{\hbox{C}}$</tex></formula> ), with a worst case temperature coefficient of <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\pm \hbox{11.2~ppm}/^{\circ}{\hbox{C}}$</tex></formula> .

Strategies for built-in characterization testing and performance monitoring of analog RF circuits with temperature measurements

This paper presents two approaches to characterize RF circuits with built-in differential temperature measurements, namely the homodyne and heterodyne methods. Both non-invasive methods are analyzed theoretically and discussed with regard to the respective trade-offs associated with practical off-chip methodologies as well as on-chip measurement scenarios. Strategies are defined to extract the center frequency and 1 dB compression point of a narrow-band LNA operating around 1 GHz. The proposed techniques are experimentally demonstrated using a compact and efficient on-chip temperature sensor for built-in test purposes that has a power consumption of 15 µW and a layout area of 0.005 mm2 in a 0.25 µm CMOS technology. Validating results from off-chip interferometer-based temperature measurements and conventional electrical characterization results are compared with the on-chip measurements, showing the capability of the techniques to estimate the center frequency and 1 dB compression point of the LNA with errors of approximately 6% and 0.5 dB, respectively.