Offset Line Research Articles

Research on Optimization of Filling Path Algorithm in Rapid Prototyping Technology

According to the Rapid Prototyping for uniform thickness of thin-wall parts forming, the paper uses the filling method that is mixed the parallel lines with contour trajectory offset lines, based on the both of filling methods that conducted a research on the algorithm and derivation of mathematics, gets the mathematical expression of the both filling track line. The algorithm for Rapid Prototyping system which can achieved software optimization provided a mathematical foundation.

Analyze the Efficiency on FDM Process of Rapid Prototyping Technology with the New Filling Method

According to consistant thickness of thin-wall kind parts in the paper, based on that is used to two fill paths which are the parallel lines and contour trajectory offset lines to mixed filling of Z direction, and ObjectARX2002 is the second developing tool of AutoCAD2002 which can work out software on VC++6.0. The final software can simulate two filling path, and calculating the length of filling path. And then analyze the efficiency that obtain the conclusion when the new type filling method is used to forming consistant thickness of thin-wall kind parts.The conclusion that the new type filling method can improve the efficiency of Rapid Prototyping in a large extent, and it has a largely practical application value in Rapid Prototyping Technology.

Design of Bandwidth-Enhanced Doherty Power Amplifiers for Handset Applications

A quarter-wavelength impedance transformer as well as a number of other factors limit the bandwidth (BW) of Doherty power amplifiers (PAs). We utilize the lower Q of a quarter-wave length transformer and propose a phase compensation circuit and an additional offset line to be incorporated into the matching net works for an enhanced BW of the Doherty PA. The quarter-wave length transformer and the final output circuit have the same Q. Input dividing networks are also analyzed for operation of broad BW. The Doherty PA for long term evolution (LTE) applications is integrated into a 1.4 × 1.4 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> die using an InGaP/GaAs hetero junction bipolar transistor (HBT) process. For an LTE signal with a 7.5-dB peak-to-average power ratio (PAPR) and a 10-MHz BW, the PA with a supply voltage of 4.5 V delivers a power-added ef ficiency (PAE) of 36.3% and an adjacent channel leakage ratio (ACLR) of -32 dBc with an average output power of 27.5 dBm at a frequency of 1.85 GHz. Across frequencies from 1.6-2.1 GHz, the PA performs with a PAE of more than 30%, a gain of more than 28 dB and an ACLR of less than -31 dBc at an average output power of 27.5 dBm while satisfying the standard spectrum mask. These figures verify that the proposed bandwidth enhancement techniques are effective for handset Doherty PAs.

Design and Linearization of Concurrent Dual-Band Doherty Power Amplifier With Frequency-Dependent Power Ranges

A design methodology for a concurrent dual-band Doherty power amplifier (PA) with frequency-dependent backoff power ranges is presented in this paper. Based on a dual-band T-shaped network and a coupled line network, different dual-band components needed in Doherty PA topology, including a 3-dB branch-line coupler, an offset line, and a quarter-wavelength transformer, are developed. Two prototypes with balanced and imbalanced backoff power range modes are implemented to verify the feasibility. Continuous wave signal test results show that the proposed dual-band PA successfully achieves a power-added efficiency of 33% and 30% at the 6-dB backoff point from the saturated output power at 880 and 1960 MHz, respectively. To meet linearity requirements, the PA nonlinear behavior is characterized by using digital multitone signals, which categorize the distortions of a concurrent dual-band PA into intermodulation and cross-modulation. Finally, a 2-D digital predistortion technique is used to compensate for the nonlinearity of PA in dual bands. Two two-tone signals are applied to the dual bands for linearization, and the experimental results show that this technique achieves improvements of better than 19.1 and 24.6 dB for the intermodulation and cross-modulation in the dual bands, respectively.

Fabricating the Steam Turbine Blade by Direct Laser Forming

Direct Laser Forming (DLF) is a new layer additive manufacturing technique. It is difficult to control the forming process because many technological parameters interplay. Besides three kinds of laser scanning modes (namely, offset contour line mode, parallel line mode, and the offset contour line combined with parallel line fill mode), the effect of the defocusing amount of both laser beam and powder stream on the forming process is investigated in detail in the article. It is shown that the forming quality is better when the defocusing amount of both laser beam and powder stream are, respectively, between −0.5 mm to 0.5 mm and −3 mm to −1 mm, and at the same time, the self-healing phenomenon (namely, the plane quality of the top surface of part tends to decrease) is firstly found under the open loop condition. Based on the forming mechanisms under different defocusing amount, and the comparative study of three kinds of laser scanning modes, high definition steam turbine blade is fabricated by DLF using the hybrid scanning mode. Consequently, some complex metal parts in aerospace field can be near-net-shape formed by DLF.

Design of Highly Efficient Three-Stage Inverted Doherty Power Amplifier

This letter reports the highly efficient three-stage inverted Doherty power amplifier (IDPA) using 30 W and 50 W Si LDMOSFETs. The characteristic impedances of the output combiner are derived to achieve high efficiency at a large back-off power (BOP). The output matching networks and offset lines of the carrier and peaking cells are used to modulate the load impedance. The transmission line in the input path of the carrier cell is inserted to adjust the delay among the carrier and peaking cells. The drain efficiency (DE) of 40.3% with a gain of 9 dB is achieved at output power of 42 dBm (8.5 dB BOP) and the DE above 40% is maintained in wide output range for a 2.14 GHz continuous wave signal. For a one-carrier WCDMA signal at an output power of 40 dBm (10.5 dB BOP), the DE of 35% with the gain of 9.2 dB is achieved.

Data Processing of Laser Metal Deposition Shaping Technology: Part II. Contour Scanning Path Research

This document proposes a kind of contour path offset algorithm of Laser Metal Deposition Shaping (LMDS) technology. The contour path offset is determined by both laser spot radius and post-processing allowance. Besides, the offset direction can be judged through applying the cutter offset principle of NC machining. Then the formed intersecting points of a series of equidistant lines can be connected circularly to solve the contour path offset line. Since this algorithm fully considered the near-net shaping condition of LMDS and the combined effects of laser spot radius, the precision of as-formed metal parts could be further improved.

A highly efficient and linear inverted Doherty power amplifier with unsymmetrical delay path

A highly efficient and linear inverted Doherty power amplifier (IDPA) with unsymmetrical delay path is presented. To compensate the phase difference between carrier and peaking cells, an additional offset line is inserted at the input path of the carrier cell. For verification, the IDPA with unsymmetrical delay path is implemented using two 50-W Si LDMOSFETs and tested using a continuous wave (CW) and a one-carrier wideband code division multiple access (WCDMA) signals at 2.6 GHz. From the measured results, the proposed IDPA shows not only an increase in the gain and the power-added efficiency, but also superior adjacent channel leakage ratios improvement. After the digital predistortion linearization, the proposed IDPA shows better improved linearity than conventional IDPA, and also meet the linearity requirement of the WCDMA signal without decreasing efficiency. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:1302–1305, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.25962

Offset Line Method-Based Study on Visualization of Steep Terrains on Loess Plateau in Shanxi Province

In order to realize the 3D visualization of steep terrains like level terraces, a new Offset Line Method (OLM) -based visual method is put forth in this paper. The constrained feature lines and their Bottom Offset Cliff Lines (BOCLs) are collected and considered while building DEM. Therefore, the steep terrains like level terraces with steep steps can be visualized well. Our case study shows that the steep terrains can be visualized well if the constrained feature lines and their BOCLs were considered according to the principles of OLM while building Triangulated Irregular Networks (TINs) or grid-based DEM. how to determine the optimal value of ∆d needs further study in the future.

A broadband inverted Doherty power amplifier for IEEE 802.11b/g WLAN applications

A broadband inverted Doherty power amplifier (IDPA) is proposed in this article. To achieve the tradeoff between efficiency and operation bandwidth, an optimized output matching network and offset lines are used to design the load network of the proposed power amplifier (PA). For experimental verification, a conventional IDPA and a class-AB biased balanced PA have been implemented. In addition, a 64-QAM modulated signal with 24-MHz channel bandwidth are applied as excitation. According to experiment results, the proposed Doherty power amplifier can keep power-added efficiency (PAE) higher than 31% from 2.4 to 2.5 GHz with 0.5 dB output-power flatness at 27-dBm output power. The PAE of the proposed PA is 16.4% and 4.2% higher than the balanced PA and the conventional IDPA respectively. In addition, the linearity of the proposed PA is improved effectively. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:636–639, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.25785

The effect of shear force on ink transfer in gravure offset printing

This paper asserts that shear force plays an important role in the printing mechanism of gravure offset line printing. To that end, a theoretical printing model showing shear force dependence on the printing angle is proposed. The decrement of the internal angle between the printing direction and the pattern-line direction increases shear force, thereby enhancing the amount of transferred ink in the off stage. A printing experiment using pattern-line widths of 80 µm and 20 µm shows the angle dependence of the line width, thickness and amount of transferred ink, reflecting the effect of shear force. The effect of the internal angle on cross-sectional differences in lines with a width of 20 µm and with angle variation is greater than that in lines with a width of 80 µm, which corresponds with the theoretical prediction that shear force has greater influence on a narrower line. The strong correlation between the experimental data and the theoretical model supports the validation of the theoretical model.

The Backfire-to-Broadside Symmetrical Beam-Scanning Periodic Offset Microstrip Antenna

A backfire-to-broadside beam-scanning antenna with a periodic structure is described. The proposed antenna consists of the offset double-sided parallel-strip lines (DSPSL). The characteristics of the offset DSPSL have been studied, and then a series of offset DSPSL have been applied as the periodic antenna with a backfire-to-broadside symmetrical beam scanning capability. Both in plane and plane, main beams symmetrically steer from the backfire direction to the broadside direction with the increase of the operating frequency. The fractional impedance bandwidth has been broadened to nearly 50% by using the offset DSPSL structure.

Fast feature-guided stippling method based on threshold matrix

The traditional stippling methods have some deficiencies for example the distribution of stipples is not very reasonable the features are not very clear and the iterations cost much time.In this paper the fast feature-guided stippling method was proposed in accordance with the distribution and rendering of stipples.The distribution of stipples was generated by sampling on offset lines which were obtained by applying distance transformation to feature image.The rendering of stipples was the mapping procedure of threshold matrix generated previously to distributed stipples.The experimental results show that this method can help obtain good stippling style with reasonable stipples distribution.At the same time the generating speed is increased greatly.

Genetic effects influencing salinity tolerance in six varieties of tilapia (Oreochromis) and their reciprocal crosses

Six tilapia varieties were used in two 6 × 6 diallel crosses. Salinity was increased in daily increments of 7 g L−1 in five replicate trials to estimate the salinity tolerances of 2205 F1 juveniles from parental varieties and their reciprocal crosses. Genetic effects potentially influencing salinity tolerance were estimated, including line effects, maternal effects, reciprocal and specific reciprocal effects, direct heterosis, specific combining abilities (SCAs) and general combining abilities (GCAs). The mean heterosis, , for salinity tolerance was 4.46 g L−1 (P<0.01). The average mean salinity tolerance (MST) of the parental varieties was 35.2 g L−1, and yet, MSTs above 36 g L−1 were found in 21 of 34 variety crosses produced. In some instances, maternal effects offset line effects, while in others, these influences were complementary. Ten variety combinations exhibited significant (P<0.05) or highly significant (P<0.01) direct heterosis, and SCAs were significant (P<0.05) or highly significant (P<0.01) in five combinations. Reciprocal and specific reciprocal effects also influenced the salinity tolerance in some variety combinations. Direct line effects generally reflected MST rankings. The variance of cross means was 30.1% due to variety GCAs (primarily additive effects) and 69.9% due to SCAs (primarily dominance effects).

Formula Derivation and Verification of Characteristic Impedance for Offset Double-Sided Parallel Strip Line (DSPSL)

Double-sided parallel strip line (DSPSL) is a versatile microwave transmission line. With an offset, it allows for large variations of the characteristic impedance and therefore flexibility for the design of novel microwave devices. In this letter, a formula for the characteristic impedance of DSPSL is derived by the fuzzy EM method and verified by commercial software. Very good agreement is observed.

Circuit design of a novel FPGA chip FDP2008

A novel FPGA chip FDP2008 (Fudan Programmable Logic) has been designed and implemented with the SMIC 0.18 μm CMOS logic 1P6M process. The new design method means that the configurable logic block can be configured as distributed RAM and a shift register. A universal programmable routing circuit is also presented; by adopting offset lines, complementary hanged end-lines and MUX + Buffer routing switches, the whole FPGA chip is highly repeatable, and the signal delay is uniform and predictable over the total chip. A standard configuration interface SPI is added in the configuration circuit, and a group of highly sensitive amplifiers is used to magnify the read back data. FDP2008 contains 20 × 30 logic TILEs, 200 programmable IOBs and 10 × 4 kbit dual port block RAMs. The hardware software cooperation test shows that FDP2008 works correctly and efficiently.

Design Optimization and DPD Linearization of GaN-Based Unsymmetrical Doherty Power Amplifiers for 3G Multicarrier Applications

In this paper, a design optimization approach for gallium-nitride (GaN)-based Doherty power amplifiers (PAs) is proposed to enhance linearizability and maximize the power-added efficiency (PAE) for multicarrier wideband code division multiple access (WCDMA) applications. This is based on the use of an input offset line at the peaking amplifier path to compensate, at a given backoff level, for the bias and power-dependant phase variation through the carrier and peaking paths. At a 6-dB output power backoff (OPBO), measurement results of the unsymmetrical unlinearized Doherty amplifier using a four-carrier WCDMA signal achieved results of close to 50% for the PAE and about -30 dBc for the adjacent channel leakage ratio. Linearization of the designed Doherty PA using a baseband digital predistortion technique led to quasi-perfect cancellation of spectrum regrowth. At an OPBO equal to the input signal's peak-to-average power ratio, -63- and -53-dBc adjacent channel power ratios were obtained when the Doherty amplifier was driven by single- and four-carrier WCDMA signals, respectively. To the best of the authors' knowledge, this represents the best reported results for PAE and linearity for GaN-based Doherty PAs linearized over 20 MHz of instantaneous bandwidth.

Stretched zone width and blunting line equation for determination of initiation fracture toughness in low carbon highly ductile steels

The methods of measurement of stretched zone width (SZW) have been examined and its relative insensitivity to thickness and length of pre-fatigue crack in CT specimens, encourages its use to mark the end of blunting in the J–R curve. On the basis of SZW, a mathematical equation has been determined for the slope of blunting line, also as a function of strain hardening coefficient, in the limited context of SA333 Gr. 6 steel and HSLA steel. The internal consistency of the 0.2 mm offset blunting line equation has been demonstrated by comparing the estimated and the observed initiation fracture toughness. The equation has been validated also with the results from literature. The initiation fracture toughness obtained for SA333 Gr. 6 steel following 0.2 mm offset line equation determined here compares well with the results reported in earlier investigations.

Design and implementation of a delay-optimized universal programmable routing circuit for FPGAs

This paper presents a universal field programmable gate array (FPGA) programmable routing circuit, focusing primarily on a delay optimization. Under the precondition of the routing resource's flexibility and routability, the number of programmable interconnect points (PIP) is reduced, and a multiplexer (MUX) plus a BUFFER structure is adopted as the programmable switch. Also, the method of offset lines and the method of complementary hanged end-lines are applied to the TILE routing circuit and the I/O routing circuit, respectively. All of the above features ensure that the whole FPGA chip is highly repeatable, and the signal delay is uniform and predictable over the total chip. Meanwhile, the BUFFER driver is optimized to decrease the signal delay by up to 5%. The proposed routing circuit is applied to the Fudan programmable device (FDP) FPGA, which has been taped out with an SMIC 0.18-μm logic 1P6M process. The test result shows that the programmable routing resource works correctly, and the signal delay over the chip is highly uniform and predictable.

2D curve offset algorithm for pockets with islands using a vertex offset

An offset edge algorithm is a common method of creating contour-parallel paths that has been widely studied. The method includes approaches such as pair-wise intersection and Voronoi diagrams. The method proposed in this paper is unlike these approaches in that it determines an offset algorithm via the offset vertex. In addition, the proposed method differs from common approaches because: (1) the offset vertices are computed based on bisectors, (2) the validity of combining the direction and position checking for each offset edge is the main point of the proposed method; (3) an efficient algorithm is constructed to connect all offset edges simultaneously to generate raw offset lines without local invalid loops, and (4) an offset-distance check is performed to remove the global invalid loops from the raw offset lines as well as the interference loops in joining boundaries and multiple islands. The proposed method was verified with various slice contour shapes, with or without islands, and good results were obtained with significant reductions in the calculation time.