Offset Compensation Research Articles

A High-Speed Well Logging Telemetry System Based on Low-Power FPGA

This paper presents a field-programmable gate array (FPGA)-based design, implementation, and measurement of a high-speed telemetry system for well-logging. In the application of geophysics, telemetry is an essential part. With the continuous development of new logging theory and new methods, the telemetry system must accurately upload more and more information in real-time. The methods and techniques used to improve the data transmission system’s performance have become a significant problem in developing a well-logging instrument. The proposed design realized the application of orthogonal frequency division multiplexing (OFDM) in the high-speed cable telemetry system. Besides, We have optimized the calculation of some modules such as symbol synchronization, frequency domain equalization, data compression, and sampling clock offset compensation while not losing performance as much as possible so that the modulation and demodulation algorithm can be implemented on a low-power FPGA. With this system, the modulated data transmitted over a 7,000-meter armored cable can be demodulated in real-time. Compared to conventional devices using digital signal processors, this FPGA-based telemetry system shows advantages in power consumption and real-time performance. Test results show that the FPGA power consumption is 169.7mW, and the high-speed cable telemetry system can transmit data stably at 1.4 to 2.3Mbps through a 7,000-meter armored logging cable.

Multiphase Continuous-Wave Doppler Radar With Multiarc Circle Fitting Algorithm for Small Periodic Displacement Measurement

A multiphase continuous-wave (MPCW) Doppler radar with a multiarc circle fitting (MACF) algorithm is proposed for improving the accuracy of small periodic displacement measurements. In the proposed radar, local oscillator (LO) signals with different phases are incident to multiple I/Q mixers, to simultaneously generate multiarcs for small periodic motions. The multiarcs obtained from the synchronized data are used in the circle fitting method to provide dc offset compensation, for accurate phase demodulation. The proposed MACF algorithm, based on the Levenberg–Marquardt method, can more precisely compensate for the dc offset by combining multiarcs generated from the proposed radar. A 5.8-GHz MPCW Doppler radar module with four-phased LO signals is implemented as a demonstration. The small periodic displacement of a metal plate on a single-axis linear stage is measured using the proposed radar module and algorithm. Compared with conventional CW Doppler radar using a single arc, measurement results using the proposed radar show that the root-mean-square error (RMSE) can be effectively decreased in the periodic motion from 1 to 2 mm, at distances from 30 to 60 cm. The RMSE is reduced by more than 33% for a peak-to-peak displacement of 1 mm at a distance of 60 cm.

Joint low‐complexity equalisation and CFO compensation for DCT–OFDM communication systems based on SIC

In wireless radio communication systems, equalisation is one of the most important algorithms to improve the bit-error-rate performance. The linear zero-forcing equalisers suffer from noise enhancement. The linear minimum mean square error equalisers suffer from large complexity and require the estimation of the signal-to-noise ratio to work properly. In this study, the authors propose a joint low-complexity regularised zero-forcing equaliser with successive interference cancellation (JLRZF–SIC) based on discrete cosine transform (DCT) for orthogonal frequency division multiplexing (OFDM) systems. The proposed JLRZF–SIC scheme jointly performs the equalisation and carrier frequency offset (CFO) compensation with lower-complexity using the banded-matrix approximation concept. Simulation results show the important role of the proposed JLRZF–SIC scheme is to improve the system performance compared to the other equalisation schemes.

Decision-directed CPR-assisted IQ imbalance-multiplexing for coherent PON downlink system with access-span length difference

In the 10 GSymbol/s/λ coherent PON downlink system with I- and Q-axis mapping for different optical node units (ONUs), an extra power transmission happens because of the transmission difference between the ONUs. An adaptive IQ imbalance modulation with optimum IQ power loading for two ONUs is introduced at the transmitter-side digital signal processing (DSP). For scaling of the IQ power ratio setting range, DD-CPR with PADE scheme as an accurate frequency offset compensation is used at the receiver-side DSP. We numerically and experimentally show 2.8 dB power saving compared to a conventional balanced QPSK signal using the adaptive IQ imbalanced QPSK signal (θ=π/12) in the case of the 57 km downlink transmission difference between two ONUs.

A novel DSP scheme for eliminating the interaction between dispersion and transient frequency offset in optical burst-mode coherent systems

Optical coherent burst-mode transmission can offer not only flexibility but also efficiency of the network resource utilization in elastic optical networks. We propose a new digital signal processing (DSP) scheme of coherent burst reception with a training sequence (TS) to solve the convergence problem of equalization caused by the interaction between fast-changing transient frequency offset (TFO) and fiber chromatic dispersion (CD) compensation in optical burst (OB)-mode systems. The DSP scheme is demonstrated to perform well by the simulation and experimentation on 128 Gbps polarization multiplexing quadrature phase-shift keying (PM-QPSK) coherent systems. Thanks to the DSP scheme, a guard interval between two OBs is no longer needed, and the valid payload can be transmitted during TFO changing from wavelength tuning. The proposed DSP scheme can reduce the overhead by ∼73% for wavelength-tunable OB-mode coherent systems compared with using guard intervals, which significantly improves the spectral efficiency of burst-mode systems.

The X-Hall Sensor: Toward Integrated Broadband Current Sensing

This article presents the X-Hall sensor, a viable sensing architecture for implementing a silicon-integrated, broadband, current/magnetic sensor. The X-Hall sensor overcomes the bandwidth limit of the state-of-the-art Hall sensors by replacing the spinning-current technique with dc-biased-based passive offset compensation. In this way, the X-Hall architecture removes the methodological bandwidth limit due to the spinning-current technique and allows for exploiting the Hall probe up to its practical limit, which is set by the parasitic capacitive effects. Moreover, the X-Hall architecture allows pushing the practical bandwidth limit at higher frequencies due to both the removal of the switches inherent in the spinning-current approach and a specially designed analog front end. To this end, a differential-difference current-feedback amplifier (DDCFA) is proposed as an analog front end in the X-Hall sensor. A prototype of the proposed X-Hall architecture is implemented in bipolar-CMOS- DMOS (BCD) 0.16-μm silicon technology to experimentally assess the performance of the X-Hall architecture. The passive offset compensation implemented into the X-Hall architecture is frequency-independent and preserves an adequate offset reduction performance, though less efficient than the spinning-current technique operated at low frequency. Experimental dynamic tests on the prototype identify the presence of an additive parasitic dynamic perturbation due to the package that prevents from fully exploiting the X-Hall prototype up to its designed bandwidth limit. However, the implementation of a postdeemphasis digital filter allows us to mitigate for the dynamic perturbation and experimentally achieve a sensor bandwidth of 4 MHz, which is the broadest bandwidth ever demonstrated by a purely Hall-effect based sensor.

A 1.16-V 5.8-to-13.5-ppm/°C Curvature-Compensated CMOS Bandgap Reference Circuit With a Shared Offset-Cancellation Method for Internal Amplifiers

This article introduces an accurate current-mode bandgap reference circuit design with a novel shared offset compensation scheme for its internal amplifiers. This bandgap circuit has been designed to operate over a very wide temperature range from −40 °C to 150 °C. Its output voltage is 1.16 V with a 3.3-V supply voltage. A multi-section curvature compensation method alleviates the error from the bipolar junction transistor’s base–emitter nonlinear voltage dependence on temperature. The bandgap reference circuit contains two operational amplifiers that are utilized to generate proportional-to-absolute-temperature (PTAT) and complementary-to-absolute-temperature (CTAT) current sources. With the implementation of the described shared offset-cancellation methodology, the simulated output inaccuracy introduced by the amplifier is kept to a 5 $\sigma $ offset within ±4.6 $\mu \text{V}$ while allowing to conserve die size and power consumption by preventing that each amplifier is accompanied by its own active auxiliary offset-cancellation circuit. Designed and fabricated in a 130-nm CMOS process technology, the bandgap reference has a measured output voltage shift of less than 1 mV over a −40 °C to 150 °C temperature range and an overall variation of ±8.2 mV across seven measured samples without trimming.

A 115× Conversion-Ratio Thermoelectric Energy-Harvesting Battery Charger for the Internet of Things

This article presents a high-conversion-ratio (HCR), high-voltage-tolerant (HVT) energy-harvesting battery charger using 0.18-μm standard CMOS for Internet of Things (IoT). To reduce conversion ratio (CR) of inductive power converter and optimize overall power efficiency, the proposed charger cascades a boost converter and reconfigurable charge pump. Different from the high-voltage device, the standard CMOS process has lower parasitic capacitance and on-resistance; therefore, it can reduce switching and conduction loss. The reconfigurable charge pump dynamically changes the number of pumping stages according to the output voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OUT</sub> ) by automatic configuration selector (ACS). To manage the limited power from a thermoelectric generator (TEG), the converter works under the discontinuous conduction mode (DCM). The zero-current detector (ZCD) employs an analog comparator with digital offset compensator and digital comparator to control off-time (T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ) quickly and accurately. The self-idle constant on-time (SI-COT) and idle mode both control the mechanism, helping to further reduce static power dissipation. As a result, the proposed converter can achieve peak efficiency of up to 76% at a 92× conversion ratio with output power ranging from 10 μW to 1.9 mW. The available input voltage ranges are 40 to 400 mV, and the dual output voltage ranges are 1 to 1.6 V and 2 to 4.6 V for V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BOOST</sub> and V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OUT</sub> , respectively.

Direction of Arrival Estimation Using Sparse Nested Arrays With Coprime Displacement

Direction of arrival (DOA) estimation using new proposed array geometries named sparse nested arrays with coprime displacement (SNACD) is discussed in this paper. The SNACD has sparse subarrays with nested relationship, and the displacement between the subarrays is coprime to the inter-element spacing of the smaller subarray. This geometry can combine the properties of nested array and coprime array, which can simultaneously achieve virtual uniform array with large aperture in co-array domain and reduce the mutual coupling influence in physical-array domain. In the co-array domain, the coprime parameter estimations are separated into the virtual direction matrix and source vector, respectively. Based on this data model, several DOA estimation methods can be applied, like the spatial smooth multiple signal classification (SS-MUSIC) and atomic norm minimization based grid-less (ANM-GL) method, which both are robust to the grid mismatch problem. To further reduce the complexity, we proceed to propose a Discrete Fourier transform with offset compensation (DFT-OC) method, which requires neither eigenvalue decomposition nor sparse recovery. The final unique DOA estimation is achieved from the intersection of the coprime estimations, which are achieved with automatically pairing. Compared to coprime array and nested array based methods, the proposed scheme obtains better DOA estimation accuracy and higher angular resolution with mutual coupling influence. Multiple simulations are presented to verify the effectiveness of our approach.

A Low-Noise Chopper Amplifier with Offset and Low-Frequency Noise Compensation DC Servo Loop

The low-frequency and low-amplitude characteristics of neural signals poses challenges to neural signals recording. A low noise amplifier (LNA) plays an important role in the recording front-end. A chopper-stabilized analog front-end amplifier (FEA) for neural signal acquisition is presented in this paper. It solves the noise and offset interference caused by the servo loop in the chopper amplifier structure. The proposed FEA employs a switched-capacitor (SC) integrator with offset and low-frequency noise compensation. Moreover, a dc-blocking impedance is placed for ripple-rejection (RR), and a positive feedback loop is employed to increase input impedance. The proposed circuit is design in a 0.18-µm 1.8-V CMOS process. It achieves a bandwidth of up to 9 kHz for local field potential and action potential signals acquisition. The referred-to-input (RTI) noise is 0.72 µVrms in the 1 Hz~200 Hz frequency band and 3.46 µVrms in the 200 Hz~5 kHz frequency band. The noise effect factor is 0.43 (1 Hz~200 Hz) and 2.08 (200 Hz~5 kHz). CMRR higher than 87 dB and PSRR higher than 85 dB are achieved in the entire pass-band. It consumes a power of 3.96 µW/channel and occupies an area of 0.244 mm2/channel.

A charge balancing technique for neurostimulators

A charge balancing technique that is applicable to dual-edge current nerve stimulators is proposed herein, which is primarily directed to achieving charge balance by controlling discharge times. Compared to the charge balancing technique proposed in other papers, the number of single-cycle imbalanced charges is less than 15 pC. In order to reduce the amount of imbalanced charge, indirect shunt technology, leakage current compensation technology and offset voltage compensation technology was proposed in this paper to build up a synchronization system. To ensure that the neural stimulator can still be in charge balance after performing multiple stimulation cycles, a short pulse insertion technique is applied to the circuit. The circuit was designed based on the TSMC 180 nm process and verified its functionality under the Cadence platform.

A 15-Channel Orthogonal Code Chopping Instrumentation Amplifier for Area-Efficient, Low-Mismatch Bio-Signal Acquisition

This article presents a 15-channel orthogonal code chopping instrumentation amplifier (OCCIA) for an area-efficient and low gain-mismatch multi-channel bio-signal acquisition. Orthogonal codes directly modulate each channel and merge into a single signal for sharing IA, while performing dynamic offset compensation with low power consumption. Digitization-before-demodulation (DBD) transmits the combined modulated data directly, which alleviates ripple noise, and completely removes the demodulation and TX encoding overhead from the ASIC. The proposed OCCIA in 0.18-μm 1P6M CMOS, when compared with the recent multi-channel instrumentation amplifiers (IAs), shows the smallest area (0.019 mm 2 /Ch.), low gain mismatch (0.43%), with the lowest power consumption (1.97 μW/Ch.) and low crosstalk (<; -51.5 dB) at 490-Hz bandwidth.

A Simple Blind Sampling Frequency Offset Estimation Scheme for Short-Reach DD-OFDM Systems

In this paper, a simple and overhead-free sampling frequency offset (SFO) blind estimation and compensation scheme is proposed and experimentally demonstrated in a short-reach direct detection orthogonal frequency division multiplexing (DD-OFDM) transmission system. After extracting subcarriers of OFDM symbols from multiple OFDM frames, the phase shift is obtained by the fourth-power algorithm, and the obtained results are averaged to perform phase estimation. It can achieve high-precision SFO estimation while ensuring low computational complexity as well as high spectral efficiency. The experimental results show that the SFO estimation accuracy using the proposed scheme can be significantly reduced to as low as ±3 ppm when SFO ranges from -1000 ppm to +1000 ppm after 20-km standard single-mode fiber (SSMF) transmission. Moreover, for the QPSK/16QAM encoded DD-OFDM systems aided by the proposed scheme, up to ±200 ppm SFO can be compensated with slight error vector magnitude (EVM) penalties after 20-km SSMF transmission. Furthermore, the results demonstrate that despite the existence of severe SFO, our proposed SFO compensation scheme can offer nearly negligible power penalties in the DD-OFDM system with optical back-to-back (OBTB) and 20-km SSMF transmission as compared to the ideal case without SFO.

A 128Kb RAM Design with Capacitor-Based Offset Compensation and Double-Diode based Read Assist Circuits at Low VDD

Low power static random access memory (SRAM) takes significant portion of area on chip in all modern SOCs and emerging Computing-in-memory applications for edge devices in IoT. This work proposes novel readability assist with the double-diode based word line under drive (WLUD) has been effective improving the read-static noise-margin (RSNM) by 26–46%and proposed a capacitor based current controlled sense amplifier offset compensation scheme. This scheme achieves 4X reduction in standard deviation of offset voltage over conventional sense amplifier design with 1.1% and 2.9% of area, power overheads respectively with 90 nm CMOS technology at 0.5–1.0 V supply voltages.

Non-linear equalisation and CFO compensation for MIMO-OFDM communication systems based on DWT

ABSTRACT Equalisation is one of the most important algorithms to improve the Bit-Error-Rate (BER) performance in communication systems. In general, equalisation can be classified into two categories: linear and non-linear equalisation. The linear equalisers include Zero Forcing (ZF), and Minimum Mean Square Error (MMSE) equalisers. The non-linear equalisers include ZF and MMSE equalisers that are based on Successive Interference Cancellation (SIC). The ZF equaliser suffers from noise enhancement. The MMSE equaliser can mitigate the noise enhancement using the estimated Signal-to-Noise Ratio (SNR). The ZF-SIC and MMSE-SIC equalisers suffer from error propagation, and high computational complexity, respectively. In this paper, the Orthogonal Frequency Division Multiplexing (OFDM) system is modulated and demodulated using Inverse Discrete Wavelet Transform (IDWT), and DWT instead of Inverse Discrete Fourier Transform (IDFT) and DFT, respectively. Also, we propose a Joint Low-complexity Regularised ZF-SIC (JLRZF-SIC) equaliser that jointly performs the equalisation, and Carrier Frequency Offset (CFO) compensation with lower complexity using banded matrix approximation. The proposed JLRZF-SIC equaliser can accomplish the equalisation, and CFO compensation processes with low-complexity compared to the corresponding MMSE-SIC equaliser. Simulation results show that the proposed JLRZF-SIC equaliser outperforms different linearand non-linear equalisers.

Estimation of carrier frequency offset for FBMC/OQAM by using modified Kalman filtering

SummaryFilter bank multicarrier (FBMC) based on offset quadrature amplitude modulation (OQAM) is regarded as the prospective system for mobile communication. To utilize the potential of the system, the issues like carrier frequency offset have to be investigated extensively. The modulations in the multicarrier system draw a great interest among researchers and engineers in the telecommunication field. Despite the OFDM advantages, significant disadvantages in the system enable researches to approach into efficiently evolved FBMC system. In this paper, the detrimental effects caused by carrier frequency offset on the received signal is considered. Carrier Frequency Offset (CFO) compensation has been effectively undertaken by modified Kalman filtering. The compensation technique not only depends on the specific FBMC modification but also influenced by the selected receiver. A comprehensive analysis of the frequency offset response under three conditions (without offset, with offset, and the compensated samples) has been performed in the proposed system with performance measures as bit error rate (BER) and signal‐to‐noise ratio. 9 CFO compensation is analyzed by varying the channel characteristics (additive white Gaussian noise [AWGN] and Rayleigh Fading) and subcarrier filtering (prototype filter, Gaussian filter, and root‐raised coefficients). From the overall analysis, it is observed that the BER varies from 0.1 to 0.001.

Multiple carrier frequency offset compensation for cooperative HAPS IoT systems

Due to the deployment flexibility and broad coverage capabilities, High Altitude Platform Station is an efficiency solution of communication access for underserved areas like remote areas. However, for some special scenarios, multiple platforms may need to collaborate to overcome the effects of terrain. But the interferences introduced by multiple carriers and access links may hinder the process and restrict its practicability. In order to eliminate these interferences, a proposal on multiple carrier frequency offsets (MCFO) compensation algorithm was provided in this paper. Furthermore, this paper analyzed the lower bound of bit error ratio (BER) for cooperative HAPS systems. Simulation was also carried out, and the results validate the correctness of our theoretical analysis results.

DVB-T Receiver Independent of Channel Allocation, With Frequency Offset Compensation for Improving Resolution in Low Cost Passive Radar

In this article, a commercial low cost solution for increasing DVB-T based passive radar (also referred to as passive coherent location) robustness with respect to channel allocation and range resolution, is designed. IDEPAR demonstrator is updated to include a new recording system in charge of DVB-T channels reallocation. The use of commercial hardware introduces frequency mismatching between acquired channels that compromises system operation. To face channel frequency alignment, fulfilling the requirements imposed by the high Doppler resolution typical of passive radars, a novel compensation algorithm is proposed, based on the minimization of signal dispersion in the Cross-Ambiguity Function domain. The well-known cyclic prefix van de Beek method is used as reference. Results show an increase in target signal to interference ratio and detection performances, as well as a reduction of clutter dispersion when the novel proposed algorithm is applied. The low cost solution is also compared to a high performance one capable of acquiring a wide bandwidth of sparse DVB-T channels, and performing channel reallocation by digital signal processing. Results show that both systems reached similar performances in terms of range resolution and SNR improvement.

Channel Estimation and Carrier Frequency Offset Compensation in Orthogonal Frequency Division Multiplexing System Using Adaptive Filters in Wavelet Transform Domain

In this paper, a combination of channel, receiver frequency-dependent IQ imbalance, and carrier frequency offset estimation under short cyclic prefix length is considered in orthogonal frequency division multiplexing system. An adaptive algorithm based on the set-membership filtering algorithm is used to compensate for these impairments. In short CP length, per-tone equalization structure is used to avoid inter-symbol interference. Due to CFO impairment and IQ imbalance in the receiver, we will expand the PTEQ structure to a two-branch structure. This structure has high computational complexity, so using the set-membership filtering idea with variable step size while reducing the average computation of the system can also increase the convergence speed of the estimates. On the other hand, applying wavelet transform on each branch of this structure before applying adaptive filters will increase the estimation speed. The proposed algorithm will be named SMF-WP-NLMS-PTEQ. The results of the simulations show better performance than the usual adaptive algorithms. Besides, estimation and compensation of channel effects, receiver IQ imbalance and carrier frequency offset under short CP can be easily accomplished by this algorithm.

Cyclostationary Impulsive Noise Mitigation in the Presence of Cyclic Frequency Offset for Narrowband Powerline Communication Systems

Cyclostationary impulsive noise (CSIN) is the dominant source of additive noise in narrowband powerline communication (NB-PLC) systems. Frequency-shift (FRESH) filters have been applied to NB-PLC systems based on orthogonal frequency division multiplexing (OFDM) to mitigate CSIN and enhance the OFDM signals by leveraging the difference in cyclic frequency associated with CSIN and OFDM data symbols. Note that under the effects of frequency fluctuation in the mains voltage, the cyclic frequency offset associated with CSIN can degrade the performance of FRESH-filter receivers. To alleviate such an impact on the FRESH-filter receivers, this paper presents a method for the estimation of the cyclic frequency offset by observing phase variations in the coefficients of the FRESH filter. Computer simulations based on IEEE 1901.2 specifications demonstrate the effectiveness of the proposed scheme in suppressing the cyclic frequency relative error by at least 15.45 dB. Following compensation for the cyclic frequency offset, the proposed scheme achieved a bit error rate of 10 − 4 with an E b / N 0 loss of only 0.7 dB, compared with the ideal case. Compared to the case without the cyclic frequency offset compensation, the proposed scheme achieved an E b / N 0 gain of 2.7 dB.