A High-Speed Well Logging Telemetry System Based on Low-Power FPGA

Abstract

This paper presents a field-programmable gate array (FPGA)-based design, implementation, and measurement of a high-speed telemetry system for well-logging. In the application of geophysics, telemetry is an essential part. With the continuous development of new logging theory and new methods, the telemetry system must accurately upload more and more information in real-time. The methods and techniques used to improve the data transmission system’s performance have become a significant problem in developing a well-logging instrument. The proposed design realized the application of orthogonal frequency division multiplexing (OFDM) in the high-speed cable telemetry system. Besides, We have optimized the calculation of some modules such as symbol synchronization, frequency domain equalization, data compression, and sampling clock offset compensation while not losing performance as much as possible so that the modulation and demodulation algorithm can be implemented on a low-power FPGA. With this system, the modulated data transmitted over a 7,000-meter armored cable can be demodulated in real-time. Compared to conventional devices using digital signal processors, this FPGA-based telemetry system shows advantages in power consumption and real-time performance. Test results show that the FPGA power consumption is 169.7mW, and the high-speed cable telemetry system can transmit data stably at 1.4 to 2.3Mbps through a 7,000-meter armored logging cable.