Number Of Semiconductors Research Articles

Novel Current Source Converter for Integrating Multiple Energy Storage Systems

The increasing penetration of renewable energy sources (RESs) in transmission and distribution systems presents several challenges for grid operators. In particular, the unpredictable behavior of RESs can disrupt the balance between energy production and load demand, potentially affecting the stability of the entire system. Grid-connected energy storage systems (ESSs) offer a possible solution to manage the uncertainty associated with RESs. In fact, ESSs exchange power with the grid through the adoption of suitable energy management strategies, which are typically implemented by power electronics-based grid interfaces. Unlike other current source converter (CSC) solutions described in the literature, which only interface with a single energy storage device, this paper introduces a novel topology for a three-phase delta-type current source converter (D-CSC), which is capable of integrating three independent ESSs using the same number of semiconductors as traditional CSC solutions. Thus, it considerably enhances the flexibility of a power conversion system (PCS) without increasing the number of converter components. In addition, an innovative energy management control strategy is also introduced. This strategy enables the D-CSC to compensate for energy imbalances arising between the three ESSs, which might be caused by several factors, such as different aging characteristics, converter component tolerances, operating conditions, and temperature drifts. Hence, the D-CSC-based interface is capable of proper grid operation even if the three ESSs have different characteristics, thus opening the possibility of employing this converter to integrate both first and second-life devices. First, the topology of the proposed D-CSC is introduced, followed by a detailed mathematical description of its control strategy. The proper grid operation of the D-CSC was tested under different scenarios, considering the grid integration of three independent superconducting magnetic energy storage systems in a marine vessel. The proposed D-CSC is compared to traditional CSC solutions, highlighting the superior performances of the novel converter topology in terms of efficiency, total harmonic distortion of the output currents, and overall cost reduction for the PCS.

A novel switched-capacitor based multilevel voltage boost inverter for EV interface

ABSTRACT Lithium cells are connected in parallel and series to meet the current and voltage requirements in Electric vehicles (EV). Voltage and charge equaliser techniques are employed to protect the lithium cells. These equalisation circuits introduce the loss to the circuit, and the battery pack gets disconnected if any cell is faulty. Switched-capacitor converters have become an alternative to meet the voltage requirement. This article presents a voltage boost multilevel inverter configuration for electric vehicle applications. The proposed MLI features an inherent capacitor self-balancing capability and generates an output with a nine-level range. Algorithms for capacitor voltage balancing or additional sensor circuits are not required because of intrinsic self-balancing. For generating output levels, capacitors with a voltage source with an appropriate charging/discharging pattern are used. The proposed inverter doubles the output voltage for nine levels. A comparison of components, such as the number of semiconductors, diodes, gate driver circuits, and capacitors; system parameters such as voltage gain, blocking voltage, and TSV, is presented to demonstrate the advantages of the proposed MLI over recently developed topologies.

An isolated high‐gain impedance source‐based single‐phase AC–AC converter with safe commutation and variable output frequency

SummaryConventional AC–AC converters have some critical disadvantages, such as inappropriate input and output power quality features, employing snubber circuits to suppress the voltage stress on high‐frequency switches without a safe commutation method that increases the converter size and cost, confined voltage gain, and using huge passive components. This paper proposes an isolated high‐gain single‐phase AC–AC converter with variable output frequency, extended voltage gain, and a safe commutation strategy. Ten semiconductors are only employed for the proposed topology that only two switches and two diodes are operated with high‐frequency PWM signals. This new topology has noteworthy specifications like continuous input and output current, voltage isolation, extended inverting and non‐inverting buck‐boost modes, and frequency regulation. The high voltage gain has been achieved with small values for passive components in the impedance source section, reducing the volume and cost of the converter. The impedance source‐based section of the converter comprises one input inductor, two coupled inductors, and two capacitors in each converter leg. A safe commutation strategy has been designed and applied to the converter to mitigate the voltage and current stresses without extra snubber circuits. The number of semiconductors that simultaneously conduct in each state of the converter has been reduced. So, the conduction loss of the converter diminished. The achieved efficiency equals 95.5% and 93.5% in step‐down and step‐up modes, respectively, validated by an accurate power loss model and experimental analysis. An experimental prototype has been designed to confirm the performance of the suggested converter. Results confirm the theory and operation of the proposed converter.

Modified Design of Two-Switch Buck-Boost Converter to Improve Power Efficiency Using Fewer Conduction Components

In this study, a modified design of a two-switch buck-boost (TSBB) converter is proposed to improve power efficiency using fewer conduction components, and the optimal power range is measured. The proposed TSBB converter operates in three topologies: buck, boost, and buck-boost, like the conventional TSBB converter. However, the proposed converter improves the power efficiency in the buck and buck-boost topologies by decreasing conduction loss using the diode in the switch-off section while maintaining the same number of semiconductors as that in the conventional TSBB converter. The power efficiency of the buck topology improves for the power range 10–80 W in the constant voltage (CV) and constant current (CC) modes; it increases on average by 0.75–1.36% and 0.83–2.27% in the CV and CC modes, respectively. The power efficiency of the buck-boost topology step-down improves for the 10–80 W in all modes. This increases the average by 0.73–0.99% and 3.33–4.75% in the CV and CC modes, respectively. The power efficiency of the buck-boost topology step-up increases on average by 1.65–2.00% for 10–80 W in the CV mode. In the CC mode, it increases by 2.17–2.77% on average for 10–50 W.

A novel bi‐directional high‐gain DC‐DC converter with optimum number of components

AbstractMost emerging applications of battery energy storage systems, fuel cells, and unified power supply (UPS) applications require essential bi‐directional power capability with a high conversion ratio. It supports the integration of the high‐voltage DC‐bus with an energy storage unit or fuel cell. In order to meet this requirement, this paper proposes a novel nonisolated high‐gain DC‐DC converter with bi‐directional power flow capability. This converter is configured with a hybrid structure with a combination of the switched capacitor (SC) and switched inductor (SI) techniques. Moreover, this converter can attain extreme voltage gain with less number of semiconductors and passive components. As a result, the converter cost gets reduced and achieves a wide range of voltage gain at a lesser duty ratio. Furthermore, steady‐state analysis and performance of the proposed topology and its characteristics were presented in this paper. Additionally, a detailed comparative analysis was presented with the most recent literature. Finally, a 500‐W experimental prototype has been fabricated to authorize the performance, feasibility, and analytical waveforms with experimental results.

Semiconducting and Metallic Compounds within the IrIn3 Structure Type: Stability and Chemical Bonding.

Narrow-gap semiconductors are very rare among intermetallic compounds. They appear only when two factors come together: strong hybridization of valence orbitals in the vicinity of the Fermi level and an appropriate number of valence electrons. Surprisingly, the IrIn3 family of intermetallics contains a number of semiconductors, including 17 e- FeGa3, RuGa3, OsGa3, and RuIn3, for which the d-p hybridization gap opens at the Fermi energy. We present comprehensive total energy electronic-structure calculations and crystal orbital Hamilton population analysis of the stable IrIn3-type compounds with semiconducting and metallic properties. The calculated electronic structures possess two pseudogaps and one real gap at the magic valence electron count of 15, 17, and 18 e- per formula unit. When the Fermi level is located in these gaps, the antibonding states are minimized. Total energies calculated for the isomorphous compounds suggest that the metallic state with 18 e- leads to a comparable or even higher thermodynamic stability than the semiconducting state with 17 e-.

Power Efficient Two Transistor Exclusiveor Gate for Full Adder Usinggdi in 45NM

The principle part of ALU (Arithmetic rationale unit) is the Full Adder. This paper tells the best way to perform quick arithmetic activities created utilizing GDI. The fundamental point of this paper is to plan the full adder of two semiconductor utilizing Gate diffusion input (GDI) strategy. The plan of full adder is appropriate for the two semiconductor EX-OR gate. The primary intension of novel technique is fully founded on Full adder plan of 2TEX OR gate which is utilized to decrease power and improve the speed with an advanced territory of number of semiconductor check which is less similar with CMOS innovation. The best strategy for GDI is to plan advanced rationale circuits and which will in general improve the conditions.GDI system is functional to Full adder plan. The Cadence apparatus is to figure power, postponement and region for two semiconductor EX-OR gate .The total work is done in 45 nm innovation. The investigation of the outcomes show that the planned strategy is superior to traditional CMOS innovation.

Wide Range Series Resonant DC-DC Converter with a Reduced Component Count and Capacitor Voltage Stress for Distributed Generation

This paper proposes a galvanically isolated dc-dc converter that can regulate the input voltage in a wide range. It is based on the series resonance dc-dc converter (SRC) topology and a novel boost rectifier. The proposed topology has a smaller number of semiconductors than its SRC-based existing topologies employing an ac-switch in the boost rectifier. The proposed dc-dc converter comprises only two diodes and one switch at the output side, while the existing solutions use two switches and two diodes to step up the voltage. The proposed converter boosts the input voltage within a single boosting interval in the positive half-cycle of the switching period. In addition, the resonant current in the negative half-cycle is sinusoidal, which could enhance the converter efficiency. The resonant capacitor voltage is clamped at the level of the output voltage. Therefore, the voltage stress of the capacitor could significantly reduce at various input voltage and power levels. This makes it perfect for distributed generation applications such as photovoltaics with wide variations of input voltage and power. The converter operates at the fixed switching frequency close to the resonance frequency to obtain the maximum efficiency at the nominal input voltage. The zero-voltage switching (ZVS) feature is achieved in the primary semiconductors, while the diodes in the output-side rectifier turn off at nearly zero current switching. The mathematical model and design guidelines of the proposed converter are discussed in the paper. The experimental results confirmed the theoretical analysis based on a 300 W prototype. The maximum efficiency of the converter was 96.8% at the nominal input voltage, and the converter has achieved a wider input voltage regulation range than that with the boosting cell comprising an ac-switch.

Обоснование схемы активного фильтра гармоник на основе гибридного каскадного инвертора

With an increase in the number of levels in the inverter, the circuit becomes more complicated, the number of semiconductor switches increases. Therefore, topologies, which make it possible to obtain an increase in voltage levels with a decrease in the number of semiconductors, to increase the performance and reliability of the system, are of great interest. The paper proposes a scheme of a hybrid cascade inverter, considers a method of pulse-width modulation based on a carrier, and presents a block diagram of an algorithm for generating reference modulating signals in an optimized method of pulse-width modulation. To control a hybrid inverter as part of an active harmonic filter, a method of pulse-width modulation of the carrier is proposed. It allows reducing the common-mode voltage, switching losses, and minimizing current and voltage harmonics. The paper describes the PWM algorithm, on the basis of which the control signals are modulated and then compared with a triangular carrier to generate a sequence of pulses that turn on or turn off semiconductor switches. The purpose of the proposed solutions is to improve harmonic distortion caused by non-linear load in a 0.4 kV low-voltage system. The results of modeling the proposed active harmonic filter circuit are presented. Based on the studies performed, it is shown that the use of an active harmonic filter based on a 5-stage hybrid inverter with pulse-width modulation control is an effective means of filtering higher harmonics on 0.4 kV low voltage buses in the presence of a nonlinear load, which allows solving the problem of eliminating the impact of higher harmonics on the production activities of the enterprise.

DC/DC Converter for Bipolar LVdc System With Integrated Voltage Balance Capability

Bipolar LVdc distribution is a promising solution for better integration of renewables and enhancement of system efficiency and reliability, but it also faces the challenge of pole voltage imbalance. By simple modifications of the bidirectional CLLC dc/dc converter, this article presents a dc/dc converter with integrated pole voltage balance capability. The converter presents less number of semiconductors, smaller overall footprint, and lower power loss compared to the employment of additional pole voltage balancers. Operating principle of this dc/dc converter and its inherent pole voltage balancing capability are explained, while further control scheme is also developed to compensate the small pole voltage difference caused by the dead time effect. Simulation results with 150 kW/±375 V bipolar output demonstrate the effectiveness of the converter, and the experimental results from a 500 W/±50 V downscaled prototype further prove the proposed concept.

THIRTEEN LEVEL CASCADED H-BRIDGE MULTILEVEL INVERTER FED INDUCTION MOTOR DRIVE

Present day industrial applications require high power conversion for apparatus. For this power conversion multilevel inverter is used. The main purpose of using multilevel inverter is to produce high power output from the medium voltage source. The combination of several switches are present in multilevel inverter. It is the most efficient power converter which is suitable for high power applications with lesser number of harmonics. Because of having large number of semiconductor switches for higher level loads to larger size and increase price of the inverter. So in order to reduce this kind of drawback the cascaded H-bridge multilevel inverter is proposed with lesser number of switches. The proposed thirteen level cascaded H- bridge multilevel inverter output is shown in MATLAB/SIMULINK. The output of the multilevel inverter isfed induction motor and the speed, mechanical torque response are calculated. All the works are carried out through MATLAB/SIMULINK.

A Dual Active Clamp DC–DC Converter With High Voltage Gain

In this article, a novel dual active clamp converter with high voltage gain is proposed for dc-dc applications. The active clamps' switches turn on and off under zero-current switching (ZCS). In addition, the main switch turns on under ZCS condition, as well. Therefore, switching losses are significantly reduced. The converter is also capable of operating under quasi-resonance (QR) mode. In this mode, switching losses are reduced further by lowering the voltage and current, at which the main switch turns off. In comparison with the conventional interleaved converter, the voltage gain of the proposed converter is almost the same, but the number of semiconductors and switching loss are significantly reduced. The switching frequency of the active clamps' switches is half of the main switching frequency. The operation principles of the proposed converter are studied in both pulsewidth modulation and QR modes, and the advantages are investigated. A 200-W prototype is implemented to validate the desired functionality of the converter, and experimental results are compared in both modes.

Mass-dependencies of the bound state properties for three-body positronium-like exitonic complexes

Mass-dependencies of a number of bound state properties are investigated in some light two-electron exitonic complexes (or clusters) $Z^{+} e^{-} e^{-}$, where $m_e \le m_Z \le 2 m_e$. These exitonic complexes (or model ions) play a great role in modern solid state physics, since such complexes describe optical absorption in a number of semiconductors. We also derived and tested a number of accurate mass-interpolation formulas for these properties. In general, our mass-interpolation formulas allow one to predict (fast and accurately) numerical values of these bound state properties in the `new' exitonic complexes, i.e., in three-body exitonic complexes with new mass ratios.

Model and control of the DC–DC modular multilevel converter with DC fault tolerance

ABSTRACT This paper presents the modelling of the DC–DC multilevel modular converter (DC–DC MMC) with half-bridge sub-modules and the control based on the inversion of its model. The DC–DC MMC presents many advantages such as its modularity, the absence of capacitors on the DC-bus voltage and a low switching frequency. This topology also preserves the intrinsic disadvantages of the MMC as the complexity controlling due to the large number of semiconductors and state variables to control. The control of this converter cannot be symmetrical due to the interconnection of the two parts by an internal AC grid. The control strategy of one part of the DC–DC MMC uses the conventional control scheme with current controls and stored energy control. The second one uses the energy control and produces the waveform of the three-phase internal AC bus voltage linking the two parts of the converter. The explicit control for the generation of internal AC voltages guarantees the correct operation of the converter even in a critical DC-voltage dip on DC buses. Thus, it avoids the need of a DC circuit breaker or the use of full-bridge MMC sub-modules. The validity of the proposed control is verified by simulation.

New dual H‐bridge converter for continuous space vector modulation

Multilevel converters are a significant improvement in the DC-AC conversion technology, reaching higher power quality in medium-voltage applications and using standard semiconductors in a smarter way than conventional converters, without necessarily increasing the cost. However, multilevel technology remains discrete and its only way to reduce the overall total harmonic distortion leads on the generation of several discrete levels on the output voltage. Therefore, it is not possible to reduce the harmonic distortion to negligible values, unless a big number of semiconductors are used, which is not cost-effective for low-voltage applications, limiting the reliability of the system. This study proposes a new dual H-bridge inverter that generates a three-phase output voltage with negligible distortion using two variable DC-DC power sources and a new continuous space vector modulation. Simulation and experimental results show high-quality output voltages. The topology is simple and uses only 12 semiconductors, but it requires special attention in the variable DC voltage converters, which can limit the maximum output frequency. Therefore, the solution is suitable for low power applications that require high power quality using small filters or none filters at the AC side. The results were obtained and validated using an experimental laboratory prototype under different operating conditions.

Comprehensive Analysis of Single-Phase Full-Bridge Asymmetrical Flying Capacitor Inverters

This paper presents a comprehensive analysis of single-phase full-bridge asymmetrical flying capacitor inverters under distinct capacitor voltage values. The asymmetrical operation is explored in order to increase the number of output levels for the same number of semiconductors. A formation law for the flying capacitors’ voltages is proposed according to the desired number of output levels. The voltage regulation of the flying capacitors is carried out using the charge regulation analysis. The modulation strategy is also verified to overcome the inverter unbalance problem. Simulation and experimental results are included to demonstrate the performance of the proposed structures.

A NEW STRUCTURE OF FIVE-LEVEL DIODE CLAMPED INVERTER WITH REDUCING ITS ELEMENTS

At the high power switching circuit's applications, when the harmonic distortion is harmful, a multi-level diode clamped inverter is useful, especially when reduced total harmonic distortion and high power are desired. But when the levels get a rise, number of semiconductors are also rising, which leads to many problems such as increasing cost, losses, installation area, and total harmonic distortion. Many researchers have tried to find solutions to these problems. In this sense, this paper focuses on: a) build a new structure of five level diode clamped inverter. b) Increase the efficiency of the inverter by reducing the number of switches. c) Reduce the total harmonic distortion. The theoretical calculation and simulation results are performed for five level diode clamped inverter by MATLAB/ SIMULINK.

Assessment of quality and reliability of band structures from exact-exchange-only Kohn–Sham, hybrid, and GW methods

Band gaps for a large number of semiconductors obtained with the exact-exchange(EXX)-only Kohn–Sham method are compared to those from various generalized Kohn–Sham methods based on hybrid functionals and with experimental values. EXX band gaps are shown to be of superior quality than the band gaps from most of the considered hybrid methods, band gaps obtained with the hybrid functional HSE06 have a similar quality as EXX ones. The EXX method is found to yield d -electron binding energies that are clearly superior to those determined within the local density approximation and to be comparable to d -electron binding energies from GW approaches. EXX plane-wave pseudopotential calculations and EXX all-electron calculations are shown to yield very similar KS transition energies demonstrating that the plane-wave pseudopotential approach is well-suited for EXX methods. Previous discrepancies between pseudopotential and all-electron calculations, most likely, have to be attributed to technical problems in early all-electron EXX calculations.

Design and implementation of fast current releasing DC circuit breaker

Interruption of DC fault current in a DC system is more complex as compared to the AC one due to the high rate of rise of fault current and absence of natural zero crossing. Fast and hard switching action in DC current interruption causes excessive voltage across the circuit breaker. This paper investigates a new type of solid-state DC circuit breaker namely current releasing DC circuit breaker. The mechanism of current interruption in the current releasing DC circuit breaker is analyzed through an aggregated model. The design procedure is defined and simulation results are presented. In addition, a sensitivity analysis is carried out. Finally, the experimental results from a lab-scale prototype as a proof of concept are demonstrated. This study confirms that the current interruption time of the current releasing DC circuit breaker is remarkably less than the typical solid-state DC circuit breakers and it requires less number of semiconductors in its main breaking branch. Although the current releasing DC circuit breaker does not have any surge arrester in its structure, its switching surge voltage is significantly limited.

Global optimization of high-power modular multilevel active-front-end converter using analytical model

Modular multilevel converters (MMCs) have emerged in response to increasing the demands of converter in high-power applications. Because of the modularity, MMC structures are ideal in order to use in high voltage and current applications. Increasing the number of semiconductors and passive components made it so bulky and expensive. On the other hand, high number of variables and the circular interaction between the components values and electrical quantities of the MMCs make it difficult to analyze and design. In this paper, an accurate steady-state analytical model of modular multilevel active front end has been presented and developed. The proposed steady-state model provides more precise analytical expressions for capacitor voltage ripple and circulating current based on the input and output specifications. Then, a novel optimization approach has been proposed and integrated to determine the passive component values in order to maximize the performance and minimize the total volume using analytical model with respect to the technical and mechanical constraints. The optimization procedure uses a nonlinear numerical solver to calculate the optimal values of sub-module capacitor and arm inductance in order to minimize the total energy stored in the converter which is directly related to the total converter mass.