Non-ideal Factors Research Articles

Photonic generation of tunable wideband dual-chirp microwave waveform using frequency-scanning laser and polarization division multiplexing modulator

A photonic approach to generate tunable wideband dual-chirp microwave waveform (DCMW) using frequency-scanning (FS) laser and polarization division multiplexing (PDM) modulator is proposed and demonstrated. In the scheme, an optical signal from the FS laser is modulated by radio-frequency (RF) driving signals through a PDM modulator Then the modulated signal is sent to a polarization controller followed by a polarization delay module to obtain orthogonally polarized second-order sidebands and carrier with time delay. Finally, a tunable wideband DCMW can be generated after photoelectric balanced detection. In the simulation experiments, DCMW with central frequency of 30 GHz and bandwidth of 14 GHz is generated and its ambiguity function is investigated. Meanwhile, the influences of several non-ideal factors, such as the finite extinction ratio and direct-current bias drift of the PDM modulator, phase difference error between two RF driving signals, on the system performance are evaluated. Moreover, the tunability of the generated DCMW is also verified by simulation.

The Modified Model of Third-Harmonic Shaping for a Surface-Mounted Permanent-Magnet Synchronous Motor Under Parallel Magnetization

This article establishes an optimized third-harmonic shaping model in order to reach the goals of high power density and low torque ripple of the surface-mounted permanent magnet motor. The establishment of the model takes the nonideal factors into consideration, including PM relative permeability, stator slotting, pole leakage, pole edge effect, and magnetic circuit saturation. The formula of third-harmonic shaping and the optimal third-harmonic injection factor a m ( m ) are derived from the model. Then, a finite-element model was established to compare the electromagnetic performance of different magnetic poles. It is found that the average torque of the modified third-harmonic motor is 3.5% higher than that of the simplified third-harmonic motor, and the torque ripple is 47% lower than that of the simplified third-harmonic motor. This proves the superiority of the modified model. And experiments demonstrate that the modified model is feasible and effective.

Photonic full-range phase shifter with simultaneous tunable frequency multiplying capability based on a DMZM

In this paper, a novel microwave photonic full-range phase shifter with simultaneous frequency-multiplying capability is proposed. The main device is a dual-drive Mach–Zehnder modulator (DMZM) embedded in a Sagnac loop. Under the assistance of two electrical phase shifters (EPS) and a following polarizer (Pol), the optical carrier is eliminated with desired phase tunable carrier-suppressed double-sideband (CS-DSB) signal reserved. So after photoelectric conversion, the frequency-multiplied phase tunable signals are generated. The frequency multiplication factor (FMF) switching and phase tuning operation of multiplied signals can be achieved easily by adjusting the corresponding EPS. The simulation results show that the proposed structure driven by a 10 GHz RF signal can generate a frequency-doubled signal (20 GHz) or frequency-quadrupled signal (40 GHz) that features full-phase tunable range and flat power response. What is more, the proposed phase shifter has a relatively good robustness to the non-ideal factors, large frequency operation range and good frequency tunable capability.

A filterless reconfigurable frequency mixer based on a wideband photonic microwave phase shifter

In this paper, a filterless reconfigurable frequency mixer based on a wideband photonic microwave phase shifter is proposed. The main device is a single PDM-DPMZM which is applied to generate a pair of orthogonally polarized CS-SSB signals. A pair of PCs are followed to introduce a tunable phase to the CS-SSB signals. By changing the detection scheme of the output optical signals and tuning the PCs, single-ended, double-balanced, I/Q, and image-reject mixer can all be achieved with the capability of full range phase shifting. And it can also perform frequency up- and down-conversion switching by adjusting the DC biases of the modulator. A simulation is carried out to demonstrate its versatility, flexibility and reconfigurability. The measured image-rejection ratio of the image rejection mixer is about 65 dB. In addition, the frequency operation range, practical applicability and feasibility are discussed. The effect of non-ideal factors or adjustable parameters, i.e., extinction ratio deterioration, DC biases drift, phase inaccuracy between I/Q path, instability or inaccuracy of the PC and LO signal power variation on system performance are also analyzed.

An Effective Method to Improve the Accuracy of a Vernier-Type Absolute Magnetic Encoder

This article proposes a method to improve the accuracy of a vernier absolute magnetic encoder. The encoder consists of a master and a nonius multipolar magnetic track. Sinusoidal signals from the master and nonius tracks are used to infer the absolute information. Unfortunately, these signals are contaminated by nonideal factors such as different amplitudes, dc-offsets, phase shifts, and random noise. Moreover, harmonics existing in the encoder signals distort the vernier principle and significantly affect the accuracy of the encoder. To address these problems, the present article proposes an efficient method with three main parts. The first is an observer phase-locked loop (OPLL), which is used to estimate the phase and eliminate the nonideal factors. The second is nonlinear phase compensation, which is used to correct the vernier principle that deviated due to the existing harmonics. Finally, a pole pitch compensation method is introduced to modulate the master phase angle from the OPLL to eliminate the harmonic distortion. The proposed method can eliminate the nonideal factors, harmonic distortion and improve the accuracy of the encoder. All the proposed methods were implemented on an ARM STM32F407ZG. The experimental results confirm the validity of the proposed method for practical applications.

Design of High Robustness BNN Inference Accelerator Based on Binary Memristors

In-memory computing based on memristor is a promising solution to accelerate on-chip deep neural networks. Concerning the nonideal factors of the device analog behaviors, binary neural network (BNN) with ±1 weight and 0/+1 neuron is an alternative route to better employ the binary memristors with high technical maturity. In this article, we demonstrate a select column scheme for the BNN inference accelerator. By incorporating the performance of a W/AlO x /Al2O3/Pt memristor, the BNN shows high robustness and achieves a high recognition accuracy of 98.31% on the MNIST data set. We further propose a bit error model to investigate the impact of device error on recognition accuracy. The effects of device variation and nonideal input are also considered. The results show that the accuracy keeps satisfying (more than 90%) even under a high invalid rate, high input swing (0.21 standard deviation), and 7% salt noise in binary input, respectively, whereas the device variation has a trivial effect on the network.

Assessing the impact of non‐ideal optical factors on optimized solar dish collector system with mirror rearrangement

An optimized solar dish collector (OPSDC) system was proposed in our previous work, which can achieve excellent the optical efficiency and flux uniformity under ideal optics. On this basis, the impacts of the non-ideal optical factors on the optical performance of OPSDC system with a cylindrical and conical receiver are studied in detail and compared with the conventional solar dish collector (COSDC) system in this paper. Where the non-ideal optical factors considered are relatively comprehensive, including the mirror slope error, tracking error, installation error of the mirror and receiver, and receiver's absorptivity degeneration. An optical model with the non-ideal optical factors is built in detail by the ray tracing method, and the corresponding ray tracing codes are developed and verified by literatures and optical software OptisWorks 2012. The results show that the OPSDC system not only has a significantly smaller peak local concentration ratio (LCR) and non-uniformity factor than the COSDC system under the same non-ideal optical factor, but also has excellent optical performance. This means that OPSDC system can effectively avoid the heat absorber generating high-temperature hot spots, thus significantly improving its working reliability and service lifetime. In addition, the tracking error, installation error of the receiver and mirror all lead to the increase of the peak LCR and non-uniform factor, while the mirror slope error and absorber's absorptivity degeneration are conducive to reducing the peak LCR and non-uniform factor. This work can provide a reference for error control of COSDC system and OPSDC system in manufacturing, installation and operation.

Energy-Efficient Moderate Precision Time-Domain Mixed-Signal Vector-by-Matrix Multiplier Exploiting 1T-1R Arrays

The emerging mobile devices in the era of Internet-of-Things (IoT) require a dedicated processor to enable computationally intensive applications such as neuromorphic computing and signal processing. Vector-by-matrix multiplication is the most prominent operation in these applications. Therefore, there is a critical need for compact and ultralow-power vector-by-matrix multiplier (VMM) blocks to perform resource-intensive low-to-moderate precision computations. To this end, in this article, we propose a time-domain mixed-signal VMM exploiting a modified configuration of 1MOSFET-1RRAM (1T-1R) array. The proposed VMM overcomes the energy inefficiency of the current-mode VMM approaches based on RRAMs. A rigorous analysis of different nonideal factors affecting the computational precision indicates that the nonnegligible minimum cell currents, channel length modulation (CLM), and drain-induced barrier lowering (DIBL) are the dominant mechanisms degrading the precision of the proposed VMM. We also show that there exists a tradeoff between the computational precision, dynamic range, and the area- and energy-efficiency of the proposed VMM approach. Therefore, we provide the necessary design guidelines for optimizing the performance. Our preliminary results indicate that an effective computational precision of 6 bits is achievable owing to the inherent compensation effect in the modified 1T-1R blocks. Furthermore, a 4-bit $200\times200$ VMM utilizing the proposed approach exhibits a significantly high energy efficiency of ~1.5 Pops/J and a throughput of 2.5 Tops/s including the contribution from the input/output (I/O) circuitry.

Micromachined Rate-Integrating Gyroscopes: Concept, Asymmetry Error Sources and Phenomena

Rate-integrating gyroscope (RIG) operation is an attractive operation scheme for micro gyroscopes, because it can provide direct angle measurement and a high dynamic range. However, its zero rate output (ZRO) has a severe drift issue. This work compared the difference between rate and rate-integrating gyroscope operations, and further modeled the gyroscope with asymmetric error terms. Then the influences of these non-ideal factors were analyzed to abridge the ZRO drift phenomena and the sources. The numerical verification proved the theory that such an oscillation pattern is caused by the stiffness mismatch, and decaying to X/Y axis manner resulted from the damping errors. The conclusions can contribute to aiding engineers to rapidly locate the bottlenecks of RIG operations.

An efficient background calibration technique for analog-to-digital converters based on neural network

This paper introduces a background digital calibration algorithm based on neural network, which can adaptively calibrate multiple non-ideal factors in a single-channel ADC, such as gain error, mismatch, offset and harmonic distortion. It enables an efficient background calibration through a simple feed forward neural network and LM gradient descent algorithm. The simulation results show that in the case of a signal input close to the Nyquist frequency, for a 14-bit 500 MS/s prototype ADC, only about 40,000 data needed, the ENOB of the ADC can be increased from 7.81 to 13.06 and the SFDR from 49.7 dB to 106.8 dB assisted by a lower speed reference ADC.

Impact of Worst-Case Excitation for DDR interface Signal and Power Integrity Co-Simulation

For the purpose of evaluating the impact of excitation on double data rate (DDR) interface system transmission performance, a methodology for generating the worst-case excitation is proposed for signal integrity (SI) and power integrity (PI) co-simulation. The excitation is produced with the pseudo random bit sequence (PRBS) gated by a square wave of the resonant frequency of the system power distribution network (PDN). The PRBS can reflect non-ideal factors as crosstalk, reflection and loss in the signal line, and the resonant frequency of the PDN can guarantee the maximum simultaneous switching noise (SSN). A data transmission performance simulation environment of currently widely used low power double data rate SDRAM4 (LPDDR4) is constructed based on the advanced I/O buffer information specification Plus (IBIS Plus) model. Compared with the ordinary PRBS excitation, in terms of eye diagrams, the proposed worst-case excitation reduces the eye width and eye height by 4.7% and 19.9%, respectively. Further analysis also proved that 1/2 duty ratio of the gating wave can maximize the influence from the power noise. In conclusion, the proposed worst-case excitation and test environment provide an improved SI/PI co-simulation scenario for the examination of the robustness of DDR system data transmission performance.

A novel pilot protection scheme for HVDC lines based on waveform matching

The traditional current differential protections for HVDC transmission lines are easily affected by distributed capacitive current. Although some improved differential principles have been presented in literatures, they still risk maloperation caused by synchronization error, noise or parameter errors. To overcome the problems above, this paper proposes a novel pilot protection scheme based on waveform matching. After the electrical quantities on both sides are low-pass filtered, the HVDC line is simplified to two PI models from the midpoint, which can eliminate the effect of distributed capacitive current and has simple computation as well as satisfying precision. The midpoint currents, which can be calculated based on the simplified DC line model with the information of either side, will be matched under external faults while have opposite trend under internal faults. The improved Pearson correlation coefficient (IPCC) is proposed to measure the similarity between the waveforms of the calculated midpoint currents and establish the protection criterion. A ± 800 kV HVDC test system is modeled in PSCAD/EMTDC. Extensive simulations of various fault situations indicate that the new protection has absolute selectivity, great reliability and strong fault resistance withstand ability. Sensitivity analysis and comparisons with other pilot protections further demonstrate that the proposed protection stands out for high accuracy and strong robustness to many non-ideal factors.

A design method of capacitor arrays for high-resolution SAR ADCs

PurposeThe design method of high-resolution capacitor arrays was proposed to improve the precision of successive approximation register (SAR) analog-to-digital converters (ADCs) without calibration and optimize the circuit area.Design/methodology/approachAccording to calculation of equivalent series capacitors and change of voltage at the comparator input node, two three-stage structures of capacitor arrays and a general design flow of the multi-stage capacitor arrays were presented. Non-ideal factors on the capacitor arrays were analyzed, and the applications of the two structures were explained based on the capacitor mismatch.FindingsA multi-stage capacitor array for 16-bit SAR ADCs was implemented. The simulation result shows that its nonlinear error was less than 0.3LSB with no gain error and the sampling capacitance accounted for 92.42% of the total capacitance. Effects of capacitive parasitic and mismatch on capacitor arrays were confirmed.Originality/valueThe proposed method focused on capacitor arrays design of high-resolution SAR ADCs. It effectively reduced nonlinear errors, improved SNR and optimized the area of SAR ADCs. The design method was suitable for SAR ADCs with different resolutions to improve their precision.

High Precision Pseudo-Range Measurement in GNSS Anti-Jamming Antenna Array Processing

Radio frequency interference has become a rising problem to the signal of the Global Navigation Satellite System (GNSS). An effective way to achieve anti-jamming is by using an antenna array in GNSS signal processing. However, antenna array processing will cause a decline in the accuracy of pseudo-range measurements because of the channel mismatch and some other non-ideal factors. To solve this problem, space–time or space–frequency adaptive array processing is widely used for interference cancellation while constraining the delay of each antenna at the same time. In this paper, an anti-jamming algorithm with a time-delay constraint is proposed, where one antenna is chosen as the reference and data from other antennas is corrected based on the signal received from it. The deduction and simulation results show that the proposed algorithm can effectively improve the accuracy of pseudo-range measurements without degradation of anti-jamming performance.

A Digital Closed-Loop Sense MEMS Disk Resonator Gyroscope Circuit Design Based on Integrated Analog Front-end.

A digital closed-loop system design of a microelectromechanical systems (MEMS) disk resonator gyroscope (DRG) is proposed in this paper. Vibration models with non-ideal factors are provided based on the structure characteristics and operation mode of the sensing element. The DRG operates in force balance mode with four control loops. A closed self-excited loop realizes stable vibration amplitude on the basis of peak detection technology and phase control loop. Force-to-rebalance technology is employed for the closed sense loop. A high-frequency carrier loaded on an anchor weakens the effect of parasitic capacitances coupling. The signal detected by the charge amplifier is demodulated and converted into a digital output for subsequent processing. Considering compatibility with digital circuits and output precision demands, a low passband sigma-delta (ΣΔ) analog-to-digital converter (ADC) is implemented with a 111.8dB signal-to-noise ratio (SNR). The analog front-end and digital closed self-excited loop is manufactured with a standard 0.35 µm complementary metal-oxide-semiconductor (CMOS) technology. The experimental results show a bias instability of 2.1 °/h and a nonlinearity of 0.035% over the ± 400° full-scale range.

A Novel Current Controller for Grid-Connected Voltage-Source-Inverters

In this article, a new open-loop current controller based on model prediction method for grid-connected voltage-source-inverters (VSIs) is proposed, which consists of two proportional factors and a delay part (Proportional-Proportional-Delay, PPD). First, the working principle of the PPD controller is explained from the combined step response perspective based on a L–R load, and parameter constraints of PPD controller are derived and discussed from the time domain and differential-integral transform perspectives, respectively. After that, parameter design rules of PPD controller are given by considering the constraint of switching frequency. Due to the sensitivity of the model prediction method to nonideal factors, such as voltage drops of semiconductor devices, sampling, and driving delays, etc., influences of these nonideal factors on performance of PPD controller are discussed in this article, and corresponding compensation strategies are given as well. Finally, the effectiveness of proposed PPD controller and its compensation strategy against nonideal factors are verified by experimental results from a 3 kW prototype in laboratory.

Performance Analysis of a Multicarrier Spread Spectrum System in Doubly Dispersive Channels With Emphasis on HF Communications

In this paper, we present a bit error rate (BER) analysis of a multicarrier spread spectrum (MC-SS) system that accounts for several non-ideal factors that exist in actual systems; specifically, channel estimation error, correlated subcarriers, and frequency selectivity over each subcarrier frequency band. The particular MC-SS system that is addressed makes use of filter banks to keep subcarrier bands non-overlapping. In this analysis, the time varying multipath channel is modeled using the wide-sense stationary uncorrelated scattering (WSSUS) channel model, and the channel is estimated using a pilot symbol assisted modulation (PSAM) method. Numerical results that demonstrate the accuracy of the developed theoretical results when applied to design transceivers for high frequency (HF) skywave communications show the usefulness of the developed theory in a practical case study.

Voltage Characteristic Analysis of Ultra-high Voltage Half-wavelength Transmission System Based on Wave Process Method

The voltage characteristics of a half-wavelength transmission (HWLT) system lack mechanism explanation and systematic summary. In this paper, both the steady-state and fault voltage characteristics are analyzed and explained based on the wave process method. An analysis model is established for HWLT lines and wave propagation equations with different terminal conditions are deduced. For steady-state conditions, voltage profiles along HWLT lines are depicted and partial overvoltage occurs when there is an overload or low-power factor. In addition, fault voltage characteristics are analyzed under load-rejection or short-circuit conditions. The series resonance overvoltage will happen when short-circuit faults occur at certain positions and its peak value is influenced by grid strength or fault type. Furthermore, a refined transmission line model is presented to consider non-ideal factors and simulation results demonstrate that geomorphic conditions and electromagnetic environments influence line voltage characteristics to a certain extent.

Interweaving Network: A Novel Monochromatic Image Synthesis Method for a Photon-Counting Detector CT System

With the growing technology of photon-counting detectors (PCD), spectral CT is an important topic for its potential in material differentiation. However, direct reconstruction of the detected spectrum without any compensation will lead to inaccurate results due to some non-ideal factors such as cross talk and pulse pile-up in the detectors. Conventional methods try to model these factors using calibrations and make compensations accordingly, but the results depend on the model calibration accuracy. In this paper, we proposed an Interweaving Network (WeaveNet), a novel deep learning-based monochromatic image synthesis method working in sinogram domain. Unlike previous deep learning-based methods, the WeaveNet architecture was designed based on the factor of spectrum distortion and it can solve this problem better in an intuitive way. The method was tested on a cone-beam CT (CBCT) system equipped with a PCD. After FDK reconstruction of the synthesized monochromatic projection, we evaluated the accuracy of linear attenuation coefficient, decomposition coefficient and separation angle of different materials to examine the performance of our method. This method gives more accurate results with less noise than previous methods, which demonstrates the advantages of this monochromatic image synthesis method.

Memristive synapses with high reproducibility for flexible neuromorphic networks based on biological nanocomposites.

Memristive synapses from biomaterials are promising for building flexible and implantable artificial neuromorphic systems due to their remarkable mechanical and biological properties. However, these biological devices have relatively poor memristive switching characteristics, and thus fail to meet the requirement of neuromorphic networks for high learning accuracy. Here, memristive synapses based on carrageenan nanocomposites that possess desirable characteristics are demonstrated. These devices show highly reproducible analog resistive switching behaviors with 250 conductance states, low write noise, good write linearity, high retention of more than 104 s and endurance for at least 106 pulses. The enhanced switching properties are attributed to controllable and confined conductive filament growth, owing to the synergistic effect of self-assembled silver nanocluster doping and nanocone-shaped electrode contact. Moreover, the devices exhibit excellent reliability after 1000 bending cycles. Simulations including the non-ideal factors prove that the synaptic device array can operate with an online learning accuracy of 94.3%. These findings enable broader applications of biomaterials in flexible memristive devices and neuromorphic systems.