Noise Gain Research Articles

A high linearity low-noise amplifier in 0.25 μm BiCMOS Qubic4x for GSM application

ABSTRACTIn this paper, a low-noise amplifier (LNA) in 0.25 μm BiCMOS Qubic4x technology for Global System for Mobile communications (GSM) application is presented. The LNA uses inductive source degeneration to achieve noise and power gain matching simultaneously and parallel RC feedback to improve linearity. The LNA provides a forward gain (S21) of 10.3 dB with noise figure (NF) of 1.5 dB while drawing 50.6 mW power from a 1.6 V voltage supply. The simulated 1-dB compression point is 0 dBm at 942 MHz. The simulations are done in cadence virtuoso Spectre RF using 0.25 μm BiCMOS Qubic4x technology.

An Identification Method for Single-Input Single-Output Linear Systems with White Noise Gain Function

An Identification Method for Single-Input Single-Output Linear Systems with White Noise Gain Function

SNR Analysis and Optimization in Near-Field Scanning and EMI Applications

In a near-field scanning system, each element of the measurement chain contributes to the thermal noise power density: probe, cables, amplifiers, and the measuring instrument. The signal-to-noise ratio (SNR) is strongly affected by the source output impedance, source temperature, the lossy transmission lines between probe and amplifiers, amplifier noise, amplifier temperature, and amplifier gain. By minimizing the loss between the probe and by using ultralow-noise amplifiers (noise figure (NF) 10 dB, compared to a setup using a 1-m cable and a 3-dB NF amplifier. A resonant probe that is cooled with liquid nitrogen improves measurement SNR by an additional 10–12 dB, as compared to a broadband probe of similar loop size. To combine the advantages of a resonant probe, without sacrificing the ability to measure broadband, a proof of concept is demonstrated that uses a tunable resonant probe which is synchronized to the frequency sweep of the spectrum analyzer.

Ultralow power, noise immune stacked‐double stage clocked‐inverter domino technique for ultradeep submicron technology

SummaryHigh‐performance system widely uses domino gates due to their high speed and low power. Everlasting demand of technology scaling increases leakage current in domino gates. These make domino circuit less immune to noise. This paper present a new energy efficient circuit technique for ultralow power consumption and higher noise immunity design for wide fan‐in gates. The proposed circuit techniques reduce leakage from the evaluation network of the domino circuit with help of stacked footer approach involving clocked inverter in double stage domino. This approach has an added advantage of circuit robustness. The proposed circuit exerts less power dissipation and improved unity noise gain compared with a conventional domino circuit. The immunity is demonstrated with the help of average noise threshold energy, energy normalized ANTE (ANTE, ANTE/Energy). The simulation of the circuit is carried out by using 90 nm technology in Cadence TCAD tools.

Dynamic Threshold Detection Based on Pearson Distance Detection

We consider the transmission and storage of encoded strings of symbols over a noisy channel, where dynamic threshold detection is proposed for achieving resilience against unknown scaling and offset of the received signal. We derive simple rules for dynamically estimating the unknown scale (gain) and offset. The estimates of the actual gain and offset so obtained are used to adjust the threshold levels or to re-scale the received signal within its regular range. Then, the re-scaled signal, brought into its standard range, can be forwarded to the final detection/decoding system, where optimum use can be made of the distance properties of the code by applying, for example, the Chase algorithm. A worked example of a spin-torque transfer magnetic random access memory with an application to an extended (72, 64) Hamming code is described, where the retrieved signal is perturbed by additive Gaussian noise and unknown gain or offset.

A 1.2-V Dynamic Bias Latch-Type Comparator in 65-nm CMOS With 0.4-mV Input Noise

A latch-type comparator with a dynamic bias pre-amplifier is implemented in a 65-nm CMOS process. The dynamic bias with a tail capacitor is simple to implement and ensures that the pre-amplifier output nodes are only partially discharged to reduce the energy consumption. The comparator is analyzed and compared to its prior art in terms of energy consumption and input referred noise voltage. First-order equations are presented that show how to optimize the pre-amplifier for low noise and high gain. Both the dynamic bias comparator and the prior art are implemented on the same die and measurements show that the dynamic bias can reduce the average energy consumption by about a factor 2.5 for the same input-equivalent noise at an input common-mode level of half the supply voltage.

Low power domino logic circuits in deep-submicron technology using CMOS

Leakage power and propagation delay are the two major challenges in designing CMOS VLSI circuits, in deep sub-micron technology. This paper proposes a novel technique: Foot Driven Stack Transistor Domino Logic (FDSTDL) for designing CMOS domino logic gates for the reduction in leakage power and improved noise performance. Two, four, eight and sixteen input OR gates are designed using existing and proposed techniques. These logic gates are simulated on the PTM 32 nm node using HSPICE (Level = 54) in CMOS technology at a clock frequency of 100 MHz. Simulation results are compared based on power consumption, propagation delay and unity noise gain. Simulation results show that proposed domino technique has a maximum power reduction of 59.47% as compared to the CSK-DL technique and maximum delay reduction of 44.6% as compared to the M-HSCD technique in CMOS technology.

A flexible high directivity beamformer with spherical microphone arrays.

The maximum directivity (MD) beamformer with spherical microphone arrays has many salient features in processing broadband acoustic and speech signals while suppressing noise and reverberation; but it is sensitive to sensors' self-noise and mismatch among these sensors. One effective way to deal with this sensitivity is by increasing the number of microphones, thereby improving the so-called white noise gain (WNG), but this increase may lead to many other design issues in terms of cost, array aperture, and possibly other performance degradation. This paper is tackling this sensitivity problem and presents a flexible high directivity (HD) beamforming algorithm. By approximating the ideal directivity pattern and the beamformer's beampattern with spherical harmonic series, the relationship between the two is obtained. This relationship is subsequently used to deduce a flexible HD beamformer, which can improve the WNG while achieving a directivity factor (DF) between the DF of an Nth-order MD beamformer and that of an (N-1)th-order MD one. Also derived is the analytical link between the DF and a tuning parameter and the link between the WNG and this parameter. Based on these links, one can easily determine the optimal value of the tuning parameter once the value of the DF or the WNG is specified.

Frequency-Domain Design of Asymmetric Circular Differential Microphone Arrays

Circular differential microphone arrays (CDMAs) facilitate compact superdirective beamformers whose beampatterns are nearly frequency invariant. In contrast to linear differential microphone arrays where the optimal steering direction is at the endfire, CDMAs provide perfect steering for all azimuthal directions. Herein, we extend the traditional symmetric model of DMAs and establish an analytical asymmetric model for $N$ th-order CDMAs. This model exploits the circular geometry to eliminate the inherent limitation of symmetric beampatterns associated with a linear geometry and allows also asymmetric beampatterns. This new model is then used to develop asymmetric versions of two optimal commonly used beampatterns namely the hypercardioid and the supercardioid. Experimental results demonstrate the advantages of the asymmetric model compared to the traditional symmetric one, when additional directional constraints are imposed. The proposed model yields superior performance in terms of white noise gain, directivity factor, and front-to-back ratio, as well as more flexible design of nulls for the interfering signals.

Dynamic and Tunable Threshold Voltage in Organic Electrochemical Transistors

In recent years, organic electrochemical transistors (OECTs) have found applications in chemical and biological sensing and interfacing, neuromorphic computing, digital logic, and printed electronics. However, the incorporation of OECTs in practical electronic circuits is limited by the relative lack of control over their threshold voltage, which is important for controlling the power consumption and noise margin in complementary and unipolar circuits. Here, the threshold voltage of OECTs is precisely tuned over a range of more than 1 V by chemically controlling the electrochemical potential at the gate electrode. This threshold voltage tunability is exploited to prepare inverters and amplifiers with improved noise margin and gain, respectively. By coupling the gate electrode with an electrochemical oscillator, single-transistor oscillators based on OECTs with dynamic time-varying threshold voltages are prepared. This work highlights the importance of electrochemistry at the gate electrode in determining the electrical properties of OECTs, and opens a path toward the system-level design of low-power OECT-based electronics.

Design of 2.4Ghz CMOS Floating Active Inductor LNA using 130nm Technology

This paper presents about design and optimization of CMOS active inductor integrated circuit. This active inductor implements using Silterra 0.13μm technology and simulated using Cadence Virtuoso and Spectre RF. The center frequency for this active inductor is at 2.4 GHz which follow IEEE 802.11 b/g/n standard. To reduce the chip size of silicon, active inductor is used instead of passive inductor at low noise amplifier LNA circuit. This inductor test and analyse by low noise amplifier circuit. Comparison between active with passive inductor based on LNA circuit has been performed. Result shown that the active inductor has significantly reduce the chip size with 73 % area without sacrificing the noise figure and gain of LNA which is the most important criteria in LNA. The best low noise amplifier provides a power gain (S21) of 20.7 dB with noise figure (NF) of 2.1dB.

Continuously steerable second-order differential microphone arrays.

This paper proposes a second-order differential microphone array (DMA) that can continuously steer in the main lobe direction. First, a general response of the second-order DMA is derived as a linear combination of a monopole and dipoles. Nine- and seven-microphone systems are proposed to realize continuous steering of the second-order DMA. The proposed system synthesizes the steered beam pattern without requiring the phase shifter by using back-to-back cardioids. Simulation results show that the nine-microphone configuration yields a nearly constant and high white noise gain, but the seven-microphone configuration has the practical advantage that it requires fewer microphones.

Analysis of Noise Immunity for Wide OR Footless Domino Circuit Using Keeper Controlling Network

Due to high-speed and low area, domino circuits are used in a variety of applications such as comparator, adder, MUX, memory, microprocessor, and adder. In this paper, we propose a keeper controlling network to improve the noise immunity and performance for wide fan-in OR footless domino circuit. In the proposed design, the keeper controlling network controls the keeper transistor. The network itself consists of an NMOS transistor, which acts as a switch and inverter chain. This network turns OFF the keeper transistor at the start of evaluation phase to enhance the speed of the domino circuit. Similarly, it turns ON the keeper transistor, when all inputs are at low voltage in the evaluation phase to enhance the noise immunity. We simulate the proposed design and other existing circuits using 90 nm CMOS technology on HSPICE. The simulation results show that the proposed design considerably reduces delay, power consumption, power delay product, and improves unity noise gain as compared to the HS-domino circuit for 32-inputs OR gate.

An Auto-Focusing-Noise Suppressor for Cell-Phone Videos Based on Multiple Noise References and Spectral Gain Selection

This paper proposes an auto-focusing (AF)-noise suppressor for cell-phone videos based on multiple noise references and spectral gain selection. AF noise generated by a lens actuator, a cam, or a helicoid is suppressed with a spectral gain which is calculated from a combination of multiple noise references prepared in advance. For quickly adjusting the spectral gain to product-dependent noise characteristics, a mixing ratio of noise references is adaptively determined based on an analysis result of the input noisy speech. The spectral gain for AF noise or that for background noise, whichever is smaller, is applied to the input noisy speech for actual suppression so that both AF noise and background noise are suppressed. Simulation results demonstrate that an AF noise recorded with a commercial cell-phone handset is successfully suppressed with little distortion in the target speech. The PESQ score is improved by as much as 2.9 compared to a conventional noise suppressor designed for ordinary background noise. This paper has been employed in commercial products which are shipped worldwide.

An online secondary path modeling method with regularized step size and self-tuning power scheduling.

This paper investigates the active noise control algorithms and improves them by using online secondary path modeling. The proposed method uses three adaptive filters to track the convergence of the system as well as reduce the target noise. By theoretical analysis, the optimized step size and injected random noise gain are derived. The step size is varied according to the convergence of three adaptive filters and the gain of injected random noise is proportional to the power of modeling error, which makes the method more stable even in the presence of strong perturbation. Compared with previous methods, the proposed method improves the convergence rate and estimation accuracy for both the active control system and the secondary path modeling process with less increase of computational complexity. The simulation results verify the above analysis by controlling three different kinds of noise.

Performance evaluation of domino logic circuits for wide fan-in gates with FinFET

Power dissipation, propagation delay and noise are major issues in digital circuit design. In this paper, a new leakage-tolerant domino circuit is presented which has lower power consumption and higher noise immunity without significant delay increment for 8 and 16 input OR gates are designed and simulated using existing and proposed techniques in FinFET technology. In this paper utilize the property of FinFET on domino circuit in order to improve the overall performance of the circuit. Here all the circuit is simulated at 32 nm process technology by using HSPICE simulation at supply voltage of 0.9 V in MOS, short gate (SG) and low power (LP) mode at 10 MHz frequency. Comparison is done on the basis of power dissipation, propagation delay and unity noise gain. FinFET technology in SG mode reduces propagation delay while LP mode reduces power dissipation. Maximum power saved by ultra low power stacked (ULP-ST) domino logic for 8 and 16 input OR at 15.5, 18.39% in SFLD, 32.91, 28.22% in HSD, 40.60, 44.67% in CKD in SG mode and for LP mode 18.26, 21.68% in SFLD, 28.84, 27.94% in HSD, 55.45, 44.59% in CKD, respectively.

Robust Frequency Invariant Beamforming with Low Sidelobe for Speech Enhancement

Frequency invariant beamformers (FIBs) are widely used in speech enhancement and source localization. There are two traditional optimization methods for FIB design. The first one is convex optimization, which is simple but the frequency invariant characteristic of the beam pattern is poor with respect to frequency band of five octaves. The least squares (LS) approach using spatial response variation (SRV) constraint is another optimization method. Although, it can provide good frequency invariant property, it usually couldn’t be used in speech enhancement for its lack of weight norm constraint which is related to the robustness of a beamformer. In this paper, a robust wideband beamforming method with a constant beamwidth is proposed. The frequency invariant beam pattern is achieved by resolving an optimization problem of the SRV constraint to cover speech frequency band. With the control of sidelobe level, it is available for the frequency invariant beamformer (FIB) to prevent distortion of interference from the undesirable direction. The approach is completed in time-domain by placing tapped delay lines(TDL) and finite impulse response (FIR) filter at the output of each sensor which is more convenient than the Frost processor. By invoking the weight norm constraint, the robustness of the beamformer is further improved against random errors. Experiment results show that the proposed method has a constant beamwidth and almost the same white noise gain as traditional delay-and-sum (DAS) beamformer.

A 10-Gb/s Optical Receiver With Sub-Microampere Input-Referred Noise

High-speed optical receivers realized in low-cost technology often suffer from unfavorable performance, dictated by the transimpedance limit, the key design constraint of shunt-shunt feedback transimpedance amplifier (TIA). In this letter, we propose a novel TIA architecture to overcome the transimpedance limit, achieving both low noise and high gain that are not realizable in a conventional topology. A 10-Gb/s optical receiver with sub-microampere input-referred noise current is implemented in a mature 0.18- $\mu \text{m}$ CMOS technology. Wire-bonded with a commercial III–V p-i-n photodiode, the receiver demonstrates the state-of-the-art input-referred noise current of 0.97 $\mu $ Arms and a total transimpedance gain of 68.3 dB $\Omega $ while consuming 45 mA from 1.8-V power supply. Finally, the proposed architecture is applicable to 10 Gb/s beyond to realize low-noise high-gain optical receivers.

Number-Resolved Single-Photon Detection with Ultralow Noise van der Waals Hybrid.

Van der Waals hybrids of graphene and transition metal dichalcogenides exhibit an extremely large response to optical excitation, yet counting of photons with single-photon resolution is not achieved. Here, a dual-gated bilayer graphene (BLG) and molybdenum disulphide (MoS2 ) hybrid are demonstrated, where opening a band gap in the BLG allows extremely low channel (receiver) noise and large optical gain (≈1010 ) simultaneously. The resulting device is capable of unambiguous determination of the Poissonian emission statistics of an optical source with single-photon resolution at an operating temperature of 80 K, dark count rate 0.07 Hz, and linear dynamic range of ≈40 dB. Single-shot number-resolved single-photon detection with van der Waals heterostructures may impact multiple technologies, including the linear optical quantum computation.

Noise of a JFET Charge Amplifier for Piezoelectric Sensors

A comprehensive noise model of a junction gate field-effect transistor (JFET) charge amplifier is presented for applications with piezoelectric sensors. Based on this previously reported amplifier structure, a noise equivalent circuit is derived and discussed. Universal noise gain expressions for each of the twelve considered noise sources are given. By means of an analytical description of the charge amplifier’s noise behavior, the design and optimization of such preamplifiers for various capacitive microelectromechanical sensor systems will be distinctly simplified. Calculations of the noise floor are compared with measurements with a cantilever-type magnetoelectric sensor and with the performance of a so far commonly utilized basic charge amplifier. With the JFET charge amplifier a noise reduction of approximately 22 dB is achieved in the vicinity of the utilized sensor’s resonance frequency of 7.45 kHz. The reported amplifier is the first which has no negative influence on the total noise level of a resonant magnetoelectric sensor system.